Commit 312eaf0b authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: adl_pci9118: introduce pci9118_amcc_int_ena()

Introduce a helper function to program the AMCC interrupt control/
status register to enable/disable interrupts.

Fix the analog input (*cancel). The analog input async command support
is the only interrupt generator. The (*cancel) should always disable
interrupts.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 26ec7765
...@@ -294,6 +294,20 @@ struct pci9118_private { ...@@ -294,6 +294,20 @@ struct pci9118_private {
unsigned int ai_ns_min; unsigned int ai_ns_min;
}; };
static void pci9118_amcc_int_ena(struct comedi_device *dev, bool enable)
{
struct pci9118_private *devpriv = dev->private;
unsigned int intcsr;
/* enable/disable interrupt for AMCC Incoming Mailbox 4 (32-bit) */
intcsr = inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR);
if (enable)
intcsr |= 0x1f00;
else
intcsr &= ~0x1f00;
outl(intcsr, devpriv->iobase_a + AMCC_OP_REG_INTCSR);
}
static void pci9118_timer_write(struct comedi_device *dev, static void pci9118_timer_write(struct comedi_device *dev,
unsigned int timer, unsigned int val) unsigned int timer, unsigned int val)
{ {
...@@ -592,9 +606,7 @@ static int pci9118_exttrg_add(struct comedi_device *dev, unsigned char source) ...@@ -592,9 +606,7 @@ static int pci9118_exttrg_add(struct comedi_device *dev, unsigned char source)
devpriv->exttrg_users |= (1 << source); devpriv->exttrg_users |= (1 << source);
devpriv->int_ctrl |= PCI9118_INT_CTRL_DTRG; devpriv->int_ctrl |= PCI9118_INT_CTRL_DTRG;
outl(devpriv->int_ctrl, dev->iobase + PCI9118_INT_CTRL_REG); outl(devpriv->int_ctrl, dev->iobase + PCI9118_INT_CTRL_REG);
outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, pci9118_amcc_int_ena(dev, true);
devpriv->iobase_a + AMCC_OP_REG_INTCSR);
/* allow INT in AMCC */
return 0; return 0;
} }
...@@ -607,11 +619,8 @@ static int pci9118_exttrg_del(struct comedi_device *dev, unsigned char source) ...@@ -607,11 +619,8 @@ static int pci9118_exttrg_del(struct comedi_device *dev, unsigned char source)
devpriv->exttrg_users &= ~(1 << source); devpriv->exttrg_users &= ~(1 << source);
if (!devpriv->exttrg_users) { /* shutdown ext trg intterrupts */ if (!devpriv->exttrg_users) { /* shutdown ext trg intterrupts */
devpriv->int_ctrl &= ~PCI9118_INT_CTRL_DTRG; devpriv->int_ctrl &= ~PCI9118_INT_CTRL_DTRG;
if (!devpriv->int_ctrl) /* all IRQ disabled */ if (!devpriv->int_ctrl)
outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) & pci9118_amcc_int_ena(dev, false);
(~0x00001f00),
devpriv->iobase_a + AMCC_OP_REG_INTCSR);
/* disable int in AMCC */
outl(devpriv->int_ctrl, dev->iobase + PCI9118_INT_CTRL_REG); outl(devpriv->int_ctrl, dev->iobase + PCI9118_INT_CTRL_REG);
} }
return 0; return 0;
...@@ -708,6 +717,10 @@ static int pci9118_ai_cancel(struct comedi_device *dev, ...@@ -708,6 +717,10 @@ static int pci9118_ai_cancel(struct comedi_device *dev,
outl(2, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); outl(2, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG);
pci9118_ai_reset_fifo(dev); pci9118_ai_reset_fifo(dev);
devpriv->int_ctrl = 0;
outl(devpriv->int_ctrl, dev->iobase + PCI9118_INT_CTRL_REG);
pci9118_amcc_int_ena(dev, false);
devpriv->ai_do = 0; devpriv->ai_do = 0;
devpriv->usedma = 0; devpriv->usedma = 0;
...@@ -718,11 +731,6 @@ static int pci9118_ai_cancel(struct comedi_device *dev, ...@@ -718,11 +731,6 @@ static int pci9118_ai_cancel(struct comedi_device *dev,
devpriv->ai_neverending = 0; devpriv->ai_neverending = 0;
devpriv->dma_actbuf = 0; devpriv->dma_actbuf = 0;
if (!devpriv->int_ctrl)
outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00,
devpriv->iobase_a + AMCC_OP_REG_INTCSR);
/* allow INT in AMCC */
return 0; return 0;
} }
...@@ -1319,9 +1327,7 @@ static int pci9118_ai_docmd_sampl(struct comedi_device *dev, ...@@ -1319,9 +1327,7 @@ static int pci9118_ai_docmd_sampl(struct comedi_device *dev,
devpriv->ai_ctrl |= PCI9118_AI_CTRL_INT; devpriv->ai_ctrl |= PCI9118_AI_CTRL_INT;
outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, pci9118_amcc_int_ena(dev, true);
devpriv->iobase_a + AMCC_OP_REG_INTCSR);
/* allow INT in AMCC */
if (!(devpriv->ai12_startstop & (START_AI_EXT | START_AI_INT))) { if (!(devpriv->ai12_startstop & (START_AI_EXT | START_AI_INT))) {
outl(devpriv->int_ctrl, dev->iobase + PCI9118_INT_CTRL_REG); outl(devpriv->int_ctrl, dev->iobase + PCI9118_INT_CTRL_REG);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment