Commit 3188508a authored by Tony Lindgren's avatar Tony Lindgren Committed by Russell King

[ARM PATCH] 2332/1: OMAP update 1/2: Include files

Patch from Tony Lindgren

This patch syncs the mainline kernel with the linux-omap tree.
The patch mostly contains minor fixes and extra register definitions
by various OMAP developers.

Signed-off-by: Tony Lindgren
Signed-off-by: Russell King
parent eb5a1b89
......@@ -238,6 +238,10 @@ extern void omap_set_dma_dest_burst_mode(int lch,
extern void omap_dma_link_lch (int lch_head, int lch_queue);
extern void omap_dma_unlink_lch (int lch_head, int lch_queue);
extern dma_addr_t omap_get_dma_src_pos(int lch);
extern dma_addr_t omap_get_dma_dst_pos(int lch);
extern void omap_clear_dma(int lch);
/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
extern int omap_dma_in_1510_mode(void);
......
......@@ -58,6 +58,7 @@
#define OMAP_GPIO_RISING_EDGE 0x02
#define OMAP_GPIO_BOTH_EDGES 0x03
extern int omap_gpio_init(void); /* Call from board init only */
extern int omap_request_gpio(int gpio);
extern void omap_free_gpio(int gpio);
extern void omap_set_gpio_direction(int gpio, int is_input);
......
......@@ -137,7 +137,7 @@
/* CNTL_TIMER register bits */
#define MPUTIM_FREE (1<<6)
#define MPUTIM_CLOCK_ENABLE (1<<5)
#define MPUTIM_PTV_MASK (0x7<<PTV_BIT)
#define MPUTIM_PTV_MASK (0x7<<MPUTIM_PTV_BIT)
#define MPUTIM_PTV_BIT 2
#define MPUTIM_AR (1<<1)
#define MPUTIM_ST (1<<0)
......
......@@ -147,6 +147,8 @@
#define INT_1610_SoSSI (9 + IH2_BASE)
#define INT_1610_SoSSI_MATCH (19 + IH2_BASE)
#define INT_1610_McBSP2RX_OF (31 + IH2_BASE)
#define INT_1610_STI (32 + IH2_BASE)
#define INT_1610_STI_WAKEUP (33 + IH2_BASE)
#define INT_1610_GPIO_BANK2 (40 + IH2_BASE)
#define INT_1610_GPIO_BANK3 (41 + IH2_BASE)
#define INT_1610_MMC2 (42 + IH2_BASE)
......
......@@ -310,6 +310,12 @@ typedef enum {
/* Power management */
T20_1610_LOW_PWR,
/* MCLK Settings */
V5_1710_MCLK_ON,
V5_1710_MCLK_OFF,
R10_1610_MCLK_ON,
R10_1610_MCLK_OFF,
} reg_cfg_t;
#if defined(__MUX_C__) && defined(CONFIG_OMAP_MUX)
......@@ -516,6 +522,12 @@ MUX_CFG("N19_1610_KBR5", 6, 12, 1, 1, 2, 1, 1, 1, 0)
/* Power management */
MUX_CFG("T20_1610_LOW_PWR", 7, 12, 1, NA, 0, 0, NA, 0, 0)
/* MCLK Settings */
MUX_CFG("V5_1710_MCLK_ON", B, 15, 0, NA, 0, 0, NA, 0, 0)
MUX_CFG("V5_1710_MCLK_OFF", B, 15, 6, NA, 0, 0, NA, 0, 0)
MUX_CFG("R10_1610_MCLK_ON", B, 18, 0, NA, 22, 0, NA, 1, 0)
MUX_CFG("R10_1610_MCLK_OFF", B, 18, 6, 2, 22, 1, 2, 1, 1)
};
#endif /* __MUX_C__ */
......
......@@ -56,8 +56,9 @@
*/
#define OMAP1610_SRAM_IDLE_SUSPEND (OMAP16XX_SRAM_BASE + OMAP1610_SRAM_SIZE - 0x200)
#define OMAP5912_SRAM_IDLE_SUSPEND (OMAP16XX_SRAM_BASE + OMAP5912_SRAM_SIZE - 0x200)
#define OMAP1610_SRAM_API_SUSPEND (OMAP1610_SRAM_IDLE_SUSPEND + 0x100)
#define OMAP5912_SRAM_IDLE_SUSPEND (OMAP16XX_SRAM_BASE + OMAP5912_SRAM_SIZE - 0x200)
#define OMAP5912_SRAM_API_SUSPEND (OMAP5912_SRAM_IDLE_SUSPEND + 0x100)
/*
* ---------------------------------------------------------------------------
......
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