Commit 327e1542 authored by Sebastian Hesselbarth's avatar Sebastian Hesselbarth Committed by Jason Cooper

ARM: dts: kirkwood: consolidate common pinctrl settings

All SoCs have the same pinctrl setting for NAND, UART0/1, SPI, TWSI0,
and GBE1. Move it to the common pinctrl node that we now have.
Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: default avatarAndrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-8-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 2ab516ad
......@@ -38,12 +38,6 @@ ocp@f1000000 {
pinctrl: pin-controller@10000 {
compatible = "marvell,88f6192-pinctrl";
pmx_nand: pmx-nand {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp18",
"mpp19";
marvell,function = "nand";
};
pmx_sata0: pmx-sata0 {
marvell,pins = "mpp5", "mpp21", "mpp23";
marvell,function = "sata0";
......@@ -52,22 +46,6 @@ pmx_sata1: pmx-sata1 {
marvell,pins = "mpp4", "mpp20", "mpp22";
marvell,function = "sata1";
};
pmx_spi: pmx-spi {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
marvell,function = "spi";
};
pmx_twsi0: pmx-twsi0 {
marvell,pins = "mpp8", "mpp9";
marvell,function = "twsi0";
};
pmx_uart0: pmx-uart0 {
marvell,pins = "mpp10", "mpp11";
marvell,function = "uart0";
};
pmx_uart1: pmx-uart1 {
marvell,pins = "mpp13", "mpp14";
marvell,function = "uart1";
};
pmx_sdio: pmx-sdio {
marvell,pins = "mpp12", "mpp13", "mpp14",
"mpp15", "mpp16", "mpp17";
......
......@@ -38,12 +38,6 @@ ocp@f1000000 {
pinctrl: pin-controller@10000 {
compatible = "marvell,88f6281-pinctrl";
pmx_nand: pmx-nand {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp18",
"mpp19";
marvell,function = "nand";
};
pmx_sata0: pmx-sata0 {
marvell,pins = "mpp5", "mpp21", "mpp23";
marvell,function = "sata0";
......@@ -52,22 +46,6 @@ pmx_sata1: pmx-sata1 {
marvell,pins = "mpp4", "mpp20", "mpp22";
marvell,function = "sata1";
};
pmx_spi: pmx-spi {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
marvell,function = "spi";
};
pmx_twsi0: pmx-twsi0 {
marvell,pins = "mpp8", "mpp9";
marvell,function = "twsi0";
};
pmx_uart0: pmx-uart0 {
marvell,pins = "mpp10", "mpp11";
marvell,function = "uart0";
};
pmx_uart1: pmx-uart1 {
marvell,pins = "mpp13", "mpp14";
marvell,function = "uart1";
};
pmx_sdio: pmx-sdio {
marvell,pins = "mpp12", "mpp13", "mpp14",
"mpp15", "mpp16", "mpp17";
......
......@@ -59,12 +59,6 @@ ocp@f1000000 {
pinctrl: pin-controller@10000 {
compatible = "marvell,88f6282-pinctrl";
pmx_nand: pmx-nand {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp18", "mpp19";
marvell,function = "nand";
};
pmx_sata0: pmx-sata0 {
marvell,pins = "mpp5", "mpp21", "mpp23";
marvell,function = "sata0";
......@@ -73,29 +67,12 @@ pmx_sata1: pmx-sata1 {
marvell,pins = "mpp4", "mpp20", "mpp22";
marvell,function = "sata1";
};
pmx_spi: pmx-spi {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
marvell,function = "spi";
};
pmx_twsi0: pmx-twsi0 {
marvell,pins = "mpp8", "mpp9";
marvell,function = "twsi0";
};
pmx_twsi1: pmx-twsi1 {
marvell,pins = "mpp36", "mpp37";
marvell,function = "twsi1";
};
pmx_uart0: pmx-uart0 {
marvell,pins = "mpp10", "mpp11";
marvell,function = "uart0";
};
pmx_uart1: pmx-uart1 {
marvell,pins = "mpp13", "mpp14";
marvell,function = "uart1";
};
pmx_sdio: pmx-sdio {
marvell,pins = "mpp12", "mpp13", "mpp14",
"mpp15", "mpp16", "mpp17";
......
......@@ -3,28 +3,6 @@ ocp@f1000000 {
pinctrl: pin-controller@10000 {
compatible = "marvell,98dx4122-pinctrl";
pmx_nand: pmx-nand {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp18",
"mpp19";
marvell,function = "nand";
};
pmx_spi: pmx-spi {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
marvell,function = "spi";
};
pmx_twsi0: pmx-twsi0 {
marvell,pins = "mpp8", "mpp9";
marvell,function = "twsi0";
};
pmx_uart0: pmx-uart0 {
marvell,pins = "mpp10", "mpp11";
marvell,function = "uart0";
};
pmx_uart1: pmx-uart1 {
marvell,pins = "mpp13", "mpp14";
marvell,function = "uart1";
};
};
};
};
......@@ -110,13 +110,6 @@ pmx_leds: pmx-leds {
marvell,pins = "mpp41", "mpp42", "mpp43";
marvell,function = "gpio";
};
pmx_ge1: pmx-ge1 {
marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
"mpp24", "mpp25", "mpp26", "mpp27",
"mpp30", "mpp31", "mpp32", "mpp33";
marvell,function = "ge1";
};
};
};
......
......@@ -74,6 +74,39 @@ ocp@f1000000 {
pinctrl: pin-controller@10000 {
/* set compatible property in SoC file */
reg = <0x10000 0x20>;
pmx_ge1: pmx-ge1 {
marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
"mpp24", "mpp25", "mpp26", "mpp27",
"mpp30", "mpp31", "mpp32", "mpp33";
marvell,function = "ge1";
};
pmx_nand: pmx-nand {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp18", "mpp19";
marvell,function = "nand";
};
pmx_spi: pmx-spi {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
marvell,function = "spi";
};
pmx_twsi0: pmx-twsi0 {
marvell,pins = "mpp8", "mpp9";
marvell,function = "twsi0";
};
pmx_uart0: pmx-uart0 {
marvell,pins = "mpp10", "mpp11";
marvell,function = "uart0";
};
pmx_uart1: pmx-uart1 {
marvell,pins = "mpp13", "mpp14";
marvell,function = "uart1";
};
};
core_clk: core-clocks@10030 {
......
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