Commit 34ee5507 authored by Heiko Stübner's avatar Heiko Stübner Committed by Dave Jones

[CPUFREQ] Add S3C2416/S3C2450 cpufreq driver

The S3C2416/S3C2450 SoCs support two sources for the armclk.

The first source is the so called armdiv which divides the msysclk down
to provide necessary cpu rates. In this mode the core voltage must be
always at 1.3V. The frequency from the armdiv is not allowed to be
lower than the hclk frequency.

In the second mode the armclk can be sourced directly from the hclk in
the so called "dynamic voltags scaling" (dvs) mode. Here the armdiv
isn't used at all. Also in this mode the core voltage may be lowered.
Existing hardware and tests with it suggest 1.0V as sufficient.

When changing the clock source to the armdiv from the hclk, the SoC
shows stability issues if the new frequency is higher than the current
hclk frequency. Hence the driver always forces the armdiv to the hclk
frequency before the source change and lets the cpufreq issue another
set_target call for higher frequencies.

To mark the hclk frequency as lower as the corresponding armdiv
frequency it is set 1MHz below the real frequency. This lets the cpufreq
framework change between 133MHz based on hclk and 133MHz based on armdiv
at will.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Tested-by: default avatarAndrey Gusakov <dron0gus@gmail.com>
Signed-off-by: default avatarDave Jones <davej@redhat.com>
parent 063b0ee4
...@@ -2,6 +2,28 @@ ...@@ -2,6 +2,28 @@
# ARM CPU Frequency scaling drivers # ARM CPU Frequency scaling drivers
# #
config ARM_S3C2416_CPUFREQ
bool "S3C2416 CPU Frequency scaling support"
depends on CPU_S3C2416
help
This adds the CPUFreq driver for the Samsung S3C2416 and
S3C2450 SoC. The S3C2416 supports changing the rate of the
armdiv clock source and also entering a so called dynamic
voltage scaling mode in which it is possible to reduce the
core voltage of the cpu.
If in doubt, say N.
config ARM_S3C2416_CPUFREQ_VCORESCALE
bool "Allow voltage scaling for S3C2416 arm core (EXPERIMENTAL)"
depends on ARM_S3C2416_CPUFREQ && REGULATOR && EXPERIMENTAL
help
Enable CPU voltage scaling when entering the dvs mode.
It uses information gathered through existing hardware and
tests but not documented in any datasheet.
If in doubt, say N.
config ARM_S3C64XX_CPUFREQ config ARM_S3C64XX_CPUFREQ
bool "Samsung S3C64XX" bool "Samsung S3C64XX"
depends on CPU_S3C6410 depends on CPU_S3C6410
......
...@@ -40,6 +40,7 @@ obj-$(CONFIG_X86_CPUFREQ_NFORCE2) += cpufreq-nforce2.o ...@@ -40,6 +40,7 @@ obj-$(CONFIG_X86_CPUFREQ_NFORCE2) += cpufreq-nforce2.o
################################################################################## ##################################################################################
# ARM SoC drivers # ARM SoC drivers
obj-$(CONFIG_UX500_SOC_DB8500) += db8500-cpufreq.o obj-$(CONFIG_UX500_SOC_DB8500) += db8500-cpufreq.o
obj-$(CONFIG_ARM_S3C2416_CPUFREQ) += s3c2416-cpufreq.o
obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o
obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS_CPUFREQ) += exynos-cpufreq.o obj-$(CONFIG_ARM_EXYNOS_CPUFREQ) += exynos-cpufreq.o
......
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