[ARM PATCH] 2146/1: S3C2410 - serial fixes and s3c2440 updates

Patch from Ben Dooks

fixes the following:

 - no debug output in the head code for either s3c2410 or s3c2440
 - fifo size calculation in the low-level debugging code
 - serial constants for s3c2440 serial fifo sizes
 - added s3c2440 support for uncompress.h

Signed-off-by: Ben Dooks 

arch/arm/boot/compressed/head.S

@@ -117,6 +117,15 @@
 		.macro	writeb, rb
 		str	\rb, [r3, #0]
 		.endm
+#elif defined(CONFIG_ARCH_S3C2410)
+#include <config/debug/s3c2410/port.h>
+			.macro loadsp, rb
+		mov	\rb, #0x50000000
+		add	\rb, \rb, #0x4000 * CONFIG_DEBUG_S3C2410_UART
+		.endm
+		.macro	writeb, rb
+		strb	\rb, [r3, #0x20]
+		.endm
 #else
 #error no serial architecture defined
 #endif

arch/arm/kernel/debug.S

@@ -538,6 +538,9 @@
 #elif defined(CONFIG_ARCH_S3C2410)
 #include <asm/arch/map.h>
 #include <asm/arch/regs-serial.h>
+#include <asm/arch/regs-gpio.h>
+#define S3C2410_UART1_OFF (0x4000)
+#define SHIFT_2440TXF (14-9)
 
 		.macro addruart, rx
 		mrc	p15, 0, \rx, c1, c0
@@ -559,7 +562,17 @@
 		beq	1001f				@
 		@ FIFO enabled...
 1003:
+		mrc	p15, 0, \rd, c1, c0
+		tst	\rd, #1
+		addeq	\rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART)
+		addne	\rd, \rx, #(S3C2410_VA_GPIO - S3C2410_VA_UART)
+		bic	\rd, \rd, #0xff000
+		ldr	\rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
+		and	\rd, \rd, #0x00ff0000
+		teq	\rd, #0x00440000		@ is it 2440?
+
 		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]
+		moveq	\rd, \rd, lsr #SHIFT_2440TXF
 		tst	\rd, #S3C2410_UFSTAT_TXFULL
 		bne	1003b
 		b	1002f
@@ -580,8 +593,19 @@
 		beq	1001f				@
 		@ FIFO enabled...
 1003:
+		mrc	p15, 0, \rd, c1, c0
+		tst	\rd, #1
+		addeq	\rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART)
+		addne	\rd, \rx, #(S3C2410_VA_GPIO - S3C2410_VA_UART)
+		bic	\rd, \rd, #0xff000
+		ldr	\rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
+		and	\rd, \rd, #0x00ff0000
+		teq	\rd, #0x00440000		@ is it 2440?
+
 		ldr	\rd, [ \rx, # S3C2410_UFSTAT ]
-		ands	\rd, \rd, #15<<S3C2410_UFSTAT_TXSHIFT
+		andne	\rd, \rd, #S3C2410_UFSTAT_TXMASK
+		andeq	\rd, \rd, #S3C2440_UFSTAT_TXMASK
+		teq	\rd, #0
 		bne	1003b
 		b	1002f
 

include/asm-arm/arch-s3c2410/regs-serial.h

@@ -66,6 +66,7 @@
 #define S3C2410_LCON_PMASK	  (0x7 << 3)
 
 #define S3C2410_LCON_STOPB	  (1<<2)
+#define S3C2410_LCON_IRM          (1<<6)
 
 #define S3C2410_UCON_UCLK	  (1<<10)
 #define S3C2410_UCON_SBREAK	  (1<<4)
@@ -97,6 +98,14 @@
 #define S3C2410_UFSTAT_RXMASK	  (15<<0)
 #define S3C2410_UFSTAT_RXSHIFT	  (0)
 
+#define S3C2440_UFSTAT_TXFULL	  (1<<14)
+#define S3C2440_UFSTAT_RXFULL	  (1<<6)
+#define S3C2440_UFSTAT_TXSHIFT	  (8)
+#define S3C2440_UFSTAT_RXSHIFT	  (0)
+#define S3C2440_UFSTAT_TXMASK	  (63<<8)
+#define S3C2440_UFSTAT_RXMASK	  (63)
+
+#define S3C2410_UTRSTAT_TXE	  (1<<2)
 #define S3C2410_UTRSTAT_TXFE	  (1<<1)
 #define S3C2410_UTRSTAT_RXDR	  (1<<0)