Commit 395e66ba authored by Marc Zyngier's avatar Marc Zyngier Committed by Gregory CLEMENT

ARM64: dts: marvell: armada-37xx: Wire PMUv3

The Cortex-A53s that power the Armada-37xx SoCs are equipped with
a PMUv3, just like most ARMv8 cores.

Advertise the PMUv3 presence in the device tree, and wire its
interrupt. This allows the perf subsystem to work correctly.
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent 5f926e88
......@@ -81,6 +81,11 @@ timer {
<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
......
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