Commit 3a4d180d authored by Wesley Chalmers's avatar Wesley Chalmers Committed by Alex Deucher

drm/amd/display: Optimize clocks on clock change

[WHY]
Presently, there is no way for clocks to be lowered, only raised.

[HOW]
Compare clock status against previous known clock status, and optimize
if different.
This requires re-ordering the layout of the dc_clocks structure, as the
current ordering allows identical clock states to appear different.
Signed-off-by: default avatarWesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: default avatarAric Cyr <Aric.Cyr@amd.com>
Acked-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2fef0faa
...@@ -1646,6 +1646,9 @@ enum surface_update_type dc_check_update_surfaces_for_stream( ...@@ -1646,6 +1646,9 @@ enum surface_update_type dc_check_update_surfaces_for_stream(
updates[i].surface->update_flags.raw = 0xFFFFFFFF; updates[i].surface->update_flags.raw = 0xFFFFFFFF;
} }
if (type == UPDATE_TYPE_FAST && memcmp(&dc->current_state->bw_ctx.bw.dcn.clk, &dc->clk_mgr->clks, offsetof(struct dc_clocks, prev_p_state_change_support)) != 0)
dc->optimized_required = true;
return type; return type;
} }
......
...@@ -252,11 +252,7 @@ enum wm_report_mode { ...@@ -252,11 +252,7 @@ enum wm_report_mode {
*/ */
struct dc_clocks { struct dc_clocks {
int dispclk_khz; int dispclk_khz;
int max_supported_dppclk_khz;
int max_supported_dispclk_khz;
int dppclk_khz; int dppclk_khz;
int bw_dppclk_khz; /*a copy of dppclk_khz*/
int bw_dispclk_khz;
int dcfclk_khz; int dcfclk_khz;
int socclk_khz; int socclk_khz;
int dcfclk_deep_sleep_khz; int dcfclk_deep_sleep_khz;
...@@ -270,6 +266,10 @@ struct dc_clocks { ...@@ -270,6 +266,10 @@ struct dc_clocks {
* optimization required * optimization required
*/ */
bool prev_p_state_change_support; bool prev_p_state_change_support;
int max_supported_dppclk_khz;
int max_supported_dispclk_khz;
int bw_dppclk_khz; /*a copy of dppclk_khz*/
int bw_dispclk_khz;
}; };
struct dc_bw_validation_profile { struct dc_bw_validation_profile {
......
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