Commit 3a77c4c4 authored by Daniel Vetter's avatar Daniel Vetter

drm/i915: Drop I915_ prefix from HAS_FBC

My OCD just couldn't let this slide. Spotted while reviewing Ville's
patch to only flip planes when we have FBC.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 38af6096
...@@ -1295,7 +1295,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused) ...@@ -1295,7 +1295,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
struct drm_device *dev = node->minor->dev; struct drm_device *dev = node->minor->dev;
drm_i915_private_t *dev_priv = dev->dev_private; drm_i915_private_t *dev_priv = dev->dev_private;
if (!I915_HAS_FBC(dev)) { if (!HAS_FBC(dev)) {
seq_puts(m, "FBC unsupported on this chipset\n"); seq_puts(m, "FBC unsupported on this chipset\n");
return 0; return 0;
} }
......
...@@ -1844,7 +1844,7 @@ struct drm_i915_file_private { ...@@ -1844,7 +1844,7 @@ struct drm_i915_file_private {
#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2) #define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr) #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc) #define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
#define HAS_IPS(dev) (IS_ULT(dev) || IS_BROADWELL(dev)) #define HAS_IPS(dev) (IS_ULT(dev) || IS_BROADWELL(dev))
......
...@@ -3220,7 +3220,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg) ...@@ -3220,7 +3220,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
for_each_pipe(pipe) { for_each_pipe(pipe) {
int plane = pipe; int plane = pipe;
if (I915_HAS_FBC(dev)) if (HAS_FBC(dev))
plane = !plane; plane = !plane;
if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS && if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
...@@ -3421,7 +3421,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg) ...@@ -3421,7 +3421,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
for_each_pipe(pipe) { for_each_pipe(pipe) {
int plane = pipe; int plane = pipe;
if (I915_HAS_FBC(dev)) if (HAS_FBC(dev))
plane = !plane; plane = !plane;
if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS && if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
......
...@@ -237,7 +237,7 @@ static void i915_save_display(struct drm_device *dev) ...@@ -237,7 +237,7 @@ static void i915_save_display(struct drm_device *dev)
} }
/* Only regfile.save FBC state on the platform that supports FBC */ /* Only regfile.save FBC state on the platform that supports FBC */
if (I915_HAS_FBC(dev)) { if (HAS_FBC(dev)) {
if (HAS_PCH_SPLIT(dev)) { if (HAS_PCH_SPLIT(dev)) {
dev_priv->regfile.saveDPFC_CB_BASE = I915_READ(ILK_DPFC_CB_BASE); dev_priv->regfile.saveDPFC_CB_BASE = I915_READ(ILK_DPFC_CB_BASE);
} else if (IS_GM45(dev)) { } else if (IS_GM45(dev)) {
...@@ -300,7 +300,7 @@ static void i915_restore_display(struct drm_device *dev) ...@@ -300,7 +300,7 @@ static void i915_restore_display(struct drm_device *dev)
/* only restore FBC info on the platform that supports FBC*/ /* only restore FBC info on the platform that supports FBC*/
intel_disable_fbc(dev); intel_disable_fbc(dev);
if (I915_HAS_FBC(dev)) { if (HAS_FBC(dev)) {
if (HAS_PCH_SPLIT(dev)) { if (HAS_PCH_SPLIT(dev)) {
I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->regfile.saveDPFC_CB_BASE); I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->regfile.saveDPFC_CB_BASE);
} else if (IS_GM45(dev)) { } else if (IS_GM45(dev)) {
......
...@@ -10169,7 +10169,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) ...@@ -10169,7 +10169,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
*/ */
intel_crtc->pipe = pipe; intel_crtc->pipe = pipe;
intel_crtc->plane = pipe; intel_crtc->plane = pipe;
if (I915_HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4) { if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4) {
DRM_DEBUG_KMS("swapping pipes & planes for FBC\n"); DRM_DEBUG_KMS("swapping pipes & planes for FBC\n");
intel_crtc->plane = !pipe; intel_crtc->plane = !pipe;
} }
......
...@@ -461,7 +461,7 @@ void intel_update_fbc(struct drm_device *dev) ...@@ -461,7 +461,7 @@ void intel_update_fbc(struct drm_device *dev)
const struct drm_display_mode *adjusted_mode; const struct drm_display_mode *adjusted_mode;
unsigned int max_width, max_height; unsigned int max_width, max_height;
if (!I915_HAS_FBC(dev)) { if (!HAS_FBC(dev)) {
set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED); set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED);
return; return;
} }
...@@ -5541,7 +5541,7 @@ void intel_init_pm(struct drm_device *dev) ...@@ -5541,7 +5541,7 @@ void intel_init_pm(struct drm_device *dev)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
if (I915_HAS_FBC(dev)) { if (HAS_FBC(dev)) {
if (INTEL_INFO(dev)->gen >= 7) { if (INTEL_INFO(dev)->gen >= 7) {
dev_priv->display.fbc_enabled = ironlake_fbc_enabled; dev_priv->display.fbc_enabled = ironlake_fbc_enabled;
dev_priv->display.enable_fbc = gen7_enable_fbc; dev_priv->display.enable_fbc = gen7_enable_fbc;
......
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