Commit 3c888c16 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher

drm/amdgpu: retire indirect mmio reg support from cgs

not needed anymore
Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 46e840ed
...@@ -60,8 +60,6 @@ static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device, ...@@ -60,8 +60,6 @@ static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device,
{ {
CGS_FUNC_ADEV; CGS_FUNC_ADEV;
switch (space) { switch (space) {
case CGS_IND_REG__MMIO:
return RREG32_IDX(index);
case CGS_IND_REG__PCIE: case CGS_IND_REG__PCIE:
return RREG32_PCIE(index); return RREG32_PCIE(index);
case CGS_IND_REG__SMC: case CGS_IND_REG__SMC:
...@@ -77,6 +75,8 @@ static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device, ...@@ -77,6 +75,8 @@ static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device,
case CGS_IND_REG__AUDIO_ENDPT: case CGS_IND_REG__AUDIO_ENDPT:
DRM_ERROR("audio endpt register access not implemented.\n"); DRM_ERROR("audio endpt register access not implemented.\n");
return 0; return 0;
default:
BUG();
} }
WARN(1, "Invalid indirect register space"); WARN(1, "Invalid indirect register space");
return 0; return 0;
...@@ -88,8 +88,6 @@ static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device, ...@@ -88,8 +88,6 @@ static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device,
{ {
CGS_FUNC_ADEV; CGS_FUNC_ADEV;
switch (space) { switch (space) {
case CGS_IND_REG__MMIO:
return WREG32_IDX(index, value);
case CGS_IND_REG__PCIE: case CGS_IND_REG__PCIE:
return WREG32_PCIE(index, value); return WREG32_PCIE(index, value);
case CGS_IND_REG__SMC: case CGS_IND_REG__SMC:
...@@ -105,6 +103,8 @@ static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device, ...@@ -105,6 +103,8 @@ static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device,
case CGS_IND_REG__AUDIO_ENDPT: case CGS_IND_REG__AUDIO_ENDPT:
DRM_ERROR("audio endpt register access not implemented.\n"); DRM_ERROR("audio endpt register access not implemented.\n");
return; return;
default:
BUG();
} }
WARN(1, "Invalid indirect register space"); WARN(1, "Invalid indirect register space");
} }
......
...@@ -32,7 +32,6 @@ struct cgs_device; ...@@ -32,7 +32,6 @@ struct cgs_device;
* enum cgs_ind_reg - Indirect register spaces * enum cgs_ind_reg - Indirect register spaces
*/ */
enum cgs_ind_reg { enum cgs_ind_reg {
CGS_IND_REG__MMIO,
CGS_IND_REG__PCIE, CGS_IND_REG__PCIE,
CGS_IND_REG__SMC, CGS_IND_REG__SMC,
CGS_IND_REG__UVD_CTX, CGS_IND_REG__UVD_CTX,
......
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