Commit 3d79038f authored by Andrew Vasquez's avatar Andrew Vasquez Committed by James Bottomley

[SCSI] qla2xxx: Always use an FLT's NVRAM/VPD region information.

Rather than assuming a particular layout of the data.  Applies to
recent ISPs only.
Signed-off-by: default avatarAndrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@HansenPartnership.com>
parent d1b1bef4
...@@ -111,7 +111,8 @@ qla2x00_sysfs_write_nvram(struct kobject *kobj, ...@@ -111,7 +111,8 @@ qla2x00_sysfs_write_nvram(struct kobject *kobj,
struct qla_hw_data *ha = vha->hw; struct qla_hw_data *ha = vha->hw;
uint16_t cnt; uint16_t cnt;
if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->nvram_size) if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->nvram_size ||
!ha->isp_ops->write_nvram)
return 0; return 0;
/* Checksum NVRAM. */ /* Checksum NVRAM. */
...@@ -393,7 +394,8 @@ qla2x00_sysfs_write_vpd(struct kobject *kobj, ...@@ -393,7 +394,8 @@ qla2x00_sysfs_write_vpd(struct kobject *kobj,
struct qla_hw_data *ha = vha->hw; struct qla_hw_data *ha = vha->hw;
uint8_t *tmp_data; uint8_t *tmp_data;
if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->vpd_size) if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->vpd_size ||
!ha->isp_ops->write_nvram)
return 0; return 0;
if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) { if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
......
...@@ -2506,6 +2506,8 @@ struct qla_hw_data { ...@@ -2506,6 +2506,8 @@ struct qla_hw_data {
uint32_t flt_region_boot; uint32_t flt_region_boot;
uint32_t flt_region_fw; uint32_t flt_region_fw;
uint32_t flt_region_vpd_nvram; uint32_t flt_region_vpd_nvram;
uint32_t flt_region_vpd;
uint32_t flt_region_nvram;
uint32_t flt_region_npiv_conf; uint32_t flt_region_npiv_conf;
/* Needed for BEACON */ /* Needed for BEACON */
......
...@@ -1708,6 +1708,10 @@ struct ex_init_cb_81xx { ...@@ -1708,6 +1708,10 @@ struct ex_init_cb_81xx {
#define FA_RISC_CODE_ADDR_81 0xA0000 #define FA_RISC_CODE_ADDR_81 0xA0000
#define FA_FW_AREA_ADDR_81 0xC0000 #define FA_FW_AREA_ADDR_81 0xC0000
#define FA_VPD_NVRAM_ADDR_81 0xD0000 #define FA_VPD_NVRAM_ADDR_81 0xD0000
#define FA_VPD0_ADDR_81 0xD0000
#define FA_VPD1_ADDR_81 0xD0400
#define FA_NVRAM0_ADDR_81 0xD0080
#define FA_NVRAM1_ADDR_81 0xD0480
#define FA_FEATURE_ADDR_81 0xD4000 #define FA_FEATURE_ADDR_81 0xD4000
#define FA_FLASH_DESCR_ADDR_81 0xD8000 #define FA_FLASH_DESCR_ADDR_81 0xD8000
#define FA_FLASH_LAYOUT_ADDR_81 0xD8400 #define FA_FLASH_LAYOUT_ADDR_81 0xD8400
......
...@@ -4344,23 +4344,17 @@ qla81xx_nvram_config(scsi_qla_host_t *vha) ...@@ -4344,23 +4344,17 @@ qla81xx_nvram_config(scsi_qla_host_t *vha)
/* Determine NVRAM starting address. */ /* Determine NVRAM starting address. */
ha->nvram_size = sizeof(struct nvram_81xx); ha->nvram_size = sizeof(struct nvram_81xx);
ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
ha->vpd_size = FA_NVRAM_VPD_SIZE; ha->vpd_size = FA_NVRAM_VPD_SIZE;
ha->vpd_base = FA_NVRAM_VPD0_ADDR;
if (PCI_FUNC(ha->pdev->devfn) & 1) {
ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
ha->vpd_base = FA_NVRAM_VPD1_ADDR;
}
/* Get VPD data into cache */ /* Get VPD data into cache */
ha->vpd = ha->nvram + VPD_OFFSET; ha->vpd = ha->nvram + VPD_OFFSET;
ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); ha->vpd_size);
/* Get NVRAM data into cache and calculate checksum. */ /* Get NVRAM data into cache and calculate checksum. */
dptr = (uint32_t *)nv; ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
ha->nvram_size); ha->nvram_size);
dptr = (uint32_t *)nv;
for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
chksum += le32_to_cpu(*dptr++); chksum += le32_to_cpu(*dptr++);
......
...@@ -1409,8 +1409,8 @@ static struct isp_operations qla81xx_isp_ops = { ...@@ -1409,8 +1409,8 @@ static struct isp_operations qla81xx_isp_ops = {
.build_iocbs = NULL, .build_iocbs = NULL,
.prep_ms_iocb = qla24xx_prep_ms_iocb, .prep_ms_iocb = qla24xx_prep_ms_iocb,
.prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
.read_nvram = qla25xx_read_nvram_data, .read_nvram = NULL,
.write_nvram = qla25xx_write_nvram_data, .write_nvram = NULL,
.fw_dump = qla81xx_fw_dump, .fw_dump = qla81xx_fw_dump,
.beacon_on = qla24xx_beacon_on, .beacon_on = qla24xx_beacon_on,
.beacon_off = qla24xx_beacon_off, .beacon_off = qla24xx_beacon_off,
......
...@@ -629,6 +629,14 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr) ...@@ -629,6 +629,14 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
{ FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR_81 }; { FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR_81 };
const uint32_t def_vpd_nvram[] = const uint32_t def_vpd_nvram[] =
{ FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR_81 }; { FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR_81 };
const uint32_t def_vpd0[] =
{ 0, 0, FA_VPD0_ADDR_81 };
const uint32_t def_vpd1[] =
{ 0, 0, FA_VPD1_ADDR_81 };
const uint32_t def_nvram0[] =
{ 0, 0, FA_NVRAM0_ADDR_81 };
const uint32_t def_nvram1[] =
{ 0, 0, FA_NVRAM1_ADDR_81 };
const uint32_t def_fdt[] = const uint32_t def_fdt[] =
{ FA_FLASH_DESCR_ADDR_24, FA_FLASH_DESCR_ADDR, { FA_FLASH_DESCR_ADDR_24, FA_FLASH_DESCR_ADDR,
FA_FLASH_DESCR_ADDR_81 }; FA_FLASH_DESCR_ADDR_81 };
...@@ -693,6 +701,20 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr) ...@@ -693,6 +701,20 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
break; break;
case FLT_REG_VPD_0: case FLT_REG_VPD_0:
ha->flt_region_vpd_nvram = start; ha->flt_region_vpd_nvram = start;
if (!(PCI_FUNC(ha->pdev->devfn) & 1))
ha->flt_region_vpd = start;
break;
case FLT_REG_VPD_1:
if (PCI_FUNC(ha->pdev->devfn) & 1)
ha->flt_region_vpd = start;
break;
case FLT_REG_NVRAM_0:
if (!(PCI_FUNC(ha->pdev->devfn) & 1))
ha->flt_region_nvram = start;
break;
case FLT_REG_NVRAM_1:
if (PCI_FUNC(ha->pdev->devfn) & 1)
ha->flt_region_nvram = start;
break; break;
case FLT_REG_FDT: case FLT_REG_FDT:
ha->flt_region_fdt = start; ha->flt_region_fdt = start;
...@@ -722,13 +744,18 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr) ...@@ -722,13 +744,18 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
ha->flt_region_fw = def_fw[def]; ha->flt_region_fw = def_fw[def];
ha->flt_region_boot = def_boot[def]; ha->flt_region_boot = def_boot[def];
ha->flt_region_vpd_nvram = def_vpd_nvram[def]; ha->flt_region_vpd_nvram = def_vpd_nvram[def];
ha->flt_region_vpd = !(PCI_FUNC(ha->pdev->devfn) & 1) ?
def_vpd0[def]: def_vpd1[def];
ha->flt_region_nvram = !(PCI_FUNC(ha->pdev->devfn) & 1) ?
def_nvram0[def]: def_nvram1[def];
ha->flt_region_fdt = def_fdt[def]; ha->flt_region_fdt = def_fdt[def];
ha->flt_region_npiv_conf = !(PCI_FUNC(ha->pdev->devfn) & 1) ? ha->flt_region_npiv_conf = !(PCI_FUNC(ha->pdev->devfn) & 1) ?
def_npiv_conf0[def]: def_npiv_conf1[def]; def_npiv_conf0[def]: def_npiv_conf1[def];
done: done:
DEBUG2(qla_printk(KERN_DEBUG, ha, "FLT[%s]: boot=0x%x fw=0x%x " DEBUG2(qla_printk(KERN_DEBUG, ha, "FLT[%s]: boot=0x%x fw=0x%x "
"vpd_nvram=0x%x fdt=0x%x flt=0x%x npiv=0x%x.\n", loc, "vpd_nvram=0x%x vpd=0x%x nvram=0x%x fdt=0x%x flt=0x%x "
ha->flt_region_boot, ha->flt_region_fw, ha->flt_region_vpd_nvram, "npiv=0x%x.\n", loc, ha->flt_region_boot, ha->flt_region_fw,
ha->flt_region_vpd_nvram, ha->flt_region_vpd, ha->flt_region_nvram,
ha->flt_region_fdt, ha->flt_region_flt, ha->flt_region_npiv_conf)); ha->flt_region_fdt, ha->flt_region_flt, ha->flt_region_npiv_conf));
} }
......
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