Commit 3f19bb6d authored by Deepak Saxena's avatar Deepak Saxena Committed by Russell King

[ARM PATCH] 2253/1: Fix IXP4xx PCI config cycle routines

Patch from Deepak Saxena

The IXP4xx PCI config cycle routines currently virtualize accesses
to device 0:0 to map to the host bridge itself. This is technically
incorrect b/c on certain boards we have an actual device wired to 0:0
and the existing code will not see these.
  

Signed-off-by: Deepak Saxena
 
Signed-off-by: Russell King
parent 74242039
...@@ -238,9 +238,10 @@ static u32 byte_lane_enable_bits(u32 n, int size) ...@@ -238,9 +238,10 @@ static u32 byte_lane_enable_bits(u32 n, int size)
return 0xffffffff; return 0xffffffff;
} }
static int read_config(u8 bus_num, u16 devfn, int where, int size, u32 *value) static int ixp4xx_pci_read_config(struct pci_bus *bus, u16 devfn, int where, int size, u32 *value)
{ {
u32 n, byte_enables, addr, data; u32 n, byte_enables, addr, data;
u8 bus_num = bus->number;
pr_debug("read_config from %d size %d dev %d:%d:%d\n", where, size, pr_debug("read_config from %d size %d dev %d:%d:%d\n", where, size,
bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn)); bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn));
...@@ -260,9 +261,10 @@ static int read_config(u8 bus_num, u16 devfn, int where, int size, u32 *value) ...@@ -260,9 +261,10 @@ static int read_config(u8 bus_num, u16 devfn, int where, int size, u32 *value)
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
static int write_config(u8 bus_num, u16 devfn, int where, int size, u32 value) static int ixp4xx_pci_write_config(struct pci_bus *bus, u16 devfn, int where, int size, u32 value)
{ {
u32 n, byte_enables, addr, data; u32 n, byte_enables, addr, data;
u8 bus_num = bus->number;
pr_debug("write_config_byte %#x to %d size %d dev %d:%d:%d\n", value, where, pr_debug("write_config_byte %#x to %d size %d dev %d:%d:%d\n", value, where,
size, bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn)); size, bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn));
...@@ -280,31 +282,11 @@ static int write_config(u8 bus_num, u16 devfn, int where, int size, u32 value) ...@@ -280,31 +282,11 @@ static int write_config(u8 bus_num, u16 devfn, int where, int size, u32 value)
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
/*
* Generalized PCI config access functions.
*/
static int ixp4xx_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 *value)
{
if (bus->number && !PCI_SLOT(devfn))
return local_read_config(where, size, value);
return read_config(bus->number, devfn, where, size, value);
}
static int ixp4xx_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 value)
{
if (bus->number && !PCI_SLOT(devfn))
return local_write_config(where, size, value);
return write_config(bus->number, devfn, where, size, value);
}
struct pci_ops ixp4xx_ops = { struct pci_ops ixp4xx_ops = {
.read = ixp4xx_read_config, .read = ixp4xx_pci_read_config,
.write = ixp4xx_write_config, .write = ixp4xx_pci_write_config,
}; };
/* /*
* PCI abort handler * PCI abort handler
*/ */
......
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