ARM: dts: zynq: Add SDHCI nodes

Add nodes for the Arasan SDHCI controller to Zynq dts files.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

arch/arm/boot/dts/zynq-7000.dtsi

@@ -102,6 +102,26 @@ gem1: ethernet@e000c000 {
 			clock-names = "pclk", "hclk", "tx_clk";
 		};
 
+		sdhci0: ps7-sdhci@e0100000 {
+			compatible = "arasan,sdhci-8.9a";
+			status = "disabled";
+			clock-names = "clk_xin", "clk_ahb";
+			clocks = <&clkc 21>, <&clkc 32>;
+			interrupt-parent = <&intc>;
+			interrupts = <0 24 4>;
+			reg = <0xe0100000 0x1000>;
+		} ;
+
+		sdhci1: ps7-sdhci@e0101000 {
+			compatible = "arasan,sdhci-8.9a";
+			status = "disabled";
+			clock-names = "clk_xin", "clk_ahb";
+			clocks = <&clkc 22>, <&clkc 33>;
+			interrupt-parent = <&intc>;
+			interrupts = <0 47 4>;
+			reg = <0xe0101000 0x1000>;
+		} ;
+
 		slcr: slcr@f8000000 {
 			compatible = "xlnx,zynq-slcr";
 			reg = <0xF8000000 0x1000>;

arch/arm/boot/dts/zynq-zc702.dts

@@ -34,6 +34,10 @@ &gem0 {
 	phy-mode = "rgmii";
 };
 
+&sdhci0 {
+	status = "okay";
+};
+
 &uart1 {
 	status = "okay";
 };

arch/arm/boot/dts/zynq-zc706.dts

@@ -35,6 +35,10 @@ &gem0 {
 	phy-mode = "rgmii";
 };
 
+&sdhci0 {
+	status = "okay";
+};
+
 &uart1 {
 	status = "okay";
 };

arch/arm/boot/dts/zynq-zed.dts

@@ -35,6 +35,10 @@ &gem0 {
 	phy-mode = "rgmii";
 };
 
+&sdhci0 {
+	status = "okay";
+};
+
 &uart1 {
 	status = "okay";
 };