Commit 4089caa7 authored by Aaro Koskinen's avatar Aaro Koskinen Committed by Paul Burton

MIPS: OCTEON: delete redundant register definitions

For most OCTEON SoCs there is a repeated and redundant register definition
for almost every hardware register, although the register bit fields
would not differ from other SoCs. Since the driver code should use only
one definition for simplicity, these other fields are just redundant
and can be deleted.
Signed-off-by: default avatarAaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
parent 036d0823
...@@ -68,9 +68,6 @@ union cvmx_asxx_gmii_rx_clk_set { ...@@ -68,9 +68,6 @@ union cvmx_asxx_gmii_rx_clk_set {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_gmii_rx_clk_set_s cn30xx;
struct cvmx_asxx_gmii_rx_clk_set_s cn31xx;
struct cvmx_asxx_gmii_rx_clk_set_s cn50xx;
}; };
union cvmx_asxx_gmii_rx_dat_set { union cvmx_asxx_gmii_rx_dat_set {
...@@ -84,9 +81,6 @@ union cvmx_asxx_gmii_rx_dat_set { ...@@ -84,9 +81,6 @@ union cvmx_asxx_gmii_rx_dat_set {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_gmii_rx_dat_set_s cn30xx;
struct cvmx_asxx_gmii_rx_dat_set_s cn31xx;
struct cvmx_asxx_gmii_rx_dat_set_s cn50xx;
}; };
union cvmx_asxx_int_en { union cvmx_asxx_int_en {
...@@ -121,12 +115,6 @@ union cvmx_asxx_int_en { ...@@ -121,12 +115,6 @@ union cvmx_asxx_int_en {
uint64_t reserved_11_63:53; uint64_t reserved_11_63:53;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_asxx_int_en_cn30xx cn31xx;
struct cvmx_asxx_int_en_s cn38xx;
struct cvmx_asxx_int_en_s cn38xxp2;
struct cvmx_asxx_int_en_cn30xx cn50xx;
struct cvmx_asxx_int_en_s cn58xx;
struct cvmx_asxx_int_en_s cn58xxp1;
}; };
union cvmx_asxx_int_reg { union cvmx_asxx_int_reg {
...@@ -161,12 +149,6 @@ union cvmx_asxx_int_reg { ...@@ -161,12 +149,6 @@ union cvmx_asxx_int_reg {
uint64_t reserved_11_63:53; uint64_t reserved_11_63:53;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_asxx_int_reg_cn30xx cn31xx;
struct cvmx_asxx_int_reg_s cn38xx;
struct cvmx_asxx_int_reg_s cn38xxp2;
struct cvmx_asxx_int_reg_cn30xx cn50xx;
struct cvmx_asxx_int_reg_s cn58xx;
struct cvmx_asxx_int_reg_s cn58xxp1;
}; };
union cvmx_asxx_mii_rx_dat_set { union cvmx_asxx_mii_rx_dat_set {
...@@ -180,8 +162,6 @@ union cvmx_asxx_mii_rx_dat_set { ...@@ -180,8 +162,6 @@ union cvmx_asxx_mii_rx_dat_set {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_mii_rx_dat_set_s cn30xx;
struct cvmx_asxx_mii_rx_dat_set_s cn50xx;
}; };
union cvmx_asxx_prt_loop { union cvmx_asxx_prt_loop {
...@@ -210,12 +190,6 @@ union cvmx_asxx_prt_loop { ...@@ -210,12 +190,6 @@ union cvmx_asxx_prt_loop {
uint64_t reserved_7_63:57; uint64_t reserved_7_63:57;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_asxx_prt_loop_cn30xx cn31xx;
struct cvmx_asxx_prt_loop_s cn38xx;
struct cvmx_asxx_prt_loop_s cn38xxp2;
struct cvmx_asxx_prt_loop_cn30xx cn50xx;
struct cvmx_asxx_prt_loop_s cn58xx;
struct cvmx_asxx_prt_loop_s cn58xxp1;
}; };
union cvmx_asxx_rld_bypass { union cvmx_asxx_rld_bypass {
...@@ -229,10 +203,6 @@ union cvmx_asxx_rld_bypass { ...@@ -229,10 +203,6 @@ union cvmx_asxx_rld_bypass {
uint64_t reserved_1_63:63; uint64_t reserved_1_63:63;
#endif #endif
} s; } s;
struct cvmx_asxx_rld_bypass_s cn38xx;
struct cvmx_asxx_rld_bypass_s cn38xxp2;
struct cvmx_asxx_rld_bypass_s cn58xx;
struct cvmx_asxx_rld_bypass_s cn58xxp1;
}; };
union cvmx_asxx_rld_bypass_setting { union cvmx_asxx_rld_bypass_setting {
...@@ -246,10 +216,6 @@ union cvmx_asxx_rld_bypass_setting { ...@@ -246,10 +216,6 @@ union cvmx_asxx_rld_bypass_setting {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_rld_bypass_setting_s cn38xx;
struct cvmx_asxx_rld_bypass_setting_s cn38xxp2;
struct cvmx_asxx_rld_bypass_setting_s cn58xx;
struct cvmx_asxx_rld_bypass_setting_s cn58xxp1;
}; };
union cvmx_asxx_rld_comp { union cvmx_asxx_rld_comp {
...@@ -276,9 +242,6 @@ union cvmx_asxx_rld_comp { ...@@ -276,9 +242,6 @@ union cvmx_asxx_rld_comp {
uint64_t reserved_8_63:56; uint64_t reserved_8_63:56;
#endif #endif
} cn38xx; } cn38xx;
struct cvmx_asxx_rld_comp_cn38xx cn38xxp2;
struct cvmx_asxx_rld_comp_s cn58xx;
struct cvmx_asxx_rld_comp_s cn58xxp1;
}; };
union cvmx_asxx_rld_data_drv { union cvmx_asxx_rld_data_drv {
...@@ -294,10 +257,6 @@ union cvmx_asxx_rld_data_drv { ...@@ -294,10 +257,6 @@ union cvmx_asxx_rld_data_drv {
uint64_t reserved_8_63:56; uint64_t reserved_8_63:56;
#endif #endif
} s; } s;
struct cvmx_asxx_rld_data_drv_s cn38xx;
struct cvmx_asxx_rld_data_drv_s cn38xxp2;
struct cvmx_asxx_rld_data_drv_s cn58xx;
struct cvmx_asxx_rld_data_drv_s cn58xxp1;
}; };
union cvmx_asxx_rld_fcram_mode { union cvmx_asxx_rld_fcram_mode {
...@@ -311,8 +270,6 @@ union cvmx_asxx_rld_fcram_mode { ...@@ -311,8 +270,6 @@ union cvmx_asxx_rld_fcram_mode {
uint64_t reserved_1_63:63; uint64_t reserved_1_63:63;
#endif #endif
} s; } s;
struct cvmx_asxx_rld_fcram_mode_s cn38xx;
struct cvmx_asxx_rld_fcram_mode_s cn38xxp2;
}; };
union cvmx_asxx_rld_nctl_strong { union cvmx_asxx_rld_nctl_strong {
...@@ -326,10 +283,6 @@ union cvmx_asxx_rld_nctl_strong { ...@@ -326,10 +283,6 @@ union cvmx_asxx_rld_nctl_strong {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_rld_nctl_strong_s cn38xx;
struct cvmx_asxx_rld_nctl_strong_s cn38xxp2;
struct cvmx_asxx_rld_nctl_strong_s cn58xx;
struct cvmx_asxx_rld_nctl_strong_s cn58xxp1;
}; };
union cvmx_asxx_rld_nctl_weak { union cvmx_asxx_rld_nctl_weak {
...@@ -343,10 +296,6 @@ union cvmx_asxx_rld_nctl_weak { ...@@ -343,10 +296,6 @@ union cvmx_asxx_rld_nctl_weak {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_rld_nctl_weak_s cn38xx;
struct cvmx_asxx_rld_nctl_weak_s cn38xxp2;
struct cvmx_asxx_rld_nctl_weak_s cn58xx;
struct cvmx_asxx_rld_nctl_weak_s cn58xxp1;
}; };
union cvmx_asxx_rld_pctl_strong { union cvmx_asxx_rld_pctl_strong {
...@@ -360,10 +309,6 @@ union cvmx_asxx_rld_pctl_strong { ...@@ -360,10 +309,6 @@ union cvmx_asxx_rld_pctl_strong {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_rld_pctl_strong_s cn38xx;
struct cvmx_asxx_rld_pctl_strong_s cn38xxp2;
struct cvmx_asxx_rld_pctl_strong_s cn58xx;
struct cvmx_asxx_rld_pctl_strong_s cn58xxp1;
}; };
union cvmx_asxx_rld_pctl_weak { union cvmx_asxx_rld_pctl_weak {
...@@ -377,10 +322,6 @@ union cvmx_asxx_rld_pctl_weak { ...@@ -377,10 +322,6 @@ union cvmx_asxx_rld_pctl_weak {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_rld_pctl_weak_s cn38xx;
struct cvmx_asxx_rld_pctl_weak_s cn38xxp2;
struct cvmx_asxx_rld_pctl_weak_s cn58xx;
struct cvmx_asxx_rld_pctl_weak_s cn58xxp1;
}; };
union cvmx_asxx_rld_setting { union cvmx_asxx_rld_setting {
...@@ -411,9 +352,6 @@ union cvmx_asxx_rld_setting { ...@@ -411,9 +352,6 @@ union cvmx_asxx_rld_setting {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} cn38xx; } cn38xx;
struct cvmx_asxx_rld_setting_cn38xx cn38xxp2;
struct cvmx_asxx_rld_setting_s cn58xx;
struct cvmx_asxx_rld_setting_s cn58xxp1;
}; };
union cvmx_asxx_rx_clk_setx { union cvmx_asxx_rx_clk_setx {
...@@ -427,13 +365,6 @@ union cvmx_asxx_rx_clk_setx { ...@@ -427,13 +365,6 @@ union cvmx_asxx_rx_clk_setx {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_rx_clk_setx_s cn30xx;
struct cvmx_asxx_rx_clk_setx_s cn31xx;
struct cvmx_asxx_rx_clk_setx_s cn38xx;
struct cvmx_asxx_rx_clk_setx_s cn38xxp2;
struct cvmx_asxx_rx_clk_setx_s cn50xx;
struct cvmx_asxx_rx_clk_setx_s cn58xx;
struct cvmx_asxx_rx_clk_setx_s cn58xxp1;
}; };
union cvmx_asxx_rx_prt_en { union cvmx_asxx_rx_prt_en {
...@@ -456,12 +387,6 @@ union cvmx_asxx_rx_prt_en { ...@@ -456,12 +387,6 @@ union cvmx_asxx_rx_prt_en {
uint64_t reserved_3_63:61; uint64_t reserved_3_63:61;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_asxx_rx_prt_en_cn30xx cn31xx;
struct cvmx_asxx_rx_prt_en_s cn38xx;
struct cvmx_asxx_rx_prt_en_s cn38xxp2;
struct cvmx_asxx_rx_prt_en_cn30xx cn50xx;
struct cvmx_asxx_rx_prt_en_s cn58xx;
struct cvmx_asxx_rx_prt_en_s cn58xxp1;
}; };
union cvmx_asxx_rx_wol { union cvmx_asxx_rx_wol {
...@@ -477,8 +402,6 @@ union cvmx_asxx_rx_wol { ...@@ -477,8 +402,6 @@ union cvmx_asxx_rx_wol {
uint64_t reserved_2_63:62; uint64_t reserved_2_63:62;
#endif #endif
} s; } s;
struct cvmx_asxx_rx_wol_s cn38xx;
struct cvmx_asxx_rx_wol_s cn38xxp2;
}; };
union cvmx_asxx_rx_wol_msk { union cvmx_asxx_rx_wol_msk {
...@@ -490,8 +413,6 @@ union cvmx_asxx_rx_wol_msk { ...@@ -490,8 +413,6 @@ union cvmx_asxx_rx_wol_msk {
uint64_t msk:64; uint64_t msk:64;
#endif #endif
} s; } s;
struct cvmx_asxx_rx_wol_msk_s cn38xx;
struct cvmx_asxx_rx_wol_msk_s cn38xxp2;
}; };
union cvmx_asxx_rx_wol_powok { union cvmx_asxx_rx_wol_powok {
...@@ -505,8 +426,6 @@ union cvmx_asxx_rx_wol_powok { ...@@ -505,8 +426,6 @@ union cvmx_asxx_rx_wol_powok {
uint64_t reserved_1_63:63; uint64_t reserved_1_63:63;
#endif #endif
} s; } s;
struct cvmx_asxx_rx_wol_powok_s cn38xx;
struct cvmx_asxx_rx_wol_powok_s cn38xxp2;
}; };
union cvmx_asxx_rx_wol_sig { union cvmx_asxx_rx_wol_sig {
...@@ -520,8 +439,6 @@ union cvmx_asxx_rx_wol_sig { ...@@ -520,8 +439,6 @@ union cvmx_asxx_rx_wol_sig {
uint64_t reserved_32_63:32; uint64_t reserved_32_63:32;
#endif #endif
} s; } s;
struct cvmx_asxx_rx_wol_sig_s cn38xx;
struct cvmx_asxx_rx_wol_sig_s cn38xxp2;
}; };
union cvmx_asxx_tx_clk_setx { union cvmx_asxx_tx_clk_setx {
...@@ -535,13 +452,6 @@ union cvmx_asxx_tx_clk_setx { ...@@ -535,13 +452,6 @@ union cvmx_asxx_tx_clk_setx {
uint64_t reserved_5_63:59; uint64_t reserved_5_63:59;
#endif #endif
} s; } s;
struct cvmx_asxx_tx_clk_setx_s cn30xx;
struct cvmx_asxx_tx_clk_setx_s cn31xx;
struct cvmx_asxx_tx_clk_setx_s cn38xx;
struct cvmx_asxx_tx_clk_setx_s cn38xxp2;
struct cvmx_asxx_tx_clk_setx_s cn50xx;
struct cvmx_asxx_tx_clk_setx_s cn58xx;
struct cvmx_asxx_tx_clk_setx_s cn58xxp1;
}; };
union cvmx_asxx_tx_comp_byp { union cvmx_asxx_tx_comp_byp {
...@@ -566,7 +476,6 @@ union cvmx_asxx_tx_comp_byp { ...@@ -566,7 +476,6 @@ union cvmx_asxx_tx_comp_byp {
uint64_t reserved_9_63:55; uint64_t reserved_9_63:55;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_asxx_tx_comp_byp_cn30xx cn31xx;
struct cvmx_asxx_tx_comp_byp_cn38xx { struct cvmx_asxx_tx_comp_byp_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_8_63:56; uint64_t reserved_8_63:56;
...@@ -578,7 +487,6 @@ union cvmx_asxx_tx_comp_byp { ...@@ -578,7 +487,6 @@ union cvmx_asxx_tx_comp_byp {
uint64_t reserved_8_63:56; uint64_t reserved_8_63:56;
#endif #endif
} cn38xx; } cn38xx;
struct cvmx_asxx_tx_comp_byp_cn38xx cn38xxp2;
struct cvmx_asxx_tx_comp_byp_cn50xx { struct cvmx_asxx_tx_comp_byp_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_17_63:47; uint64_t reserved_17_63:47;
...@@ -609,7 +517,6 @@ union cvmx_asxx_tx_comp_byp { ...@@ -609,7 +517,6 @@ union cvmx_asxx_tx_comp_byp {
uint64_t reserved_13_63:51; uint64_t reserved_13_63:51;
#endif #endif
} cn58xx; } cn58xx;
struct cvmx_asxx_tx_comp_byp_cn58xx cn58xxp1;
}; };
union cvmx_asxx_tx_hi_waterx { union cvmx_asxx_tx_hi_waterx {
...@@ -632,12 +539,6 @@ union cvmx_asxx_tx_hi_waterx { ...@@ -632,12 +539,6 @@ union cvmx_asxx_tx_hi_waterx {
uint64_t reserved_3_63:61; uint64_t reserved_3_63:61;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_asxx_tx_hi_waterx_cn30xx cn31xx;
struct cvmx_asxx_tx_hi_waterx_s cn38xx;
struct cvmx_asxx_tx_hi_waterx_s cn38xxp2;
struct cvmx_asxx_tx_hi_waterx_cn30xx cn50xx;
struct cvmx_asxx_tx_hi_waterx_s cn58xx;
struct cvmx_asxx_tx_hi_waterx_s cn58xxp1;
}; };
union cvmx_asxx_tx_prt_en { union cvmx_asxx_tx_prt_en {
...@@ -660,12 +561,6 @@ union cvmx_asxx_tx_prt_en { ...@@ -660,12 +561,6 @@ union cvmx_asxx_tx_prt_en {
uint64_t reserved_3_63:61; uint64_t reserved_3_63:61;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_asxx_tx_prt_en_cn30xx cn31xx;
struct cvmx_asxx_tx_prt_en_s cn38xx;
struct cvmx_asxx_tx_prt_en_s cn38xxp2;
struct cvmx_asxx_tx_prt_en_cn30xx cn50xx;
struct cvmx_asxx_tx_prt_en_s cn58xx;
struct cvmx_asxx_tx_prt_en_s cn58xxp1;
}; };
#endif #endif
...@@ -62,7 +62,6 @@ union cvmx_dbg_data { ...@@ -62,7 +62,6 @@ union cvmx_dbg_data {
uint64_t reserved_31_63:33; uint64_t reserved_31_63:33;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_dbg_data_cn30xx cn31xx;
struct cvmx_dbg_data_cn38xx { struct cvmx_dbg_data_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_29_63:35; uint64_t reserved_29_63:35;
...@@ -82,8 +81,6 @@ union cvmx_dbg_data { ...@@ -82,8 +81,6 @@ union cvmx_dbg_data {
uint64_t reserved_29_63:35; uint64_t reserved_29_63:35;
#endif #endif
} cn38xx; } cn38xx;
struct cvmx_dbg_data_cn38xx cn38xxp2;
struct cvmx_dbg_data_cn30xx cn50xx;
struct cvmx_dbg_data_cn58xx { struct cvmx_dbg_data_cn58xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_29_63:35; uint64_t reserved_29_63:35;
...@@ -99,7 +96,6 @@ union cvmx_dbg_data { ...@@ -99,7 +96,6 @@ union cvmx_dbg_data {
uint64_t reserved_29_63:35; uint64_t reserved_29_63:35;
#endif #endif
} cn58xx; } cn58xx;
struct cvmx_dbg_data_cn58xx cn58xxp1;
}; };
#endif #endif
...@@ -90,10 +90,6 @@ union cvmx_gpio_bit_cfgx { ...@@ -90,10 +90,6 @@ union cvmx_gpio_bit_cfgx {
uint64_t reserved_12_63:52; uint64_t reserved_12_63:52;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_gpio_bit_cfgx_cn30xx cn31xx;
struct cvmx_gpio_bit_cfgx_cn30xx cn38xx;
struct cvmx_gpio_bit_cfgx_cn30xx cn38xxp2;
struct cvmx_gpio_bit_cfgx_cn30xx cn50xx;
struct cvmx_gpio_bit_cfgx_cn52xx { struct cvmx_gpio_bit_cfgx_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_15_63:49; uint64_t reserved_15_63:49;
...@@ -117,20 +113,6 @@ union cvmx_gpio_bit_cfgx { ...@@ -117,20 +113,6 @@ union cvmx_gpio_bit_cfgx {
uint64_t reserved_15_63:49; uint64_t reserved_15_63:49;
#endif #endif
} cn52xx; } cn52xx;
struct cvmx_gpio_bit_cfgx_cn52xx cn52xxp1;
struct cvmx_gpio_bit_cfgx_cn52xx cn56xx;
struct cvmx_gpio_bit_cfgx_cn52xx cn56xxp1;
struct cvmx_gpio_bit_cfgx_cn30xx cn58xx;
struct cvmx_gpio_bit_cfgx_cn30xx cn58xxp1;
struct cvmx_gpio_bit_cfgx_s cn61xx;
struct cvmx_gpio_bit_cfgx_s cn63xx;
struct cvmx_gpio_bit_cfgx_s cn63xxp1;
struct cvmx_gpio_bit_cfgx_s cn66xx;
struct cvmx_gpio_bit_cfgx_s cn68xx;
struct cvmx_gpio_bit_cfgx_s cn68xxp1;
struct cvmx_gpio_bit_cfgx_s cn70xx;
struct cvmx_gpio_bit_cfgx_s cn73xx;
struct cvmx_gpio_bit_cfgx_s cnf71xx;
}; };
union cvmx_gpio_boot_ena { union cvmx_gpio_boot_ena {
...@@ -146,9 +128,6 @@ union cvmx_gpio_boot_ena { ...@@ -146,9 +128,6 @@ union cvmx_gpio_boot_ena {
uint64_t reserved_12_63:52; uint64_t reserved_12_63:52;
#endif #endif
} s; } s;
struct cvmx_gpio_boot_ena_s cn30xx;
struct cvmx_gpio_boot_ena_s cn31xx;
struct cvmx_gpio_boot_ena_s cn50xx;
}; };
union cvmx_gpio_clk_genx { union cvmx_gpio_clk_genx {
...@@ -162,17 +141,6 @@ union cvmx_gpio_clk_genx { ...@@ -162,17 +141,6 @@ union cvmx_gpio_clk_genx {
uint64_t reserved_32_63:32; uint64_t reserved_32_63:32;
#endif #endif
} s; } s;
struct cvmx_gpio_clk_genx_s cn52xx;
struct cvmx_gpio_clk_genx_s cn52xxp1;
struct cvmx_gpio_clk_genx_s cn56xx;
struct cvmx_gpio_clk_genx_s cn56xxp1;
struct cvmx_gpio_clk_genx_s cn61xx;
struct cvmx_gpio_clk_genx_s cn63xx;
struct cvmx_gpio_clk_genx_s cn63xxp1;
struct cvmx_gpio_clk_genx_s cn66xx;
struct cvmx_gpio_clk_genx_s cn68xx;
struct cvmx_gpio_clk_genx_s cn68xxp1;
struct cvmx_gpio_clk_genx_s cnf71xx;
}; };
union cvmx_gpio_clk_qlmx { union cvmx_gpio_clk_qlmx {
...@@ -218,11 +186,6 @@ union cvmx_gpio_clk_qlmx { ...@@ -218,11 +186,6 @@ union cvmx_gpio_clk_qlmx {
uint64_t reserved_3_63:61; uint64_t reserved_3_63:61;
#endif #endif
} cn63xx; } cn63xx;
struct cvmx_gpio_clk_qlmx_cn63xx cn63xxp1;
struct cvmx_gpio_clk_qlmx_cn61xx cn66xx;
struct cvmx_gpio_clk_qlmx_s cn68xx;
struct cvmx_gpio_clk_qlmx_s cn68xxp1;
struct cvmx_gpio_clk_qlmx_cn61xx cnf71xx;
}; };
union cvmx_gpio_dbg_ena { union cvmx_gpio_dbg_ena {
...@@ -236,9 +199,6 @@ union cvmx_gpio_dbg_ena { ...@@ -236,9 +199,6 @@ union cvmx_gpio_dbg_ena {
uint64_t reserved_21_63:43; uint64_t reserved_21_63:43;
#endif #endif
} s; } s;
struct cvmx_gpio_dbg_ena_s cn30xx;
struct cvmx_gpio_dbg_ena_s cn31xx;
struct cvmx_gpio_dbg_ena_s cn50xx;
}; };
union cvmx_gpio_int_clr { union cvmx_gpio_int_clr {
...@@ -252,24 +212,6 @@ union cvmx_gpio_int_clr { ...@@ -252,24 +212,6 @@ union cvmx_gpio_int_clr {
uint64_t reserved_16_63:48; uint64_t reserved_16_63:48;
#endif #endif
} s; } s;
struct cvmx_gpio_int_clr_s cn30xx;
struct cvmx_gpio_int_clr_s cn31xx;
struct cvmx_gpio_int_clr_s cn38xx;
struct cvmx_gpio_int_clr_s cn38xxp2;
struct cvmx_gpio_int_clr_s cn50xx;
struct cvmx_gpio_int_clr_s cn52xx;
struct cvmx_gpio_int_clr_s cn52xxp1;
struct cvmx_gpio_int_clr_s cn56xx;
struct cvmx_gpio_int_clr_s cn56xxp1;
struct cvmx_gpio_int_clr_s cn58xx;
struct cvmx_gpio_int_clr_s cn58xxp1;
struct cvmx_gpio_int_clr_s cn61xx;
struct cvmx_gpio_int_clr_s cn63xx;
struct cvmx_gpio_int_clr_s cn63xxp1;
struct cvmx_gpio_int_clr_s cn66xx;
struct cvmx_gpio_int_clr_s cn68xx;
struct cvmx_gpio_int_clr_s cn68xxp1;
struct cvmx_gpio_int_clr_s cnf71xx;
}; };
union cvmx_gpio_multi_cast { union cvmx_gpio_multi_cast {
...@@ -283,8 +225,6 @@ union cvmx_gpio_multi_cast { ...@@ -283,8 +225,6 @@ union cvmx_gpio_multi_cast {
uint64_t reserved_1_63:63; uint64_t reserved_1_63:63;
#endif #endif
} s; } s;
struct cvmx_gpio_multi_cast_s cn61xx;
struct cvmx_gpio_multi_cast_s cnf71xx;
}; };
union cvmx_gpio_pin_ena { union cvmx_gpio_pin_ena {
...@@ -302,7 +242,6 @@ union cvmx_gpio_pin_ena { ...@@ -302,7 +242,6 @@ union cvmx_gpio_pin_ena {
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
#endif #endif
} s; } s;
struct cvmx_gpio_pin_ena_s cn66xx;
}; };
union cvmx_gpio_rx_dat { union cvmx_gpio_rx_dat {
...@@ -316,8 +255,6 @@ union cvmx_gpio_rx_dat { ...@@ -316,8 +255,6 @@ union cvmx_gpio_rx_dat {
uint64_t reserved_24_63:40; uint64_t reserved_24_63:40;
#endif #endif
} s; } s;
struct cvmx_gpio_rx_dat_s cn30xx;
struct cvmx_gpio_rx_dat_s cn31xx;
struct cvmx_gpio_rx_dat_cn38xx { struct cvmx_gpio_rx_dat_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_16_63:48; uint64_t reserved_16_63:48;
...@@ -327,14 +264,6 @@ union cvmx_gpio_rx_dat { ...@@ -327,14 +264,6 @@ union cvmx_gpio_rx_dat {
uint64_t reserved_16_63:48; uint64_t reserved_16_63:48;
#endif #endif
} cn38xx; } cn38xx;
struct cvmx_gpio_rx_dat_cn38xx cn38xxp2;
struct cvmx_gpio_rx_dat_s cn50xx;
struct cvmx_gpio_rx_dat_cn38xx cn52xx;
struct cvmx_gpio_rx_dat_cn38xx cn52xxp1;
struct cvmx_gpio_rx_dat_cn38xx cn56xx;
struct cvmx_gpio_rx_dat_cn38xx cn56xxp1;
struct cvmx_gpio_rx_dat_cn38xx cn58xx;
struct cvmx_gpio_rx_dat_cn38xx cn58xxp1;
struct cvmx_gpio_rx_dat_cn61xx { struct cvmx_gpio_rx_dat_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
...@@ -344,12 +273,6 @@ union cvmx_gpio_rx_dat { ...@@ -344,12 +273,6 @@ union cvmx_gpio_rx_dat {
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
#endif #endif
} cn61xx; } cn61xx;
struct cvmx_gpio_rx_dat_cn38xx cn63xx;
struct cvmx_gpio_rx_dat_cn38xx cn63xxp1;
struct cvmx_gpio_rx_dat_cn61xx cn66xx;
struct cvmx_gpio_rx_dat_cn38xx cn68xx;
struct cvmx_gpio_rx_dat_cn38xx cn68xxp1;
struct cvmx_gpio_rx_dat_cn61xx cnf71xx;
}; };
union cvmx_gpio_tim_ctl { union cvmx_gpio_tim_ctl {
...@@ -363,8 +286,6 @@ union cvmx_gpio_tim_ctl { ...@@ -363,8 +286,6 @@ union cvmx_gpio_tim_ctl {
uint64_t reserved_4_63:60; uint64_t reserved_4_63:60;
#endif #endif
} s; } s;
struct cvmx_gpio_tim_ctl_s cn68xx;
struct cvmx_gpio_tim_ctl_s cn68xxp1;
}; };
union cvmx_gpio_tx_clr { union cvmx_gpio_tx_clr {
...@@ -378,8 +299,6 @@ union cvmx_gpio_tx_clr { ...@@ -378,8 +299,6 @@ union cvmx_gpio_tx_clr {
uint64_t reserved_24_63:40; uint64_t reserved_24_63:40;
#endif #endif
} s; } s;
struct cvmx_gpio_tx_clr_s cn30xx;
struct cvmx_gpio_tx_clr_s cn31xx;
struct cvmx_gpio_tx_clr_cn38xx { struct cvmx_gpio_tx_clr_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_16_63:48; uint64_t reserved_16_63:48;
...@@ -389,14 +308,6 @@ union cvmx_gpio_tx_clr { ...@@ -389,14 +308,6 @@ union cvmx_gpio_tx_clr {
uint64_t reserved_16_63:48; uint64_t reserved_16_63:48;
#endif #endif
} cn38xx; } cn38xx;
struct cvmx_gpio_tx_clr_cn38xx cn38xxp2;
struct cvmx_gpio_tx_clr_s cn50xx;
struct cvmx_gpio_tx_clr_cn38xx cn52xx;
struct cvmx_gpio_tx_clr_cn38xx cn52xxp1;
struct cvmx_gpio_tx_clr_cn38xx cn56xx;
struct cvmx_gpio_tx_clr_cn38xx cn56xxp1;
struct cvmx_gpio_tx_clr_cn38xx cn58xx;
struct cvmx_gpio_tx_clr_cn38xx cn58xxp1;
struct cvmx_gpio_tx_clr_cn61xx { struct cvmx_gpio_tx_clr_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
...@@ -406,12 +317,6 @@ union cvmx_gpio_tx_clr { ...@@ -406,12 +317,6 @@ union cvmx_gpio_tx_clr {
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
#endif #endif
} cn61xx; } cn61xx;
struct cvmx_gpio_tx_clr_cn38xx cn63xx;
struct cvmx_gpio_tx_clr_cn38xx cn63xxp1;
struct cvmx_gpio_tx_clr_cn61xx cn66xx;
struct cvmx_gpio_tx_clr_cn38xx cn68xx;
struct cvmx_gpio_tx_clr_cn38xx cn68xxp1;
struct cvmx_gpio_tx_clr_cn61xx cnf71xx;
}; };
union cvmx_gpio_tx_set { union cvmx_gpio_tx_set {
...@@ -425,8 +330,6 @@ union cvmx_gpio_tx_set { ...@@ -425,8 +330,6 @@ union cvmx_gpio_tx_set {
uint64_t reserved_24_63:40; uint64_t reserved_24_63:40;
#endif #endif
} s; } s;
struct cvmx_gpio_tx_set_s cn30xx;
struct cvmx_gpio_tx_set_s cn31xx;
struct cvmx_gpio_tx_set_cn38xx { struct cvmx_gpio_tx_set_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_16_63:48; uint64_t reserved_16_63:48;
...@@ -436,14 +339,6 @@ union cvmx_gpio_tx_set { ...@@ -436,14 +339,6 @@ union cvmx_gpio_tx_set {
uint64_t reserved_16_63:48; uint64_t reserved_16_63:48;
#endif #endif
} cn38xx; } cn38xx;
struct cvmx_gpio_tx_set_cn38xx cn38xxp2;
struct cvmx_gpio_tx_set_s cn50xx;
struct cvmx_gpio_tx_set_cn38xx cn52xx;
struct cvmx_gpio_tx_set_cn38xx cn52xxp1;
struct cvmx_gpio_tx_set_cn38xx cn56xx;
struct cvmx_gpio_tx_set_cn38xx cn56xxp1;
struct cvmx_gpio_tx_set_cn38xx cn58xx;
struct cvmx_gpio_tx_set_cn38xx cn58xxp1;
struct cvmx_gpio_tx_set_cn61xx { struct cvmx_gpio_tx_set_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
...@@ -453,12 +348,6 @@ union cvmx_gpio_tx_set { ...@@ -453,12 +348,6 @@ union cvmx_gpio_tx_set {
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
#endif #endif
} cn61xx; } cn61xx;
struct cvmx_gpio_tx_set_cn38xx cn63xx;
struct cvmx_gpio_tx_set_cn38xx cn63xxp1;
struct cvmx_gpio_tx_set_cn61xx cn66xx;
struct cvmx_gpio_tx_set_cn38xx cn68xx;
struct cvmx_gpio_tx_set_cn38xx cn68xxp1;
struct cvmx_gpio_tx_set_cn61xx cnf71xx;
}; };
union cvmx_gpio_xbit_cfgx { union cvmx_gpio_xbit_cfgx {
...@@ -505,11 +394,6 @@ union cvmx_gpio_xbit_cfgx { ...@@ -505,11 +394,6 @@ union cvmx_gpio_xbit_cfgx {
uint64_t reserved_12_63:52; uint64_t reserved_12_63:52;
#endif #endif
} cn30xx; } cn30xx;
struct cvmx_gpio_xbit_cfgx_cn30xx cn31xx;
struct cvmx_gpio_xbit_cfgx_cn30xx cn50xx;
struct cvmx_gpio_xbit_cfgx_s cn61xx;
struct cvmx_gpio_xbit_cfgx_s cn66xx;
struct cvmx_gpio_xbit_cfgx_s cnf71xx;
}; };
#endif #endif
...@@ -104,7 +104,6 @@ union cvmx_l2t_err { ...@@ -104,7 +104,6 @@ union cvmx_l2t_err {
__BITFIELD_FIELD(uint64_t ecc_ena:1, __BITFIELD_FIELD(uint64_t ecc_ena:1,
;))))))))))))) ;)))))))))))))
} cn38xx; } cn38xx;
struct cvmx_l2t_err_cn38xx cn38xxp2;
struct cvmx_l2t_err_cn50xx { struct cvmx_l2t_err_cn50xx {
__BITFIELD_FIELD(uint64_t reserved_28_63:36, __BITFIELD_FIELD(uint64_t reserved_28_63:36,
__BITFIELD_FIELD(uint64_t lck_intena2:1, __BITFIELD_FIELD(uint64_t lck_intena2:1,
...@@ -139,11 +138,6 @@ union cvmx_l2t_err { ...@@ -139,11 +138,6 @@ union cvmx_l2t_err {
__BITFIELD_FIELD(uint64_t ecc_ena:1, __BITFIELD_FIELD(uint64_t ecc_ena:1,
;)))))))))))))) ;))))))))))))))
} cn52xx; } cn52xx;
struct cvmx_l2t_err_cn52xx cn52xxp1;
struct cvmx_l2t_err_s cn56xx;
struct cvmx_l2t_err_s cn56xxp1;
struct cvmx_l2t_err_s cn58xx;
struct cvmx_l2t_err_s cn58xxp1;
}; };
#endif #endif
...@@ -53,12 +53,6 @@ union cvmx_led_blink { ...@@ -53,12 +53,6 @@ union cvmx_led_blink {
uint64_t reserved_8_63:56; uint64_t reserved_8_63:56;
#endif #endif
} s; } s;
struct cvmx_led_blink_s cn38xx;
struct cvmx_led_blink_s cn38xxp2;
struct cvmx_led_blink_s cn56xx;
struct cvmx_led_blink_s cn56xxp1;
struct cvmx_led_blink_s cn58xx;
struct cvmx_led_blink_s cn58xxp1;
}; };
union cvmx_led_clk_phase { union cvmx_led_clk_phase {
...@@ -72,12 +66,6 @@ union cvmx_led_clk_phase { ...@@ -72,12 +66,6 @@ union cvmx_led_clk_phase {
uint64_t reserved_7_63:57; uint64_t reserved_7_63:57;
#endif #endif
} s; } s;
struct cvmx_led_clk_phase_s cn38xx;
struct cvmx_led_clk_phase_s cn38xxp2;
struct cvmx_led_clk_phase_s cn56xx;
struct cvmx_led_clk_phase_s cn56xxp1;
struct cvmx_led_clk_phase_s cn58xx;
struct cvmx_led_clk_phase_s cn58xxp1;
}; };
union cvmx_led_cylon { union cvmx_led_cylon {
...@@ -91,12 +79,6 @@ union cvmx_led_cylon { ...@@ -91,12 +79,6 @@ union cvmx_led_cylon {
uint64_t reserved_16_63:48; uint64_t reserved_16_63:48;
#endif #endif
} s; } s;
struct cvmx_led_cylon_s cn38xx;
struct cvmx_led_cylon_s cn38xxp2;
struct cvmx_led_cylon_s cn56xx;
struct cvmx_led_cylon_s cn56xxp1;
struct cvmx_led_cylon_s cn58xx;
struct cvmx_led_cylon_s cn58xxp1;
}; };
union cvmx_led_dbg { union cvmx_led_dbg {
...@@ -110,12 +92,6 @@ union cvmx_led_dbg { ...@@ -110,12 +92,6 @@ union cvmx_led_dbg {
uint64_t reserved_1_63:63; uint64_t reserved_1_63:63;
#endif #endif
} s; } s;
struct cvmx_led_dbg_s cn38xx;
struct cvmx_led_dbg_s cn38xxp2;
struct cvmx_led_dbg_s cn56xx;
struct cvmx_led_dbg_s cn56xxp1;
struct cvmx_led_dbg_s cn58xx;
struct cvmx_led_dbg_s cn58xxp1;
}; };
union cvmx_led_en { union cvmx_led_en {
...@@ -129,12 +105,6 @@ union cvmx_led_en { ...@@ -129,12 +105,6 @@ union cvmx_led_en {
uint64_t reserved_1_63:63; uint64_t reserved_1_63:63;
#endif #endif
} s; } s;
struct cvmx_led_en_s cn38xx;
struct cvmx_led_en_s cn38xxp2;
struct cvmx_led_en_s cn56xx;
struct cvmx_led_en_s cn56xxp1;
struct cvmx_led_en_s cn58xx;
struct cvmx_led_en_s cn58xxp1;
}; };
union cvmx_led_polarity { union cvmx_led_polarity {
...@@ -148,12 +118,6 @@ union cvmx_led_polarity { ...@@ -148,12 +118,6 @@ union cvmx_led_polarity {
uint64_t reserved_1_63:63; uint64_t reserved_1_63:63;
#endif #endif
} s; } s;
struct cvmx_led_polarity_s cn38xx;
struct cvmx_led_polarity_s cn38xxp2;
struct cvmx_led_polarity_s cn56xx;
struct cvmx_led_polarity_s cn56xxp1;
struct cvmx_led_polarity_s cn58xx;
struct cvmx_led_polarity_s cn58xxp1;
}; };
union cvmx_led_prt { union cvmx_led_prt {
...@@ -167,12 +131,6 @@ union cvmx_led_prt { ...@@ -167,12 +131,6 @@ union cvmx_led_prt {
uint64_t reserved_8_63:56; uint64_t reserved_8_63:56;
#endif #endif
} s; } s;
struct cvmx_led_prt_s cn38xx;
struct cvmx_led_prt_s cn38xxp2;
struct cvmx_led_prt_s cn56xx;
struct cvmx_led_prt_s cn56xxp1;
struct cvmx_led_prt_s cn58xx;
struct cvmx_led_prt_s cn58xxp1;
}; };
union cvmx_led_prt_fmt { union cvmx_led_prt_fmt {
...@@ -186,12 +144,6 @@ union cvmx_led_prt_fmt { ...@@ -186,12 +144,6 @@ union cvmx_led_prt_fmt {
uint64_t reserved_4_63:60; uint64_t reserved_4_63:60;
#endif #endif
} s; } s;
struct cvmx_led_prt_fmt_s cn38xx;
struct cvmx_led_prt_fmt_s cn38xxp2;
struct cvmx_led_prt_fmt_s cn56xx;
struct cvmx_led_prt_fmt_s cn56xxp1;
struct cvmx_led_prt_fmt_s cn58xx;
struct cvmx_led_prt_fmt_s cn58xxp1;
}; };
union cvmx_led_prt_statusx { union cvmx_led_prt_statusx {
...@@ -205,12 +157,6 @@ union cvmx_led_prt_statusx { ...@@ -205,12 +157,6 @@ union cvmx_led_prt_statusx {
uint64_t reserved_6_63:58; uint64_t reserved_6_63:58;
#endif #endif
} s; } s;
struct cvmx_led_prt_statusx_s cn38xx;
struct cvmx_led_prt_statusx_s cn38xxp2;
struct cvmx_led_prt_statusx_s cn56xx;
struct cvmx_led_prt_statusx_s cn56xxp1;
struct cvmx_led_prt_statusx_s cn58xx;
struct cvmx_led_prt_statusx_s cn58xxp1;
}; };
union cvmx_led_udd_cntx { union cvmx_led_udd_cntx {
...@@ -224,12 +170,6 @@ union cvmx_led_udd_cntx { ...@@ -224,12 +170,6 @@ union cvmx_led_udd_cntx {
uint64_t reserved_6_63:58; uint64_t reserved_6_63:58;
#endif #endif
} s; } s;
struct cvmx_led_udd_cntx_s cn38xx;
struct cvmx_led_udd_cntx_s cn38xxp2;
struct cvmx_led_udd_cntx_s cn56xx;
struct cvmx_led_udd_cntx_s cn56xxp1;
struct cvmx_led_udd_cntx_s cn58xx;
struct cvmx_led_udd_cntx_s cn58xxp1;
}; };
union cvmx_led_udd_datx { union cvmx_led_udd_datx {
...@@ -243,12 +183,6 @@ union cvmx_led_udd_datx { ...@@ -243,12 +183,6 @@ union cvmx_led_udd_datx {
uint64_t reserved_32_63:32; uint64_t reserved_32_63:32;
#endif #endif
} s; } s;
struct cvmx_led_udd_datx_s cn38xx;
struct cvmx_led_udd_datx_s cn38xxp2;
struct cvmx_led_udd_datx_s cn56xx;
struct cvmx_led_udd_datx_s cn56xxp1;
struct cvmx_led_udd_datx_s cn58xx;
struct cvmx_led_udd_datx_s cn58xxp1;
}; };
union cvmx_led_udd_dat_clrx { union cvmx_led_udd_dat_clrx {
...@@ -262,12 +196,6 @@ union cvmx_led_udd_dat_clrx { ...@@ -262,12 +196,6 @@ union cvmx_led_udd_dat_clrx {
uint64_t reserved_32_63:32; uint64_t reserved_32_63:32;
#endif #endif
} s; } s;
struct cvmx_led_udd_dat_clrx_s cn38xx;
struct cvmx_led_udd_dat_clrx_s cn38xxp2;
struct cvmx_led_udd_dat_clrx_s cn56xx;
struct cvmx_led_udd_dat_clrx_s cn56xxp1;
struct cvmx_led_udd_dat_clrx_s cn58xx;
struct cvmx_led_udd_dat_clrx_s cn58xxp1;
}; };
union cvmx_led_udd_dat_setx { union cvmx_led_udd_dat_setx {
...@@ -281,12 +209,6 @@ union cvmx_led_udd_dat_setx { ...@@ -281,12 +209,6 @@ union cvmx_led_udd_dat_setx {
uint64_t reserved_32_63:32; uint64_t reserved_32_63:32;
#endif #endif
} s; } s;
struct cvmx_led_udd_dat_setx_s cn38xx;
struct cvmx_led_udd_dat_setx_s cn38xxp2;
struct cvmx_led_udd_dat_setx_s cn56xx;
struct cvmx_led_udd_dat_setx_s cn56xxp1;
struct cvmx_led_udd_dat_setx_s cn58xx;
struct cvmx_led_udd_dat_setx_s cn58xxp1;
}; };
#endif #endif
...@@ -80,15 +80,6 @@ union cvmx_mixx_bist { ...@@ -80,15 +80,6 @@ union cvmx_mixx_bist {
uint64_t reserved_4_63:60; uint64_t reserved_4_63:60;
#endif #endif
} cn52xx; } cn52xx;
struct cvmx_mixx_bist_cn52xx cn52xxp1;
struct cvmx_mixx_bist_cn52xx cn56xx;
struct cvmx_mixx_bist_cn52xx cn56xxp1;
struct cvmx_mixx_bist_s cn61xx;
struct cvmx_mixx_bist_s cn63xx;
struct cvmx_mixx_bist_s cn63xxp1;
struct cvmx_mixx_bist_s cn66xx;
struct cvmx_mixx_bist_s cn68xx;
struct cvmx_mixx_bist_s cn68xxp1;
}; };
union cvmx_mixx_ctl { union cvmx_mixx_ctl {
...@@ -137,15 +128,6 @@ union cvmx_mixx_ctl { ...@@ -137,15 +128,6 @@ union cvmx_mixx_ctl {
uint64_t reserved_8_63:56; uint64_t reserved_8_63:56;
#endif #endif
} cn52xx; } cn52xx;
struct cvmx_mixx_ctl_cn52xx cn52xxp1;
struct cvmx_mixx_ctl_cn52xx cn56xx;
struct cvmx_mixx_ctl_cn52xx cn56xxp1;
struct cvmx_mixx_ctl_s cn61xx;
struct cvmx_mixx_ctl_s cn63xx;
struct cvmx_mixx_ctl_s cn63xxp1;
struct cvmx_mixx_ctl_s cn66xx;
struct cvmx_mixx_ctl_s cn68xx;
struct cvmx_mixx_ctl_s cn68xxp1;
}; };
union cvmx_mixx_intena { union cvmx_mixx_intena {
...@@ -194,15 +176,6 @@ union cvmx_mixx_intena { ...@@ -194,15 +176,6 @@ union cvmx_mixx_intena {
uint64_t reserved_7_63:57; uint64_t reserved_7_63:57;
#endif #endif
} cn52xx; } cn52xx;
struct cvmx_mixx_intena_cn52xx cn52xxp1;
struct cvmx_mixx_intena_cn52xx cn56xx;
struct cvmx_mixx_intena_cn52xx cn56xxp1;
struct cvmx_mixx_intena_s cn61xx;
struct cvmx_mixx_intena_s cn63xx;
struct cvmx_mixx_intena_s cn63xxp1;
struct cvmx_mixx_intena_s cn66xx;
struct cvmx_mixx_intena_s cn68xx;
struct cvmx_mixx_intena_s cn68xxp1;
}; };
union cvmx_mixx_ircnt { union cvmx_mixx_ircnt {
...@@ -216,16 +189,6 @@ union cvmx_mixx_ircnt { ...@@ -216,16 +189,6 @@ union cvmx_mixx_ircnt {
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
#endif #endif
} s; } s;
struct cvmx_mixx_ircnt_s cn52xx;
struct cvmx_mixx_ircnt_s cn52xxp1;
struct cvmx_mixx_ircnt_s cn56xx;
struct cvmx_mixx_ircnt_s cn56xxp1;
struct cvmx_mixx_ircnt_s cn61xx;
struct cvmx_mixx_ircnt_s cn63xx;
struct cvmx_mixx_ircnt_s cn63xxp1;
struct cvmx_mixx_ircnt_s cn66xx;
struct cvmx_mixx_ircnt_s cn68xx;
struct cvmx_mixx_ircnt_s cn68xxp1;
}; };
union cvmx_mixx_irhwm { union cvmx_mixx_irhwm {
...@@ -241,16 +204,6 @@ union cvmx_mixx_irhwm { ...@@ -241,16 +204,6 @@ union cvmx_mixx_irhwm {
uint64_t reserved_40_63:24; uint64_t reserved_40_63:24;
#endif #endif
} s; } s;
struct cvmx_mixx_irhwm_s cn52xx;
struct cvmx_mixx_irhwm_s cn52xxp1;
struct cvmx_mixx_irhwm_s cn56xx;
struct cvmx_mixx_irhwm_s cn56xxp1;
struct cvmx_mixx_irhwm_s cn61xx;
struct cvmx_mixx_irhwm_s cn63xx;
struct cvmx_mixx_irhwm_s cn63xxp1;
struct cvmx_mixx_irhwm_s cn66xx;
struct cvmx_mixx_irhwm_s cn68xx;
struct cvmx_mixx_irhwm_s cn68xxp1;
}; };
union cvmx_mixx_iring1 { union cvmx_mixx_iring1 {
...@@ -283,15 +236,6 @@ union cvmx_mixx_iring1 { ...@@ -283,15 +236,6 @@ union cvmx_mixx_iring1 {
uint64_t reserved_60_63:4; uint64_t reserved_60_63:4;
#endif #endif
} cn52xx; } cn52xx;
struct cvmx_mixx_iring1_cn52xx cn52xxp1;
struct cvmx_mixx_iring1_cn52xx cn56xx;
struct cvmx_mixx_iring1_cn52xx cn56xxp1;
struct cvmx_mixx_iring1_s cn61xx;
struct cvmx_mixx_iring1_s cn63xx;
struct cvmx_mixx_iring1_s cn63xxp1;
struct cvmx_mixx_iring1_s cn66xx;
struct cvmx_mixx_iring1_s cn68xx;
struct cvmx_mixx_iring1_s cn68xxp1;
}; };
union cvmx_mixx_iring2 { union cvmx_mixx_iring2 {
...@@ -309,16 +253,6 @@ union cvmx_mixx_iring2 { ...@@ -309,16 +253,6 @@ union cvmx_mixx_iring2 {
uint64_t reserved_52_63:12; uint64_t reserved_52_63:12;
#endif #endif
} s; } s;
struct cvmx_mixx_iring2_s cn52xx;
struct cvmx_mixx_iring2_s cn52xxp1;
struct cvmx_mixx_iring2_s cn56xx;
struct cvmx_mixx_iring2_s cn56xxp1;
struct cvmx_mixx_iring2_s cn61xx;
struct cvmx_mixx_iring2_s cn63xx;
struct cvmx_mixx_iring2_s cn63xxp1;
struct cvmx_mixx_iring2_s cn66xx;
struct cvmx_mixx_iring2_s cn68xx;
struct cvmx_mixx_iring2_s cn68xxp1;
}; };
union cvmx_mixx_isr { union cvmx_mixx_isr {
...@@ -367,15 +301,6 @@ union cvmx_mixx_isr { ...@@ -367,15 +301,6 @@ union cvmx_mixx_isr {
uint64_t reserved_7_63:57; uint64_t reserved_7_63:57;
#endif #endif
} cn52xx; } cn52xx;
struct cvmx_mixx_isr_cn52xx cn52xxp1;
struct cvmx_mixx_isr_cn52xx cn56xx;
struct cvmx_mixx_isr_cn52xx cn56xxp1;
struct cvmx_mixx_isr_s cn61xx;
struct cvmx_mixx_isr_s cn63xx;
struct cvmx_mixx_isr_s cn63xxp1;
struct cvmx_mixx_isr_s cn66xx;
struct cvmx_mixx_isr_s cn68xx;
struct cvmx_mixx_isr_s cn68xxp1;
}; };
union cvmx_mixx_orcnt { union cvmx_mixx_orcnt {
...@@ -389,16 +314,6 @@ union cvmx_mixx_orcnt { ...@@ -389,16 +314,6 @@ union cvmx_mixx_orcnt {
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
#endif #endif
} s; } s;
struct cvmx_mixx_orcnt_s cn52xx;
struct cvmx_mixx_orcnt_s cn52xxp1;
struct cvmx_mixx_orcnt_s cn56xx;
struct cvmx_mixx_orcnt_s cn56xxp1;
struct cvmx_mixx_orcnt_s cn61xx;
struct cvmx_mixx_orcnt_s cn63xx;
struct cvmx_mixx_orcnt_s cn63xxp1;
struct cvmx_mixx_orcnt_s cn66xx;
struct cvmx_mixx_orcnt_s cn68xx;
struct cvmx_mixx_orcnt_s cn68xxp1;
}; };
union cvmx_mixx_orhwm { union cvmx_mixx_orhwm {
...@@ -412,16 +327,6 @@ union cvmx_mixx_orhwm { ...@@ -412,16 +327,6 @@ union cvmx_mixx_orhwm {
uint64_t reserved_20_63:44; uint64_t reserved_20_63:44;
#endif #endif
} s; } s;
struct cvmx_mixx_orhwm_s cn52xx;
struct cvmx_mixx_orhwm_s cn52xxp1;
struct cvmx_mixx_orhwm_s cn56xx;
struct cvmx_mixx_orhwm_s cn56xxp1;
struct cvmx_mixx_orhwm_s cn61xx;
struct cvmx_mixx_orhwm_s cn63xx;
struct cvmx_mixx_orhwm_s cn63xxp1;
struct cvmx_mixx_orhwm_s cn66xx;
struct cvmx_mixx_orhwm_s cn68xx;
struct cvmx_mixx_orhwm_s cn68xxp1;
}; };
union cvmx_mixx_oring1 { union cvmx_mixx_oring1 {
...@@ -454,15 +359,6 @@ union cvmx_mixx_oring1 { ...@@ -454,15 +359,6 @@ union cvmx_mixx_oring1 {
uint64_t reserved_60_63:4; uint64_t reserved_60_63:4;
#endif #endif
} cn52xx; } cn52xx;
struct cvmx_mixx_oring1_cn52xx cn52xxp1;
struct cvmx_mixx_oring1_cn52xx cn56xx;
struct cvmx_mixx_oring1_cn52xx cn56xxp1;
struct cvmx_mixx_oring1_s cn61xx;
struct cvmx_mixx_oring1_s cn63xx;
struct cvmx_mixx_oring1_s cn63xxp1;
struct cvmx_mixx_oring1_s cn66xx;
struct cvmx_mixx_oring1_s cn68xx;
struct cvmx_mixx_oring1_s cn68xxp1;
}; };
union cvmx_mixx_oring2 { union cvmx_mixx_oring2 {
...@@ -480,16 +376,6 @@ union cvmx_mixx_oring2 { ...@@ -480,16 +376,6 @@ union cvmx_mixx_oring2 {
uint64_t reserved_52_63:12; uint64_t reserved_52_63:12;
#endif #endif
} s; } s;
struct cvmx_mixx_oring2_s cn52xx;
struct cvmx_mixx_oring2_s cn52xxp1;
struct cvmx_mixx_oring2_s cn56xx;
struct cvmx_mixx_oring2_s cn56xxp1;
struct cvmx_mixx_oring2_s cn61xx;
struct cvmx_mixx_oring2_s cn63xx;
struct cvmx_mixx_oring2_s cn63xxp1;
struct cvmx_mixx_oring2_s cn66xx;
struct cvmx_mixx_oring2_s cn68xx;
struct cvmx_mixx_oring2_s cn68xxp1;
}; };
union cvmx_mixx_remcnt { union cvmx_mixx_remcnt {
...@@ -507,16 +393,6 @@ union cvmx_mixx_remcnt { ...@@ -507,16 +393,6 @@ union cvmx_mixx_remcnt {
uint64_t reserved_52_63:12; uint64_t reserved_52_63:12;
#endif #endif
} s; } s;
struct cvmx_mixx_remcnt_s cn52xx;
struct cvmx_mixx_remcnt_s cn52xxp1;
struct cvmx_mixx_remcnt_s cn56xx;
struct cvmx_mixx_remcnt_s cn56xxp1;
struct cvmx_mixx_remcnt_s cn61xx;
struct cvmx_mixx_remcnt_s cn63xx;
struct cvmx_mixx_remcnt_s cn63xxp1;
struct cvmx_mixx_remcnt_s cn66xx;
struct cvmx_mixx_remcnt_s cn68xx;
struct cvmx_mixx_remcnt_s cn68xxp1;
}; };
union cvmx_mixx_tsctl { union cvmx_mixx_tsctl {
...@@ -538,12 +414,6 @@ union cvmx_mixx_tsctl { ...@@ -538,12 +414,6 @@ union cvmx_mixx_tsctl {
uint64_t reserved_21_63:43; uint64_t reserved_21_63:43;
#endif #endif
} s; } s;
struct cvmx_mixx_tsctl_s cn61xx;
struct cvmx_mixx_tsctl_s cn63xx;
struct cvmx_mixx_tsctl_s cn63xxp1;
struct cvmx_mixx_tsctl_s cn66xx;
struct cvmx_mixx_tsctl_s cn68xx;
struct cvmx_mixx_tsctl_s cn68xxp1;
}; };
union cvmx_mixx_tstamp { union cvmx_mixx_tstamp {
...@@ -555,12 +425,6 @@ union cvmx_mixx_tstamp { ...@@ -555,12 +425,6 @@ union cvmx_mixx_tstamp {
uint64_t tstamp:64; uint64_t tstamp:64;
#endif #endif
} s; } s;
struct cvmx_mixx_tstamp_s cn61xx;
struct cvmx_mixx_tstamp_s cn63xx;
struct cvmx_mixx_tstamp_s cn63xxp1;
struct cvmx_mixx_tstamp_s cn66xx;
struct cvmx_mixx_tstamp_s cn68xx;
struct cvmx_mixx_tstamp_s cn68xxp1;
}; };
#endif #endif
...@@ -80,7 +80,6 @@ union cvmx_pescx_bist_status { ...@@ -80,7 +80,6 @@ union cvmx_pescx_bist_status {
uint64_t reserved_13_63:51; uint64_t reserved_13_63:51;
#endif #endif
} s; } s;
struct cvmx_pescx_bist_status_s cn52xx;
struct cvmx_pescx_bist_status_cn52xxp1 { struct cvmx_pescx_bist_status_cn52xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_12_63:52; uint64_t reserved_12_63:52;
...@@ -112,8 +111,6 @@ union cvmx_pescx_bist_status { ...@@ -112,8 +111,6 @@ union cvmx_pescx_bist_status {
uint64_t reserved_12_63:52; uint64_t reserved_12_63:52;
#endif #endif
} cn52xxp1; } cn52xxp1;
struct cvmx_pescx_bist_status_s cn56xx;
struct cvmx_pescx_bist_status_cn52xxp1 cn56xxp1;
}; };
union cvmx_pescx_bist_status2 { union cvmx_pescx_bist_status2 {
...@@ -153,10 +150,6 @@ union cvmx_pescx_bist_status2 { ...@@ -153,10 +150,6 @@ union cvmx_pescx_bist_status2 {
uint64_t reserved_14_63:50; uint64_t reserved_14_63:50;
#endif #endif
} s; } s;
struct cvmx_pescx_bist_status2_s cn52xx;
struct cvmx_pescx_bist_status2_s cn52xxp1;
struct cvmx_pescx_bist_status2_s cn56xx;
struct cvmx_pescx_bist_status2_s cn56xxp1;
}; };
union cvmx_pescx_cfg_rd { union cvmx_pescx_cfg_rd {
...@@ -170,10 +163,6 @@ union cvmx_pescx_cfg_rd { ...@@ -170,10 +163,6 @@ union cvmx_pescx_cfg_rd {
uint64_t data:32; uint64_t data:32;
#endif #endif
} s; } s;
struct cvmx_pescx_cfg_rd_s cn52xx;
struct cvmx_pescx_cfg_rd_s cn52xxp1;
struct cvmx_pescx_cfg_rd_s cn56xx;
struct cvmx_pescx_cfg_rd_s cn56xxp1;
}; };
union cvmx_pescx_cfg_wr { union cvmx_pescx_cfg_wr {
...@@ -187,10 +176,6 @@ union cvmx_pescx_cfg_wr { ...@@ -187,10 +176,6 @@ union cvmx_pescx_cfg_wr {
uint64_t data:32; uint64_t data:32;
#endif #endif
} s; } s;
struct cvmx_pescx_cfg_wr_s cn52xx;
struct cvmx_pescx_cfg_wr_s cn52xxp1;
struct cvmx_pescx_cfg_wr_s cn56xx;
struct cvmx_pescx_cfg_wr_s cn56xxp1;
}; };
union cvmx_pescx_cpl_lut_valid { union cvmx_pescx_cpl_lut_valid {
...@@ -204,10 +189,6 @@ union cvmx_pescx_cpl_lut_valid { ...@@ -204,10 +189,6 @@ union cvmx_pescx_cpl_lut_valid {
uint64_t reserved_32_63:32; uint64_t reserved_32_63:32;
#endif #endif
} s; } s;
struct cvmx_pescx_cpl_lut_valid_s cn52xx;
struct cvmx_pescx_cpl_lut_valid_s cn52xxp1;
struct cvmx_pescx_cpl_lut_valid_s cn56xx;
struct cvmx_pescx_cpl_lut_valid_s cn56xxp1;
}; };
union cvmx_pescx_ctl_status { union cvmx_pescx_ctl_status {
...@@ -249,8 +230,6 @@ union cvmx_pescx_ctl_status { ...@@ -249,8 +230,6 @@ union cvmx_pescx_ctl_status {
uint64_t reserved_28_63:36; uint64_t reserved_28_63:36;
#endif #endif
} s; } s;
struct cvmx_pescx_ctl_status_s cn52xx;
struct cvmx_pescx_ctl_status_s cn52xxp1;
struct cvmx_pescx_ctl_status_cn56xx { struct cvmx_pescx_ctl_status_cn56xx {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_28_63:36; uint64_t reserved_28_63:36;
...@@ -288,7 +267,6 @@ union cvmx_pescx_ctl_status { ...@@ -288,7 +267,6 @@ union cvmx_pescx_ctl_status {
uint64_t reserved_28_63:36; uint64_t reserved_28_63:36;
#endif #endif
} cn56xx; } cn56xx;
struct cvmx_pescx_ctl_status_cn56xx cn56xxp1;
}; };
union cvmx_pescx_ctl_status2 { union cvmx_pescx_ctl_status2 {
...@@ -304,7 +282,6 @@ union cvmx_pescx_ctl_status2 { ...@@ -304,7 +282,6 @@ union cvmx_pescx_ctl_status2 {
uint64_t reserved_2_63:62; uint64_t reserved_2_63:62;
#endif #endif
} s; } s;
struct cvmx_pescx_ctl_status2_s cn52xx;
struct cvmx_pescx_ctl_status2_cn52xxp1 { struct cvmx_pescx_ctl_status2_cn52xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD #ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_1_63:63; uint64_t reserved_1_63:63;
...@@ -314,8 +291,6 @@ union cvmx_pescx_ctl_status2 { ...@@ -314,8 +291,6 @@ union cvmx_pescx_ctl_status2 {
uint64_t reserved_1_63:63; uint64_t reserved_1_63:63;
#endif #endif
} cn52xxp1; } cn52xxp1;
struct cvmx_pescx_ctl_status2_s cn56xx;
struct cvmx_pescx_ctl_status2_cn52xxp1 cn56xxp1;
}; };
union cvmx_pescx_dbg_info { union cvmx_pescx_dbg_info {
...@@ -389,10 +364,6 @@ union cvmx_pescx_dbg_info { ...@@ -389,10 +364,6 @@ union cvmx_pescx_dbg_info {
uint64_t reserved_31_63:33; uint64_t reserved_31_63:33;
#endif #endif
} s; } s;
struct cvmx_pescx_dbg_info_s cn52xx;
struct cvmx_pescx_dbg_info_s cn52xxp1;
struct cvmx_pescx_dbg_info_s cn56xx;
struct cvmx_pescx_dbg_info_s cn56xxp1;
}; };
union cvmx_pescx_dbg_info_en { union cvmx_pescx_dbg_info_en {
...@@ -466,10 +437,6 @@ union cvmx_pescx_dbg_info_en { ...@@ -466,10 +437,6 @@ union cvmx_pescx_dbg_info_en {
uint64_t reserved_31_63:33; uint64_t reserved_31_63:33;
#endif #endif
} s; } s;
struct cvmx_pescx_dbg_info_en_s cn52xx;
struct cvmx_pescx_dbg_info_en_s cn52xxp1;
struct cvmx_pescx_dbg_info_en_s cn56xx;
struct cvmx_pescx_dbg_info_en_s cn56xxp1;
}; };
union cvmx_pescx_diag_status { union cvmx_pescx_diag_status {
...@@ -489,10 +456,6 @@ union cvmx_pescx_diag_status { ...@@ -489,10 +456,6 @@ union cvmx_pescx_diag_status {
uint64_t reserved_4_63:60; uint64_t reserved_4_63:60;
#endif #endif
} s; } s;
struct cvmx_pescx_diag_status_s cn52xx;
struct cvmx_pescx_diag_status_s cn52xxp1;
struct cvmx_pescx_diag_status_s cn56xx;
struct cvmx_pescx_diag_status_s cn56xxp1;
}; };
union cvmx_pescx_p2n_bar0_start { union cvmx_pescx_p2n_bar0_start {
...@@ -506,10 +469,6 @@ union cvmx_pescx_p2n_bar0_start { ...@@ -506,10 +469,6 @@ union cvmx_pescx_p2n_bar0_start {
uint64_t addr:50; uint64_t addr:50;
#endif #endif
} s; } s;
struct cvmx_pescx_p2n_bar0_start_s cn52xx;
struct cvmx_pescx_p2n_bar0_start_s cn52xxp1;
struct cvmx_pescx_p2n_bar0_start_s cn56xx;
struct cvmx_pescx_p2n_bar0_start_s cn56xxp1;
}; };
union cvmx_pescx_p2n_bar1_start { union cvmx_pescx_p2n_bar1_start {
...@@ -523,10 +482,6 @@ union cvmx_pescx_p2n_bar1_start { ...@@ -523,10 +482,6 @@ union cvmx_pescx_p2n_bar1_start {
uint64_t addr:38; uint64_t addr:38;
#endif #endif
} s; } s;
struct cvmx_pescx_p2n_bar1_start_s cn52xx;
struct cvmx_pescx_p2n_bar1_start_s cn52xxp1;
struct cvmx_pescx_p2n_bar1_start_s cn56xx;
struct cvmx_pescx_p2n_bar1_start_s cn56xxp1;
}; };
union cvmx_pescx_p2n_bar2_start { union cvmx_pescx_p2n_bar2_start {
...@@ -540,10 +495,6 @@ union cvmx_pescx_p2n_bar2_start { ...@@ -540,10 +495,6 @@ union cvmx_pescx_p2n_bar2_start {
uint64_t addr:25; uint64_t addr:25;
#endif #endif
} s; } s;
struct cvmx_pescx_p2n_bar2_start_s cn52xx;
struct cvmx_pescx_p2n_bar2_start_s cn52xxp1;
struct cvmx_pescx_p2n_bar2_start_s cn56xx;
struct cvmx_pescx_p2n_bar2_start_s cn56xxp1;
}; };
union cvmx_pescx_p2p_barx_end { union cvmx_pescx_p2p_barx_end {
...@@ -557,10 +508,6 @@ union cvmx_pescx_p2p_barx_end { ...@@ -557,10 +508,6 @@ union cvmx_pescx_p2p_barx_end {
uint64_t addr:52; uint64_t addr:52;
#endif #endif
} s; } s;
struct cvmx_pescx_p2p_barx_end_s cn52xx;
struct cvmx_pescx_p2p_barx_end_s cn52xxp1;
struct cvmx_pescx_p2p_barx_end_s cn56xx;
struct cvmx_pescx_p2p_barx_end_s cn56xxp1;
}; };
union cvmx_pescx_p2p_barx_start { union cvmx_pescx_p2p_barx_start {
...@@ -574,10 +521,6 @@ union cvmx_pescx_p2p_barx_start { ...@@ -574,10 +521,6 @@ union cvmx_pescx_p2p_barx_start {
uint64_t addr:52; uint64_t addr:52;
#endif #endif
} s; } s;
struct cvmx_pescx_p2p_barx_start_s cn52xx;
struct cvmx_pescx_p2p_barx_start_s cn52xxp1;
struct cvmx_pescx_p2p_barx_start_s cn56xx;
struct cvmx_pescx_p2p_barx_start_s cn56xxp1;
}; };
union cvmx_pescx_tlp_credits { union cvmx_pescx_tlp_credits {
...@@ -631,8 +574,6 @@ union cvmx_pescx_tlp_credits { ...@@ -631,8 +574,6 @@ union cvmx_pescx_tlp_credits {
uint64_t reserved_38_63:26; uint64_t reserved_38_63:26;
#endif #endif
} cn52xxp1; } cn52xxp1;
struct cvmx_pescx_tlp_credits_cn52xx cn56xx;
struct cvmx_pescx_tlp_credits_cn52xxp1 cn56xxp1;
}; };
#endif #endif
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