Commit 4133a44e authored by Thara Gopinath's avatar Thara Gopinath Committed by Paul Walmsley

OMAP3 PM: Defining .pwrsts_logic_ret field for core power domain structure

This patch adds the flag .pwrsts_logic_ret info for the core power domain
in the associated powerdomain structure. This flag specifies the states
core domain logic can hit in event of the domain entering retention.
Signed-off-by: default avatarThara Gopinath <thara@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 1e3d0d2b
......@@ -82,6 +82,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
CHIP_IS_OMAP3430ES2 |
CHIP_IS_OMAP3430ES3_0),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 2,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
......@@ -98,6 +99,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
.prcm_offs = CORE_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.flags = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
.banks = 2,
.pwrsts_mem_ret = {
......
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