Commit 434f1392 authored by Bruce Allan's avatar Bruce Allan Committed by Jeff Kirsher

e1000e: concatenate long debug strings which span multiple lines

To ease searching for debug message strings, concatenate strings that span
multiple lines even if the resulting line exceeds 80 columns; these will
not cause checkpatch warnings.

Also, add '\n' and remove unnecessary '\r' from a few debug strings.
Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 464c85e3
...@@ -667,8 +667,7 @@ static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw) ...@@ -667,8 +667,7 @@ static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
udelay(1); udelay(1);
if (hw->phy.autoneg_wait_to_complete) { if (hw->phy.autoneg_wait_to_complete) {
e_dbg("Waiting for forced speed/duplex link " e_dbg("Waiting for forced speed/duplex link on GG82563 phy.\n");
"on GG82563 phy.\n");
ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT, ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
100000, &link); 100000, &link);
......
...@@ -902,8 +902,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) ...@@ -902,8 +902,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)
} }
if (!timeout) { if (!timeout) {
e_dbg("Failed to acquire the semaphore, FW or HW has it: " e_dbg("Failed to acquire the semaphore, FW or HW has it: FWSM=0x%8.8x EXTCNF_CTRL=0x%8.8x)\n",
"FWSM=0x%8.8x EXTCNF_CTRL=0x%8.8x)\n",
er32(FWSM), extcnf_ctrl); er32(FWSM), extcnf_ctrl);
extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG;
ew32(EXTCNF_CTRL, extcnf_ctrl); ew32(EXTCNF_CTRL, extcnf_ctrl);
...@@ -2132,8 +2131,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank) ...@@ -2132,8 +2131,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
return 0; return 0;
} }
e_dbg("Unable to determine valid NVM bank via EEC - " e_dbg("Unable to determine valid NVM bank via EEC - reading flash signature\n");
"reading flash signature\n");
/* fall-thru */ /* fall-thru */
default: default:
/* set bank to 0 in case flash read fails */ /* set bank to 0 in case flash read fails */
...@@ -2245,8 +2243,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) ...@@ -2245,8 +2243,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
/* Check if the flash descriptor is valid */ /* Check if the flash descriptor is valid */
if (hsfsts.hsf_status.fldesvalid == 0) { if (hsfsts.hsf_status.fldesvalid == 0) {
e_dbg("Flash descriptor invalid. " e_dbg("Flash descriptor invalid. SW Sequencing must be used.\n");
"SW Sequencing must be used.\n");
return -E1000_ERR_NVM; return -E1000_ERR_NVM;
} }
...@@ -2446,8 +2443,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, ...@@ -2446,8 +2443,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
/* Repeat for some time before giving up. */ /* Repeat for some time before giving up. */
continue; continue;
} else if (hsfsts.hsf_status.flcdone == 0) { } else if (hsfsts.hsf_status.flcdone == 0) {
e_dbg("Timeout error - flash cycle " e_dbg("Timeout error - flash cycle did not complete.\n");
"did not complete.\n");
break; break;
} }
} }
...@@ -2798,8 +2794,7 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, ...@@ -2798,8 +2794,7 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
/* Repeat for some time before giving up. */ /* Repeat for some time before giving up. */
continue; continue;
if (hsfsts.hsf_status.flcdone == 0) { if (hsfsts.hsf_status.flcdone == 0) {
e_dbg("Timeout error - flash cycle " e_dbg("Timeout error - flash cycle did not complete.\n");
"did not complete.");
break; break;
} }
} while (count++ < ICH_FLASH_CYCLE_REPEAT_COUNT); } while (count++ < ICH_FLASH_CYCLE_REPEAT_COUNT);
......
...@@ -653,12 +653,10 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw) ...@@ -653,12 +653,10 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
if (rxcw & E1000_RXCW_SYNCH) { if (rxcw & E1000_RXCW_SYNCH) {
if (!(rxcw & E1000_RXCW_IV)) { if (!(rxcw & E1000_RXCW_IV)) {
mac->serdes_has_link = true; mac->serdes_has_link = true;
e_dbg("SERDES: Link up - autoneg " e_dbg("SERDES: Link up - autoneg completed successfully.\n");
"completed successfully.\n");
} else { } else {
mac->serdes_has_link = false; mac->serdes_has_link = false;
e_dbg("SERDES: Link down - invalid" e_dbg("SERDES: Link down - invalid codewords detected in autoneg.\n");
"codewords detected in autoneg.\n");
} }
} else { } else {
mac->serdes_has_link = false; mac->serdes_has_link = false;
...@@ -1118,8 +1116,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) ...@@ -1118,8 +1116,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
return ret_val; return ret_val;
if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) { if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {
e_dbg("Copper PHY and Auto Neg " e_dbg("Copper PHY and Auto Neg has not completed.\n");
"has not completed.\n");
return ret_val; return ret_val;
} }
...@@ -1183,11 +1180,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) ...@@ -1183,11 +1180,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
*/ */
if (hw->fc.requested_mode == e1000_fc_full) { if (hw->fc.requested_mode == e1000_fc_full) {
hw->fc.current_mode = e1000_fc_full; hw->fc.current_mode = e1000_fc_full;
e_dbg("Flow Control = FULL.\r\n"); e_dbg("Flow Control = FULL.\n");
} else { } else {
hw->fc.current_mode = e1000_fc_rx_pause; hw->fc.current_mode = e1000_fc_rx_pause;
e_dbg("Flow Control = " e_dbg("Flow Control = Rx PAUSE frames only.\n");
"Rx PAUSE frames only.\r\n");
} }
} }
/* /*
...@@ -1203,7 +1199,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) ...@@ -1203,7 +1199,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
hw->fc.current_mode = e1000_fc_tx_pause; hw->fc.current_mode = e1000_fc_tx_pause;
e_dbg("Flow Control = Tx PAUSE frames only.\r\n"); e_dbg("Flow Control = Tx PAUSE frames only.\n");
} }
/* /*
* For transmitting PAUSE frames ONLY. * For transmitting PAUSE frames ONLY.
...@@ -1218,14 +1214,14 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) ...@@ -1218,14 +1214,14 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
!(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
hw->fc.current_mode = e1000_fc_rx_pause; hw->fc.current_mode = e1000_fc_rx_pause;
e_dbg("Flow Control = Rx PAUSE frames only.\r\n"); e_dbg("Flow Control = Rx PAUSE frames only.\n");
} else { } else {
/* /*
* Per the IEEE spec, at this point flow control * Per the IEEE spec, at this point flow control
* should be disabled. * should be disabled.
*/ */
hw->fc.current_mode = e1000_fc_none; hw->fc.current_mode = e1000_fc_none;
e_dbg("Flow Control = NONE.\r\n"); e_dbg("Flow Control = NONE.\n");
} }
/* /*
......
...@@ -1136,8 +1136,7 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw) ...@@ -1136,8 +1136,7 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw)
if (phy->autoneg_wait_to_complete) { if (phy->autoneg_wait_to_complete) {
ret_val = e1000_wait_autoneg(hw); ret_val = e1000_wait_autoneg(hw);
if (ret_val) { if (ret_val) {
e_dbg("Error while waiting for " e_dbg("Error while waiting for autoneg to complete\n");
"autoneg to complete\n");
return ret_val; return ret_val;
} }
} }
......
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