Commit 44a06fa4 authored by Ray Jui's avatar Ray Jui Committed by Florian Fainelli

ARM: dts: enable PCIe PHY support for Cygnus

Enable PCIe PHY for both PCIe root complexes on Cygnus
Signed-off-by: default avatarRay Jui <rjui@broadcom.com>
Acked-by: default avatarScott Branden <sbranden@broadcom.com>
[florian: Fix missing #address-cells and #size-cells properties]
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 3ad8ff0e
......@@ -91,6 +91,23 @@ axi {
#address-cells = <1>;
#size-cells = <1>;
pcie_phy: phy@0301d0a0 {
compatible = "brcm,cygnus-pcie-phy";
reg = <0x0301d0a0 0x14>;
#address-cells = <1>;
#size-cells = <0>;
pcie0_phy: phy@0 {
reg = <0>;
#phy-cells = <0>;
};
pcie1_phy: phy@1 {
reg = <1>;
#phy-cells = <0>;
};
};
pinctrl: pinctrl@0x0301d0c8 {
compatible = "brcm,cygnus-pinmux";
reg = <0x0301d0c8 0x30>,
......@@ -163,6 +180,9 @@ pcie0: pcie@18012000 {
ranges = <0x81000000 0 0 0x28000000 0 0x00010000
0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
phys = <&pcie0_phy>;
phy-names = "pcie-phy";
status = "disabled";
};
......@@ -184,6 +204,9 @@ pcie1: pcie@18013000 {
ranges = <0x81000000 0 0 0x48000000 0 0x00010000
0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
phys = <&pcie1_phy>;
phy-names = "pcie-phy";
status = "disabled";
};
......
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