Commit 458151f6 authored by Oliver Upton's avatar Oliver Upton Committed by Paolo Bonzini

KVM: nVMX: Use kvm_set_msr to load IA32_PERF_GLOBAL_CTRL on VM-Exit

The existing implementation for loading the IA32_PERF_GLOBAL_CTRL MSR
on VM-exit was incorrect, as the next call to atomic_switch_perf_msrs()
could cause this value to be overwritten. Instead, call kvm_set_msr()
which will allow atomic_switch_perf_msrs() to correctly set the values.

Define a macro, SET_MSR_OR_WARN(), to set the MSR with kvm_set_msr()
and WARN on failure.
Suggested-by: default avatarJim Mattson <jmattson@google.com>
Co-developed-by: default avatarKrish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: default avatarKrish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: default avatarOliver Upton <oupton@google.com>
Reviewed-by: default avatarJim Mattson <jmattson@google.com>
Reviewed-by: default avatarPeter Shier <pshier@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent c547cb6f
...@@ -28,6 +28,16 @@ module_param(nested_early_check, bool, S_IRUGO); ...@@ -28,6 +28,16 @@ module_param(nested_early_check, bool, S_IRUGO);
failed; \ failed; \
}) })
#define SET_MSR_OR_WARN(vcpu, idx, data) \
({ \
bool failed = kvm_set_msr(vcpu, idx, data); \
if (failed) \
pr_warn_ratelimited( \
"%s cannot write MSR (0x%x, 0x%llx)\n", \
__func__, idx, data); \
failed; \
})
/* /*
* Hyper-V requires all of these, so mark them as supported even though * Hyper-V requires all of these, so mark them as supported even though
* they are just treated the same as all-context. * they are just treated the same as all-context.
...@@ -3879,8 +3889,8 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu, ...@@ -3879,8 +3889,8 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
vcpu->arch.pat = vmcs12->host_ia32_pat; vcpu->arch.pat = vmcs12->host_ia32_pat;
} }
if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL) if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)
vmcs_write64(GUEST_IA32_PERF_GLOBAL_CTRL, SET_MSR_OR_WARN(vcpu, MSR_CORE_PERF_GLOBAL_CTRL,
vmcs12->host_ia32_perf_global_ctrl); vmcs12->host_ia32_perf_global_ctrl);
/* Set L1 segment info according to Intel SDM /* Set L1 segment info according to Intel SDM
27.5.2 Loading Host Segment and Descriptor-Table Registers */ 27.5.2 Loading Host Segment and Descriptor-Table Registers */
......
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