Commit 45c6c8af authored by David Howells's avatar David Howells Committed by Linus Torvalds

[PATCH] FRV: First batch of Fujitsu FR-V arch include files

The attached patch provides the first 100KB or so of the arch-specific
include files for the Fujitsu FR-V CPU arch.
Signed-Off-By: default avatarDavid Howells <dhowells@redhat.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 029922c4
This diff is collapsed.
/* ax88796.h: access points to the driver for the AX88796 NE2000 clone
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_AX88796_H
#define _ASM_AX88796_H
#include <asm/mb-regs.h>
#define AX88796_IOADDR (__region_CS1 + 0x200)
#define AX88796_IRQ IRQ_CPU_EXTERNAL7
#define AX88796_FULL_DUPLEX 0 /* force full duplex */
#define AX88796_BUS_INFO "CS1#+0x200" /* bus info for ethtool */
#endif /* _ASM_AX88796_H */
/* bitops.h: bit operations for the Fujitsu FR-V CPUs
*
* For an explanation of how atomic ops work in this arch, see:
* Documentation/fujitsu/frv/atomic-ops.txt
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_BITOPS_H
#define _ASM_BITOPS_H
#include <linux/config.h>
#include <linux/compiler.h>
#include <asm/byteorder.h>
#include <asm/system.h>
#include <asm/atomic.h>
#ifdef __KERNEL__
/*
* ffz = Find First Zero in word. Undefined if no zero exists,
* so code should check against ~0UL first..
*/
static inline unsigned long ffz(unsigned long word)
{
unsigned long result = 0;
while (word & 1) {
result++;
word >>= 1;
}
return result;
}
/*
* clear_bit() doesn't provide any barrier for the compiler.
*/
#define smp_mb__before_clear_bit() barrier()
#define smp_mb__after_clear_bit() barrier()
static inline int test_and_clear_bit(int nr, volatile void *addr)
{
volatile unsigned long *ptr = addr;
unsigned long mask = 1UL << (nr & 31);
ptr += nr >> 5;
return (atomic_test_and_ANDNOT_mask(mask, ptr) & mask) != 0;
}
static inline int test_and_set_bit(int nr, volatile void *addr)
{
volatile unsigned long *ptr = addr;
unsigned long mask = 1UL << (nr & 31);
ptr += nr >> 5;
return (atomic_test_and_OR_mask(mask, ptr) & mask) != 0;
}
static inline int test_and_change_bit(int nr, volatile void *addr)
{
volatile unsigned long *ptr = addr;
unsigned long mask = 1UL << (nr & 31);
ptr += nr >> 5;
return (atomic_test_and_XOR_mask(mask, ptr) & mask) != 0;
}
static inline void clear_bit(int nr, volatile void *addr)
{
test_and_clear_bit(nr, addr);
}
static inline void set_bit(int nr, volatile void *addr)
{
test_and_set_bit(nr, addr);
}
static inline void change_bit(int nr, volatile void * addr)
{
test_and_change_bit(nr, addr);
}
static inline void __clear_bit(int nr, volatile void * addr)
{
volatile unsigned long *a = addr;
int mask;
a += nr >> 5;
mask = 1 << (nr & 31);
*a &= ~mask;
}
static inline void __set_bit(int nr, volatile void * addr)
{
volatile unsigned long *a = addr;
int mask;
a += nr >> 5;
mask = 1 << (nr & 31);
*a |= mask;
}
static inline void __change_bit(int nr, volatile void *addr)
{
volatile unsigned long *a = addr;
int mask;
a += nr >> 5;
mask = 1 << (nr & 31);
*a ^= mask;
}
static inline int __test_and_clear_bit(int nr, volatile void * addr)
{
volatile unsigned long *a = addr;
int mask, retval;
a += nr >> 5;
mask = 1 << (nr & 31);
retval = (mask & *a) != 0;
*a &= ~mask;
return retval;
}
static inline int __test_and_set_bit(int nr, volatile void * addr)
{
volatile unsigned long *a = addr;
int mask, retval;
a += nr >> 5;
mask = 1 << (nr & 31);
retval = (mask & *a) != 0;
*a |= mask;
return retval;
}
static inline int __test_and_change_bit(int nr, volatile void * addr)
{
volatile unsigned long *a = addr;
int mask, retval;
a += nr >> 5;
mask = 1 << (nr & 31);
retval = (mask & *a) != 0;
*a ^= mask;
return retval;
}
/*
* This routine doesn't need to be atomic.
*/
static inline int __constant_test_bit(int nr, const volatile void * addr)
{
return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
}
static inline int __test_bit(int nr, const volatile void * addr)
{
int * a = (int *) addr;
int mask;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
return ((mask & *a) != 0);
}
#define test_bit(nr,addr) \
(__builtin_constant_p(nr) ? \
__constant_test_bit((nr),(addr)) : \
__test_bit((nr),(addr)))
extern int find_next_bit(const unsigned long *addr, int size, int offset);
#define find_first_bit(addr, size) find_next_bit(addr, size, 0)
#define find_first_zero_bit(addr, size) \
find_next_zero_bit((addr), (size), 0)
static inline int find_next_zero_bit (void * addr, int size, int offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
unsigned long result = offset & ~31UL;
unsigned long tmp;
if (offset >= size)
return size;
size -= result;
offset &= 31UL;
if (offset) {
tmp = *(p++);
tmp |= ~0UL >> (32-offset);
if (size < 32)
goto found_first;
if (~tmp)
goto found_middle;
size -= 32;
result += 32;
}
while (size & ~31UL) {
if (~(tmp = *(p++)))
goto found_middle;
result += 32;
size -= 32;
}
if (!size)
return result;
tmp = *p;
found_first:
tmp |= ~0UL >> size;
found_middle:
return result + ffz(tmp);
}
#define ffs(x) generic_ffs(x)
#define __ffs(x) (ffs(x) - 1)
/*
* fls: find last bit set.
*/
#define fls(x) \
({ \
int bit; \
\
asm("scan %1,gr0,%0" : "=r"(bit) : "r"(x)); \
\
bit ? 33 - bit : bit; \
})
/*
* Every architecture must define this function. It's the fastest
* way of searching a 140-bit bitmap where the first 100 bits are
* unlikely to be set. It's guaranteed that at least one of the 140
* bits is cleared.
*/
static inline int sched_find_first_bit(const unsigned long *b)
{
if (unlikely(b[0]))
return __ffs(b[0]);
if (unlikely(b[1]))
return __ffs(b[1]) + 32;
if (unlikely(b[2]))
return __ffs(b[2]) + 64;
if (b[3])
return __ffs(b[3]) + 96;
return __ffs(b[4]) + 128;
}
/*
* hweightN: returns the hamming weight (i.e. the number
* of bits set) of a N-bit word
*/
#define hweight32(x) generic_hweight32(x)
#define hweight16(x) generic_hweight16(x)
#define hweight8(x) generic_hweight8(x)
static inline int ext2_set_bit(int nr, volatile void * addr)
{
unsigned long old, tmp, mask;
volatile unsigned char *ptr = addr;
ptr += nr >> 3;
asm("0: \n"
" setlos.p #1,%3 \n"
" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
" sll%I4.p %3,%4,%3 \n"
" ckeq icc3,cc7 \n"
" ldub.p %M0,%1 \n" /* LDUB.P/ORCR must be atomic */
" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
" or %1,%3,%2 \n"
" cstb.p %2,%M0 ,cc3,#1 \n"
" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
" beq icc3,#0,0b \n"
: "+U"(*ptr), "=&r"(old), "=r"(tmp), "=&r"(mask)
: "Ir"(nr & 7)
: "memory", "cc7", "cc3", "icc3"
);
return old & mask;
}
#define ext2_set_bit_atomic(lock,nr,addr) ext2_set_bit((nr), addr)
static inline int ext2_clear_bit(int nr, volatile void * addr)
{
unsigned long old, tmp, mask;
volatile unsigned char *ptr = addr;
ptr += nr >> 3;
asm("0: \n"
" setlos.p #1,%3 \n"
" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
" sll%I4.p %3,%4,%3 \n"
" ckeq icc3,cc7 \n"
" ldub.p %M0,%1 \n" /* LDUB.P/ORCR must be atomic */
" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
" not %3,%2 \n"
" and %1,%2,%2 \n"
" cstb.p %2,%M0 ,cc3,#1 \n"
" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
" beq icc3,#0,0b \n"
: "+U"(*ptr), "=&r"(old), "=r"(tmp), "=&r"(mask)
: "Ir"(nr & 7)
: "memory", "cc7", "cc3", "icc3"
);
return old & mask;
}
#define ext2_clear_bit_atomic(lock,nr,addr) ext2_clear_bit((nr), addr)
static inline int ext2_test_bit(int nr, const volatile void * addr)
{
int mask;
const volatile unsigned char *ADDR = (const unsigned char *) addr;
ADDR += nr >> 3;
mask = 1 << (nr & 0x07);
return ((mask & *ADDR) != 0);
}
#define ext2_find_first_zero_bit(addr, size) \
ext2_find_next_zero_bit((addr), (size), 0)
static inline unsigned long ext2_find_next_zero_bit(void *addr,
unsigned long size,
unsigned long offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
unsigned long result = offset & ~31UL;
unsigned long tmp;
if (offset >= size)
return size;
size -= result;
offset &= 31UL;
if(offset) {
/* We hold the little endian value in tmp, but then the
* shift is illegal. So we could keep a big endian value
* in tmp, like this:
*
* tmp = __swab32(*(p++));
* tmp |= ~0UL >> (32-offset);
*
* but this would decrease preformance, so we change the
* shift:
*/
tmp = *(p++);
tmp |= __swab32(~0UL >> (32-offset));
if(size < 32)
goto found_first;
if(~tmp)
goto found_middle;
size -= 32;
result += 32;
}
while(size & ~31UL) {
if(~(tmp = *(p++)))
goto found_middle;
result += 32;
size -= 32;
}
if(!size)
return result;
tmp = *p;
found_first:
/* tmp is little endian, so we would have to swab the shift,
* see above. But then we have to swab tmp below for ffz, so
* we might as well do this here.
*/
return result + ffz(__swab32(tmp) | (~0UL << size));
found_middle:
return result + ffz(__swab32(tmp));
}
/* Bitmap functions for the minix filesystem. */
#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
#define minix_set_bit(nr,addr) set_bit(nr,addr)
#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
#define minix_test_bit(nr,addr) test_bit(nr,addr)
#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
#endif /* __KERNEL__ */
#endif /* _ASM_BITOPS_H */
/* bug.h: FRV bug trapping
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_BUG_H
#define _ASM_BUG_H
#include <linux/config.h>
/*
* Tell the user there is some problem.
*/
extern asmlinkage void __debug_bug_trap(int signr);
#ifdef CONFIG_NO_KERNEL_MSG
#define _debug_bug_printk()
#else
extern void __debug_bug_printk(const char *file, unsigned line);
#define _debug_bug_printk() __debug_bug_printk(__FILE__, __LINE__)
#endif
#define _debug_bug_trap(signr) \
do { \
__debug_bug_trap(signr); \
asm volatile("nop"); \
} while(0)
#define HAVE_ARCH_BUG
#define BUG() \
do { \
_debug_bug_printk(); \
_debug_bug_trap(6 /*SIGABRT*/); \
} while (0)
#ifdef CONFIG_GDBSTUB
#define HAVE_ARCH_KGDB_RAISE
#define kgdb_raise(signr) do { _debug_bug_trap(signr); } while(0)
#define HAVE_ARCH_KGDB_BAD_PAGE
#define kgdb_bad_page(page) do { kgdb_raise(SIGABRT); } while(0)
#endif
#include <asm-generic/bug.h>
#endif
/* bugs.h: arch bug checking entry
*
* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
static inline void check_bugs(void)
{
}
/* busctl-regs.h: FR400-series CPU bus controller registers
*
* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_BUSCTL_REGS_H
#define _ASM_BUSCTL_REGS_H
/* bus controller registers */
#define __get_LGCR() ({ *(volatile unsigned long *)(0xfe000010); })
#define __get_LMAICR() ({ *(volatile unsigned long *)(0xfe000030); })
#define __get_LEMBR() ({ *(volatile unsigned long *)(0xfe000040); })
#define __get_LEMAM() ({ *(volatile unsigned long *)(0xfe000048); })
#define __get_LCR(R) ({ *(volatile unsigned long *)(0xfe000100 + 8*(R)); })
#define __get_LSBR(R) ({ *(volatile unsigned long *)(0xfe000c00 + 8*(R)); })
#define __get_LSAM(R) ({ *(volatile unsigned long *)(0xfe000d00 + 8*(R)); })
#define __set_LGCR(V) do { *(volatile unsigned long *)(0xfe000010) = (V); } while(0)
#define __set_LMAICR(V) do { *(volatile unsigned long *)(0xfe000030) = (V); } while(0)
#define __set_LEMBR(V) do { *(volatile unsigned long *)(0xfe000040) = (V); } while(0)
#define __set_LEMAM(V) do { *(volatile unsigned long *)(0xfe000048) = (V); } while(0)
#define __set_LCR(R,V) do { *(volatile unsigned long *)(0xfe000100 + 8*(R)) = (V); } while(0)
#define __set_LSBR(R,V) do { *(volatile unsigned long *)(0xfe000c00 + 8*(R)) = (V); } while(0)
#define __set_LSAM(R,V) do { *(volatile unsigned long *)(0xfe000d00 + 8*(R)) = (V); } while(0)
/* FR401 SDRAM controller registers */
#define __get_DBR(R) ({ *(volatile unsigned long *)(0xfe000e00 + 8*(R)); })
#define __get_DAM(R) ({ *(volatile unsigned long *)(0xfe000f00 + 8*(R)); })
/* FR551 SDRAM controller registers */
#define __get_DARS(R) ({ *(volatile unsigned long *)(0xfeff0100 + 8*(R)); })
#define __get_DAMK(R) ({ *(volatile unsigned long *)(0xfeff0110 + 8*(R)); })
#endif /* _ASM_BUSCTL_REGS_H */
#ifndef _ASM_BYTEORDER_H
#define _ASM_BYTEORDER_H
#include <asm/types.h>
#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
# define __BYTEORDER_HAS_U64__
# define __SWAB_64_THRU_32__
#endif
#include <linux/byteorder/big_endian.h>
#endif /* _ASM_BYTEORDER_H */
/* cache.h: FRV cache definitions
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_CACHE_H
#define __ASM_CACHE_H
/* bytes per L1 cache line */
#define L1_CACHE_SHIFT 5
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
#endif
/* cacheflush.h: FRV cache flushing routines
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_CACHEFLUSH_H
#define _ASM_CACHEFLUSH_H
/* Keep includes the same across arches. */
#include <linux/mm.h>
/*
* virtually-indexed cache management (our cache is physically indexed)
*/
#define flush_cache_all() do {} while(0)
#define flush_cache_mm(mm) do {} while(0)
#define flush_cache_range(mm, start, end) do {} while(0)
#define flush_cache_page(vma, vmaddr) do {} while(0)
#define flush_cache_vmap(start, end) do {} while(0)
#define flush_cache_vunmap(start, end) do {} while(0)
#define flush_dcache_mmap_lock(mapping) do {} while(0)
#define flush_dcache_mmap_unlock(mapping) do {} while(0)
/*
* physically-indexed cache managment
* - see arch/frv/lib/cache.S
*/
extern void frv_dcache_writeback(unsigned long start, unsigned long size);
extern void frv_cache_invalidate(unsigned long start, unsigned long size);
extern void frv_icache_invalidate(unsigned long start, unsigned long size);
extern void frv_cache_wback_inv(unsigned long start, unsigned long size);
static inline void __flush_cache_all(void)
{
asm volatile(" dcef @(gr0,gr0),#1 \n"
" icei @(gr0,gr0),#1 \n"
" membar \n"
: : : "memory"
);
}
/* dcache/icache coherency... */
#ifdef CONFIG_MMU
extern void flush_dcache_page(struct page *page);
#else
static inline void flush_dcache_page(struct page *page)
{
unsigned long addr = page_to_phys(page);
frv_dcache_writeback(addr, addr + PAGE_SIZE);
}
#endif
static inline void flush_page_to_ram(struct page *page)
{
flush_dcache_page(page);
}
static inline void flush_icache(void)
{
__flush_cache_all();
}
static inline void flush_icache_range(unsigned long start, unsigned long end)
{
frv_cache_wback_inv(start, end);
}
#ifdef CONFIG_MMU
extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
unsigned long start, unsigned long len);
#else
static inline void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
unsigned long start, unsigned long len)
{
frv_cache_wback_inv(start, start + len);
}
#endif
static inline void flush_icache_page(struct vm_area_struct *vma, struct page *page)
{
flush_icache_user_range(vma, page, page_to_phys(page), PAGE_SIZE);
}
#endif /* _ASM_CACHEFLUSH_H */
/* checksum.h: FRV checksumming
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_CHECKSUM_H
#define _ASM_CHECKSUM_H
#include <linux/in6.h>
/*
* computes the checksum of a memory block at buff, length len,
* and adds in "sum" (32-bit)
*
* returns a 32-bit number suitable for feeding into itself
* or csum_tcpudp_magic
*
* this function must be called with even lengths, except
* for the last fragment, which may be odd
*
* it's best to have buff aligned on a 32-bit boundary
*/
unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum);
/*
* the same as csum_partial, but copies from src while it
* checksums
*
* here even more important to align src and dst on a 32-bit (or even
* better 64-bit) boundary
*/
unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum);
/*
* the same as csum_partial_copy, but copies from user space.
*
* here even more important to align src and dst on a 32-bit (or even
* better 64-bit) boundary
*/
extern unsigned int csum_partial_copy_from_user(const char *src, char *dst,
int len, int sum, int *csum_err);
#define csum_partial_copy_nocheck(src, dst, len, sum) \
csum_partial_copy((src), (dst), (len), (sum))
/*
* This is a version of ip_compute_csum() optimized for IP headers,
* which always checksum on 4 octet boundaries.
*
*/
static inline
unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl)
{
unsigned int tmp, inc, sum = 0;
asm(" addcc gr0,gr0,gr0,icc0\n" /* clear icc0.C */
" subi %1,#4,%1 \n"
"0: \n"
" ldu.p @(%1,%3),%4 \n"
" subicc %2,#1,%2,icc1 \n"
" addxcc.p %4,%0,%0,icc0 \n"
" bhi icc1,#2,0b \n"
/* fold the 33-bit result into 16-bits */
" addxcc gr0,%0,%0,icc0 \n"
" srli %0,#16,%1 \n"
" sethi #0,%0 \n"
" add %1,%0,%0 \n"
" srli %0,#16,%1 \n"
" add %1,%0,%0 \n"
: "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (inc), "=&r"(tmp)
: "0" (sum), "1" (iph), "2" (ihl), "3" (4),
"m"(*(volatile struct { int _[100]; } *)iph)
: "icc0", "icc1"
);
return ~sum;
}
/*
* Fold a partial checksum
*/
static inline unsigned int csum_fold(unsigned int sum)
{
unsigned int tmp;
asm(" srli %0,#16,%1 \n"
" sethi #0,%0 \n"
" add %1,%0,%0 \n"
" srli %0,#16,%1 \n"
" add %1,%0,%0 \n"
: "=r"(sum), "=&r"(tmp)
: "0"(sum)
);
return ~sum;
}
/*
* computes the checksum of the TCP/UDP pseudo-header
* returns a 16-bit checksum, already complemented
*/
static inline unsigned int
csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len,
unsigned short proto, unsigned int sum)
{
asm(" addcc %1,%0,%0,icc0 \n"
" addxcc %2,%0,%0,icc0 \n"
" addxcc %3,%0,%0,icc0 \n"
" addxcc gr0,%0,%0,icc0 \n"
: "=r" (sum)
: "r" (daddr), "r" (saddr), "r" (len + proto), "0"(sum)
: "icc0"
);
return sum;
}
static inline unsigned short int
csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len,
unsigned short proto, unsigned int sum)
{
return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
}
/*
* this routine is used for miscellaneous IP-like checksums, mainly
* in icmp.c
*/
extern unsigned short ip_compute_csum(const unsigned char * buff, int len);
#define _HAVE_ARCH_IPV6_CSUM
static inline unsigned short int
csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr,
__u32 len, unsigned short proto, unsigned int sum)
{
unsigned long tmp, tmp2;
asm(" addcc %2,%0,%0,icc0 \n"
/* add up the source addr */
" ldi @(%3,0),%1 \n"
" addxcc %1,%0,%0,icc0 \n"
" ldi @(%3,4),%2 \n"
" addxcc %2,%0,%0,icc0 \n"
" ldi @(%3,8),%1 \n"
" addxcc %1,%0,%0,icc0 \n"
" ldi @(%3,12),%2 \n"
" addxcc %2,%0,%0,icc0 \n"
/* add up the dest addr */
" ldi @(%4,0),%1 \n"
" addxcc %1,%0,%0,icc0 \n"
" ldi @(%4,4),%2 \n"
" addxcc %2,%0,%0,icc0 \n"
" ldi @(%4,8),%1 \n"
" addxcc %1,%0,%0,icc0 \n"
" ldi @(%4,12),%2 \n"
" addxcc %2,%0,%0,icc0 \n"
/* fold the 33-bit result into 16-bits */
" addxcc gr0,%0,%0,icc0 \n"
" srli %0,#16,%1 \n"
" sethi #0,%0 \n"
" add %1,%0,%0 \n"
" srli %0,#16,%1 \n"
" add %1,%0,%0 \n"
: "=r" (sum), "=&r" (tmp), "=r" (tmp2)
: "r" (saddr), "r" (daddr), "0" (sum), "2" (len + proto)
: "icc0"
);
return ~sum;
}
#endif /* _ASM_CHECKSUM_H */
/* cpu-irqs.h: on-CPU peripheral irqs
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_CPU_IRQS_H
#define _ASM_CPU_IRQS_H
#ifndef __ASSEMBLY__
#include <asm/irq-routing.h>
#define IRQ_BASE_CPU (NR_IRQ_ACTIONS_PER_GROUP * 0)
/* IRQ IDs presented to drivers */
enum {
IRQ_CPU__UNUSED = IRQ_BASE_CPU,
IRQ_CPU_UART0,
IRQ_CPU_UART1,
IRQ_CPU_TIMER0,
IRQ_CPU_TIMER1,
IRQ_CPU_TIMER2,
IRQ_CPU_DMA0,
IRQ_CPU_DMA1,
IRQ_CPU_DMA2,
IRQ_CPU_DMA3,
IRQ_CPU_DMA4,
IRQ_CPU_DMA5,
IRQ_CPU_DMA6,
IRQ_CPU_DMA7,
IRQ_CPU_EXTERNAL0,
IRQ_CPU_EXTERNAL1,
IRQ_CPU_EXTERNAL2,
IRQ_CPU_EXTERNAL3,
IRQ_CPU_EXTERNAL4,
IRQ_CPU_EXTERNAL5,
IRQ_CPU_EXTERNAL6,
IRQ_CPU_EXTERNAL7,
};
/* IRQ to level mappings */
#define IRQ_GDBSTUB_LEVEL 15
#define IRQ_UART_LEVEL 13
#ifdef CONFIG_GDBSTUB_UART0
#define IRQ_UART0_LEVEL IRQ_GDBSTUB_LEVEL
#else
#define IRQ_UART0_LEVEL IRQ_UART_LEVEL
#endif
#ifdef CONFIG_GDBSTUB_UART1
#define IRQ_UART1_LEVEL IRQ_GDBSTUB_LEVEL
#else
#define IRQ_UART1_LEVEL IRQ_UART_LEVEL
#endif
#define IRQ_DMA0_LEVEL 14
#define IRQ_DMA1_LEVEL 14
#define IRQ_DMA2_LEVEL 14
#define IRQ_DMA3_LEVEL 14
#define IRQ_DMA4_LEVEL 14
#define IRQ_DMA5_LEVEL 14
#define IRQ_DMA6_LEVEL 14
#define IRQ_DMA7_LEVEL 14
#define IRQ_TIMER0_LEVEL 12
#define IRQ_TIMER1_LEVEL 11
#define IRQ_TIMER2_LEVEL 10
#define IRQ_XIRQ0_LEVEL 1
#define IRQ_XIRQ1_LEVEL 2
#define IRQ_XIRQ2_LEVEL 3
#define IRQ_XIRQ3_LEVEL 4
#define IRQ_XIRQ4_LEVEL 5
#define IRQ_XIRQ5_LEVEL 6
#define IRQ_XIRQ6_LEVEL 7
#define IRQ_XIRQ7_LEVEL 8
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_CPU_IRQS_H */
#ifndef _ASM_CPUMASK_H
#define _ASM_CPUMASK_H
#include <asm-generic/cpumask.h>
#endif /* _ASM_CPUMASK_H */
#ifndef _ASM_CPUTIME_H
#define _ASM_CPUTIME_H
#include <asm-generic/cputime.h>
#endif /* _ASM_CPUTIME_H */
/* current.h: FRV current task pointer
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_CURRENT_H
#define _ASM_CURRENT_H
#ifndef __ASSEMBLY__
/*
* dedicate GR29 to keeping the current task pointer
*/
register struct task_struct *current asm("gr29");
#define get_current() current
#else
#define CURRENT gr29
#endif
#endif /* _ASM_CURRENT_H */
/* delay.h: FRV delay code
*
* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_DELAY_H
#define _ASM_DELAY_H
#include <asm/param.h>
#include <asm/timer-regs.h>
/*
* delay loop - runs at __core_clock_speed_HZ / 2 [there are 2 insns in the loop]
*/
extern unsigned long __delay_loops_MHz;
static inline void __delay(unsigned long loops)
{
asm volatile("1: subicc %0,#1,%0,icc0 \n"
" bnc icc0,#2,1b \n"
: "=r" (loops)
: "0" (loops)
: "icc0"
);
}
/*
* Use only for very small delays ( < 1 msec). Should probably use a
* lookup table, really, as the multiplications take much too long with
* short delays. This is a "reasonable" implementation, though (and the
* first constant multiplications gets optimized away if the delay is
* a constant)
*/
extern unsigned long loops_per_jiffy;
static inline void udelay(unsigned long usecs)
{
__delay(usecs * __delay_loops_MHz);
}
#define ndelay(n) udelay((n) * 5)
#endif /* _ASM_DELAY_H */
#include <asm-generic/div64.h>
/* dm9000.h: Davicom DM9000 adapter configuration
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_DM9000_H
#define _ASM_DM9000_H
#include <asm/mb-regs.h>
#define DM9000_ARCH_IOBASE (__region_CS6 + 0x300)
#define DM9000_ARCH_IRQ IRQ_CPU_EXTERNAL3 /* XIRQ #3 (shared with FPGA) */
#undef DM9000_ARCH_IRQ_ACTLOW /* IRQ pin active high */
#define DM9000_ARCH_BUS_INFO "CS6#+0x300" /* bus info for ethtool */
#undef __is_PCI_IO
#define __is_PCI_IO(addr) 0 /* not PCI */
#undef inl
#define inl(addr) \
({ \
unsigned long __ioaddr = (unsigned long) addr; \
uint32_t x = readl(__ioaddr); \
((x & 0xff) << 24) | ((x & 0xff00) << 8) | ((x >> 8) & 0xff00) | ((x >> 24) & 0xff); \
})
#undef insl
#define insl(a,b,l) __insl(a,b,l,0) /* don't byte-swap */
#endif /* _ASM_DM9000_H */
#ifndef _ASM_DMA_MAPPING_H
#define _ASM_DMA_MAPPING_H
#include <linux/device.h>
#include <asm/cache.h>
#include <asm/cacheflush.h>
#include <asm/scatterlist.h>
#include <asm/io.h>
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
extern unsigned long __nongprelbss dma_coherent_mem_start;
extern unsigned long __nongprelbss dma_coherent_mem_end;
void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, int gfp);
void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
/*
* These macros should be used after a pci_map_sg call has been done
* to get bus addresses of each of the SG entries and their lengths.
* You should only work with the number of sg entries pci_map_sg
* returns, or alternatively stop on the first sg_dma_len(sg) which
* is 0.
*/
#define sg_dma_address(sg) ((unsigned long) (page_to_phys((sg)->page) + (sg)->offset))
#define sg_dma_len(sg) ((sg)->length)
/*
* Map a single buffer of the indicated size for DMA in streaming mode.
* The 32-bit bus address to use is returned.
*
* Once the device is given the dma address, the device owns this memory
* until either pci_unmap_single or pci_dma_sync_single is performed.
*/
static inline
dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction direction)
{
if (direction == DMA_NONE)
BUG();
frv_cache_wback_inv((unsigned long) ptr, (unsigned long) ptr + size);
return virt_to_bus(ptr);
}
/*
* Unmap a single streaming mode DMA translation. The dma_addr and size
* must match what was provided for in a previous pci_map_single call. All
* other usages are undefined.
*
* After this call, reads by the cpu to the buffer are guarenteed to see
* whatever the device wrote there.
*/
static inline
void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
/*
* Map a set of buffers described by scatterlist in streaming
* mode for DMA. This is the scather-gather version of the
* above pci_map_single interface. Here the scatter gather list
* elements are each tagged with the appropriate dma address
* and length. They are obtained via sg_dma_{address,length}(SG).
*
* NOTE: An implementation may be able to use a smaller number of
* DMA address/length pairs than there are SG table elements.
* (for example via virtual mapping capabilities)
* The routine returns the number of addr/length pairs actually
* used, at most nents.
*
* Device ownership issues as mentioned above for pci_map_single are
* the same here.
*/
static inline
int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction direction)
{
int i;
for (i=0; i<nents; i++)
frv_cache_wback_inv(sg_dma_address(&sg[i]),
sg_dma_address(&sg[i]) + sg_dma_len(&sg[i]));
if (direction == DMA_NONE)
BUG();
return nents;
}
/*
* Unmap a set of streaming mode DMA translations.
* Again, cpu read rules concerning calls here are the same as for
* pci_unmap_single() above.
*/
static inline
void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
static inline
dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
size_t size, enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
return (dma_addr_t)(page_to_pfn(page)) * PAGE_SIZE + offset;
}
static inline
void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
enum dma_data_direction direction)
{
BUG_ON(direction == DMA_NONE);
}
static inline
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
}
static inline
void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
flush_write_buffers();
}
static inline
void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
}
static inline
void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
flush_write_buffers();
}
static inline
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
}
static inline
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction)
{
flush_write_buffers();
}
static inline
int dma_mapping_error(dma_addr_t dma_addr)
{
return 0;
}
static inline
int dma_supported(struct device *dev, u64 mask)
{
/*
* we fall back to GFP_DMA when the mask isn't all 1s,
* so we can't guarantee allocations that must be
* within a tighter range than GFP_DMA..
*/
if (mask < 0x00ffffff)
return 0;
return 1;
}
static inline
int dma_set_mask(struct device *dev, u64 mask)
{
if (!dev->dma_mask || !dma_supported(dev, mask))
return -EIO;
*dev->dma_mask = mask;
return 0;
}
static inline
int dma_get_cache_alignment(void)
{
return 1 << L1_CACHE_SHIFT;
}
#define dma_is_consistent(d) (1)
static inline
void dma_cache_sync(void *vaddr, size_t size,
enum dma_data_direction direction)
{
flush_write_buffers();
}
#endif /* _ASM_DMA_MAPPING_H */
/* dma.h: FRV DMA controller management
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_DMA_H
#define _ASM_DMA_H
//#define DMA_DEBUG 1
#include <linux/config.h>
#include <linux/interrupt.h>
#undef MAX_DMA_CHANNELS /* don't use kernel/dma.c */
/* under 2.4 this is actually needed by the new bootmem allocator */
#define MAX_DMA_ADDRESS PAGE_OFFSET
/*
* FRV DMA controller management
*/
struct pt_regs;
typedef irqreturn_t (*dma_irq_handler_t)(int dmachan, unsigned long cstr, void *data,
struct pt_regs *regs);
extern void frv_dma_init(void);
extern int frv_dma_open(const char *devname,
unsigned long dmamask,
int dmacap,
dma_irq_handler_t handler,
unsigned long irq_flags,
void *data);
/* channels required */
#define FRV_DMA_MASK_ANY ULONG_MAX /* any channel */
/* capabilities required */
#define FRV_DMA_CAP_DREQ 0x01 /* DMA request pin */
#define FRV_DMA_CAP_DACK 0x02 /* DMA ACK pin */
#define FRV_DMA_CAP_DONE 0x04 /* DMA done pin */
extern void frv_dma_close(int dma);
extern void frv_dma_config(int dma, unsigned long ccfr, unsigned long cctr, unsigned long apr);
extern void frv_dma_start(int dma,
unsigned long sba, unsigned long dba,
unsigned long pix, unsigned long six, unsigned long bcl);
extern void frv_dma_restart_circular(int dma, unsigned long six);
extern void frv_dma_stop(int dma);
extern int is_frv_dma_interrupting(int dma);
extern void frv_dma_dump(int dma);
extern void frv_dma_status_clear(int dma);
#define FRV_DMA_NCHANS 8
#define FRV_DMA_4CHANS 4
#define FRV_DMA_8CHANS 8
#define DMAC_CCFRx 0x00 /* channel configuration reg */
#define DMAC_CCFRx_CM_SHIFT 16
#define DMAC_CCFRx_CM_DA 0x00000000
#define DMAC_CCFRx_CM_SCA 0x00010000
#define DMAC_CCFRx_CM_DCA 0x00020000
#define DMAC_CCFRx_CM_2D 0x00030000
#define DMAC_CCFRx_ATS_SHIFT 8
#define DMAC_CCFRx_RS_INTERN 0x00000000
#define DMAC_CCFRx_RS_EXTERN 0x00000001
#define DMAC_CCFRx_RS_SHIFT 0
#define DMAC_CSTRx 0x08 /* channel status reg */
#define DMAC_CSTRx_FS 0x0000003f
#define DMAC_CSTRx_NE 0x00000100
#define DMAC_CSTRx_FED 0x00000200
#define DMAC_CSTRx_WER 0x00000800
#define DMAC_CSTRx_RER 0x00001000
#define DMAC_CSTRx_CE 0x00002000
#define DMAC_CSTRx_INT 0x00800000
#define DMAC_CSTRx_BUSY 0x80000000
#define DMAC_CCTRx 0x10 /* channel control reg */
#define DMAC_CCTRx_DSIZ_1 0x00000000
#define DMAC_CCTRx_DSIZ_2 0x00000001
#define DMAC_CCTRx_DSIZ_4 0x00000002
#define DMAC_CCTRx_DSIZ_32 0x00000005
#define DMAC_CCTRx_DAU_HOLD 0x00000000
#define DMAC_CCTRx_DAU_INC 0x00000010
#define DMAC_CCTRx_DAU_DEC 0x00000020
#define DMAC_CCTRx_SSIZ_1 0x00000000
#define DMAC_CCTRx_SSIZ_2 0x00000100
#define DMAC_CCTRx_SSIZ_4 0x00000200
#define DMAC_CCTRx_SSIZ_32 0x00000500
#define DMAC_CCTRx_SAU_HOLD 0x00000000
#define DMAC_CCTRx_SAU_INC 0x00001000
#define DMAC_CCTRx_SAU_DEC 0x00002000
#define DMAC_CCTRx_FC 0x08000000
#define DMAC_CCTRx_ICE 0x10000000
#define DMAC_CCTRx_IE 0x40000000
#define DMAC_CCTRx_ACT 0x80000000
#define DMAC_SBAx 0x18 /* source base address reg */
#define DMAC_DBAx 0x20 /* data base address reg */
#define DMAC_PIXx 0x28 /* primary index reg */
#define DMAC_SIXx 0x30 /* secondary index reg */
#define DMAC_BCLx 0x38 /* byte count limit reg */
#define DMAC_APRx 0x40 /* alternate pointer reg */
/*
* required for PCI + MODULES
*/
#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
#else
#define isa_dma_bridge_buggy (0)
#endif
#endif /* _ASM_DMA_H */
/* elf.h: FR-V ELF definitions
*
* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
* - Derived from include/asm-m68knommu/elf.h
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_ELF_H
#define __ASM_ELF_H
#include <linux/config.h>
#include <asm/ptrace.h>
#include <asm/user.h>
struct elf32_hdr;
/*
* ELF header e_flags defines.
*/
#define EF_FRV_GPR_MASK 0x00000003 /* mask for # of gprs */
#define EF_FRV_GPR32 0x00000001 /* Only uses GR on 32-register */
#define EF_FRV_GPR64 0x00000002 /* Only uses GR on 64-register */
#define EF_FRV_FPR_MASK 0x0000000c /* mask for # of fprs */
#define EF_FRV_FPR32 0x00000004 /* Only uses FR on 32-register */
#define EF_FRV_FPR64 0x00000008 /* Only uses FR on 64-register */
#define EF_FRV_FPR_NONE 0x0000000C /* Uses software floating-point */
#define EF_FRV_DWORD_MASK 0x00000030 /* mask for dword support */
#define EF_FRV_DWORD_YES 0x00000010 /* Assumes stack aligned to 8-byte boundaries. */
#define EF_FRV_DWORD_NO 0x00000020 /* Assumes stack aligned to 4-byte boundaries. */
#define EF_FRV_DOUBLE 0x00000040 /* Uses double instructions. */
#define EF_FRV_MEDIA 0x00000080 /* Uses media instructions. */
#define EF_FRV_PIC 0x00000100 /* Uses position independent code. */
#define EF_FRV_NON_PIC_RELOCS 0x00000200 /* Does not use position Independent code. */
#define EF_FRV_MULADD 0x00000400 /* -mmuladd */
#define EF_FRV_BIGPIC 0x00000800 /* -fPIC */
#define EF_FRV_LIBPIC 0x00001000 /* -mlibrary-pic */
#define EF_FRV_G0 0x00002000 /* -G 0, no small data ptr */
#define EF_FRV_NOPACK 0x00004000 /* -mnopack */
#define EF_FRV_FDPIC 0x00008000 /* -mfdpic */
#define EF_FRV_CPU_MASK 0xff000000 /* specific cpu bits */
#define EF_FRV_CPU_GENERIC 0x00000000 /* Set CPU type is FR-V */
#define EF_FRV_CPU_FR500 0x01000000 /* Set CPU type is FR500 */
#define EF_FRV_CPU_FR300 0x02000000 /* Set CPU type is FR300 */
#define EF_FRV_CPU_SIMPLE 0x03000000 /* SIMPLE */
#define EF_FRV_CPU_TOMCAT 0x04000000 /* Tomcat, FR500 prototype */
#define EF_FRV_CPU_FR400 0x05000000 /* Set CPU type is FR400 */
#define EF_FRV_CPU_FR550 0x06000000 /* Set CPU type is FR550 */
#define EF_FRV_CPU_FR405 0x07000000 /* Set CPU type is FR405 */
#define EF_FRV_CPU_FR450 0x08000000 /* Set CPU type is FR450 */
/*
* FR-V ELF relocation types
*/
/*
* ELF register definitions..
*/
typedef unsigned long elf_greg_t;
#define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t))
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
typedef struct fpmedia_struct elf_fpregset_t;
/*
* This is used to ensure we don't load something for the wrong architecture.
*/
extern int elf_check_arch(const struct elf32_hdr *hdr);
#define elf_check_fdpic(x) ((x)->e_flags & EF_FRV_FDPIC && !((x)->e_flags & EF_FRV_NON_PIC_RELOCS))
#define elf_check_const_displacement(x) ((x)->e_flags & EF_FRV_PIC)
/*
* These are used to set parameters in the core dumps.
*/
#define ELF_CLASS ELFCLASS32
#define ELF_DATA ELFDATA2MSB
#define ELF_ARCH EM_FRV
#define ELF_PLAT_INIT(_r) \
do { \
__kernel_frame0_ptr->gr16 = 0; \
__kernel_frame0_ptr->gr17 = 0; \
__kernel_frame0_ptr->gr18 = 0; \
__kernel_frame0_ptr->gr19 = 0; \
__kernel_frame0_ptr->gr20 = 0; \
__kernel_frame0_ptr->gr21 = 0; \
__kernel_frame0_ptr->gr22 = 0; \
__kernel_frame0_ptr->gr23 = 0; \
__kernel_frame0_ptr->gr24 = 0; \
__kernel_frame0_ptr->gr25 = 0; \
__kernel_frame0_ptr->gr26 = 0; \
__kernel_frame0_ptr->gr27 = 0; \
__kernel_frame0_ptr->gr29 = 0; \
} while(0)
#define ELF_FDPIC_PLAT_INIT(_regs, _exec_map_addr, _interp_map_addr, _dynamic_addr) \
do { \
__kernel_frame0_ptr->gr16 = _exec_map_addr; \
__kernel_frame0_ptr->gr17 = _interp_map_addr; \
__kernel_frame0_ptr->gr18 = _dynamic_addr; \
__kernel_frame0_ptr->gr19 = 0; \
__kernel_frame0_ptr->gr20 = 0; \
__kernel_frame0_ptr->gr21 = 0; \
__kernel_frame0_ptr->gr22 = 0; \
__kernel_frame0_ptr->gr23 = 0; \
__kernel_frame0_ptr->gr24 = 0; \
__kernel_frame0_ptr->gr25 = 0; \
__kernel_frame0_ptr->gr26 = 0; \
__kernel_frame0_ptr->gr27 = 0; \
__kernel_frame0_ptr->gr29 = 0; \
} while(0)
#define USE_ELF_CORE_DUMP
#define ELF_EXEC_PAGESIZE 16384
/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
use of this is to invoke "./ld.so someprog" to test out a new version of
the loader. We need to make sure that it is out of the way of the program
that it will "exec", and that there is sufficient room for the brk. */
#define ELF_ET_DYN_BASE 0x08000000UL
#define ELF_CORE_COPY_REGS(pr_reg, regs) \
memcpy(&pr_reg[0], &regs->sp, 31 * sizeof(uint32_t));
/* This yields a mask that user programs can use to figure out what
instruction set this cpu supports. */
#define ELF_HWCAP (0)
/* This yields a string that ld.so will use to load implementation
specific libraries for optimization. This is more specific in
intent than poking at uname or /proc/cpuinfo. */
#define ELF_PLATFORM (NULL)
#ifdef __KERNEL__
#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
#endif
#endif
#ifndef _ASM_ERRNO_H
#define _ASM_ERRNO_H
#include <asm-generic/errno.h>
#endif /* _ASM_ERRNO_H */
#ifndef _ASM_FCNTL_H
#define _ASM_FCNTL_H
/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
located on an ext2 file system */
#define O_ACCMODE 0003
#define O_RDONLY 00
#define O_WRONLY 01
#define O_RDWR 02
#define O_CREAT 0100 /* not fcntl */
#define O_EXCL 0200 /* not fcntl */
#define O_NOCTTY 0400 /* not fcntl */
#define O_TRUNC 01000 /* not fcntl */
#define O_APPEND 02000
#define O_NONBLOCK 04000
#define O_NDELAY O_NONBLOCK
#define O_SYNC 010000
#define FASYNC 020000 /* fcntl, for BSD compatibility */
#define O_DIRECT 040000 /* direct disk access hint */
#define O_LARGEFILE 0100000
#define O_DIRECTORY 0200000 /* must be a directory */
#define O_NOFOLLOW 0400000 /* don't follow links */
#define O_NOATIME 01000000
#define F_DUPFD 0 /* dup */
#define F_GETFD 1 /* get close_on_exec */
#define F_SETFD 2 /* set/clear close_on_exec */
#define F_GETFL 3 /* get file->f_flags */
#define F_SETFL 4 /* set file->f_flags */
#define F_GETLK 5
#define F_SETLK 6
#define F_SETLKW 7
#define F_SETOWN 8 /* for sockets. */
#define F_GETOWN 9 /* for sockets. */
#define F_SETSIG 10 /* for sockets. */
#define F_GETSIG 11 /* for sockets. */
#define F_GETLK64 12 /* using 'struct flock64' */
#define F_SETLK64 13
#define F_SETLKW64 14
/* for F_[GET|SET]FL */
#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
/* for posix fcntl() and lockf() */
#define F_RDLCK 0
#define F_WRLCK 1
#define F_UNLCK 2
/* for old implementation of bsd flock () */
#define F_EXLCK 4 /* or 3 */
#define F_SHLCK 8 /* or 4 */
/* for leases */
#define F_INPROGRESS 16
/* operations for bsd flock(), also used by the kernel implementation */
#define LOCK_SH 1 /* shared lock */
#define LOCK_EX 2 /* exclusive lock */
#define LOCK_NB 4 /* or'd with one of the above to prevent
blocking */
#define LOCK_UN 8 /* remove lock */
#define LOCK_MAND 32 /* This is a mandatory flock */
#define LOCK_READ 64 /* ... Which allows concurrent read operations */
#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
struct flock {
short l_type;
short l_whence;
off_t l_start;
off_t l_len;
pid_t l_pid;
};
struct flock64 {
short l_type;
short l_whence;
loff_t l_start;
loff_t l_len;
pid_t l_pid;
};
#define F_LINUX_SPECIFIC_BASE 1024
#endif /* _ASM_FCNTL_H */
#ifndef __ASM_FPU_H
#define __ASM_FPU_H
#include <linux/config.h>
/*
* MAX floating point unit state size (FSAVE/FRESTORE)
*/
#define kernel_fpu_end() do { asm volatile("bar":::"memory"); preempt_enable(); } while(0)
#endif /* __ASM_FPU_H */
/* gdb-stub.h: FRV GDB stub
*
* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
* - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_GDB_STUB_H
#define __ASM_GDB_STUB_H
#undef GDBSTUB_DEBUG_PROTOCOL
#include <asm/ptrace.h>
/*
* important register numbers in GDB protocol
* - GR0, GR1, GR2, GR3, GR4, GR5, GR6, GR7,
* - GR8, GR9, GR10, GR11, GR12, GR13, GR14, GR15,
* - GR16, GR17, GR18, GR19, GR20, GR21, GR22, GR23,
* - GR24, GR25, GR26, GR27, GR28, GR29, GR30, GR31,
* - GR32, GR33, GR34, GR35, GR36, GR37, GR38, GR39,
* - GR40, GR41, GR42, GR43, GR44, GR45, GR46, GR47,
* - GR48, GR49, GR50, GR51, GR52, GR53, GR54, GR55,
* - GR56, GR57, GR58, GR59, GR60, GR61, GR62, GR63,
* - FR0, FR1, FR2, FR3, FR4, FR5, FR6, FR7,
* - FR8, FR9, FR10, FR11, FR12, FR13, FR14, FR15,
* - FR16, FR17, FR18, FR19, FR20, FR21, FR22, FR23,
* - FR24, FR25, FR26, FR27, FR28, FR29, FR30, FR31,
* - FR32, FR33, FR34, FR35, FR36, FR37, FR38, FR39,
* - FR40, FR41, FR42, FR43, FR44, FR45, FR46, FR47,
* - FR48, FR49, FR50, FR51, FR52, FR53, FR54, FR55,
* - FR56, FR57, FR58, FR59, FR60, FR61, FR62, FR63,
* - PC, PSR, CCR, CCCR,
* - _X132, _X133, _X134
* - TBR, BRR, DBAR0, DBAR1, DBAR2, DBAR3,
* - SCR0, SCR1, SCR2, SCR3,
* - LR, LCR,
* - IACC0H, IACC0L,
* - FSR0,
* - ACC0, ACC1, ACC2, ACC3, ACC4, ACC5, ACC6, ACC7,
* - ACCG0123, ACCG4567,
* - MSR0, MSR1,
* - GNER0, GNER1,
* - FNER0, FNER1,
*/
#define GDB_REG_GR(N) (N)
#define GDB_REG_FR(N) (64+(N))
#define GDB_REG_PC 128
#define GDB_REG_PSR 129
#define GDB_REG_CCR 130
#define GDB_REG_CCCR 131
#define GDB_REG_TBR 135
#define GDB_REG_BRR 136
#define GDB_REG_DBAR(N) (137+(N))
#define GDB_REG_SCR(N) (141+(N))
#define GDB_REG_LR 145
#define GDB_REG_LCR 146
#define GDB_REG_FSR0 149
#define GDB_REG_ACC(N) (150+(N))
#define GDB_REG_ACCG(N) (158+(N)/4)
#define GDB_REG_MSR(N) (160+(N))
#define GDB_REG_GNER(N) (162+(N))
#define GDB_REG_FNER(N) (164+(N))
#define GDB_REG_SP GDB_REG_GR(1)
#define GDB_REG_FP GDB_REG_GR(2)
#ifndef _LANGUAGE_ASSEMBLY
/*
* Prototypes
*/
extern void show_registers_only(struct pt_regs *regs);
extern void gdbstub_init(void);
extern void gdbstub(int type);
extern void gdbstub_exit(int status);
extern void gdbstub_io_init(void);
extern void gdbstub_set_baud(unsigned baud);
extern int gdbstub_rx_char(unsigned char *_ch, int nonblock);
extern void gdbstub_tx_char(unsigned char ch);
extern void gdbstub_tx_flush(void);
extern void gdbstub_do_rx(void);
extern asmlinkage void __debug_stub_init_break(void);
extern asmlinkage void __break_hijack_kernel_event(void);
extern asmlinkage void start_kernel(void);
extern asmlinkage void gdbstub_rx_handler(void);
extern asmlinkage void gdbstub_rx_irq(void);
extern asmlinkage void gdbstub_intercept(void);
extern uint32_t __entry_usertrap_table[];
extern uint32_t __entry_kerneltrap_table[];
extern volatile u8 gdbstub_rx_buffer[PAGE_SIZE];
extern volatile u32 gdbstub_rx_inp;
extern volatile u32 gdbstub_rx_outp;
extern volatile u8 gdbstub_rx_overflow;
extern u8 gdbstub_rx_unget;
extern void gdbstub_printk(const char *fmt, ...);
extern void debug_to_serial(const char *p, int n);
extern void console_set_baud(unsigned baud);
#ifdef GDBSTUB_DEBUG_PROTOCOL
#define gdbstub_proto(FMT,...) gdbstub_printk(FMT,##__VA_ARGS__)
#else
#define gdbstub_proto(FMT,...) ({ 0; })
#endif
#endif /* _LANGUAGE_ASSEMBLY */
#endif /* __ASM_GDB_STUB_H */
/* gpio-regs.h: on-chip general purpose I/O registers
*
* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_GPIO_REGS
#define _ASM_GPIO_REGS
#define __reg(ADDR) (*(volatile unsigned long *)(ADDR))
#define __get_PDR() ({ __reg(0xfeff0400); })
#define __set_PDR(V) do { __reg(0xfeff0400) = (V); mb(); } while(0)
#define __get_GPDR() ({ __reg(0xfeff0408); })
#define __set_GPDR(V) do { __reg(0xfeff0408) = (V); mb(); } while(0)
#define __get_SIR() ({ __reg(0xfeff0410); })
#define __set_SIR(V) do { __reg(0xfeff0410) = (V); mb(); } while(0)
#define __get_SOR() ({ __reg(0xfeff0418); })
#define __set_SOR(V) do { __reg(0xfeff0418) = (V); mb(); } while(0)
#define __set_PDSR(V) do { __reg(0xfeff0420) = (V); mb(); } while(0)
#define __set_PDCR(V) do { __reg(0xfeff0428) = (V); mb(); } while(0)
#define __get_RSTR() ({ __reg(0xfeff0500); })
#define __set_RSTR(V) do { __reg(0xfeff0500) = (V); mb(); } while(0)
/* PDR definitions */
#define PDR_GPIO_DATA(X) (1 << (X))
/* GPDR definitions */
#define GPDR_INPUT 0
#define GPDR_OUTPUT 1
#define GPDR_DREQ0_BIT 0x00001000
#define GPDR_DREQ1_BIT 0x00008000
#define GPDR_DREQ2_BIT 0x00040000
#define GPDR_DREQ3_BIT 0x00080000
#define GPDR_DREQ4_BIT 0x00004000
#define GPDR_DREQ5_BIT 0x00020000
#define GPDR_DREQ6_BIT 0x00100000
#define GPDR_DREQ7_BIT 0x00200000
#define GPDR_DACK0_BIT 0x00002000
#define GPDR_DACK1_BIT 0x00010000
#define GPDR_DACK2_BIT 0x00100000
#define GPDR_DACK3_BIT 0x00200000
#define GPDR_DONE0_BIT 0x00004000
#define GPDR_DONE1_BIT 0x00020000
#define GPDR_GPIO_DIR(X,D) ((D) << (X))
/* SIR definitions */
#define SIR_GPIO_INPUT 0
#define SIR_DREQ7_INPUT 0x00200000
#define SIR_DREQ6_INPUT 0x00100000
#define SIR_DREQ3_INPUT 0x00080000
#define SIR_DREQ2_INPUT 0x00040000
#define SIR_DREQ5_INPUT 0x00020000
#define SIR_DREQ1_INPUT 0x00008000
#define SIR_DREQ4_INPUT 0x00004000
#define SIR_DREQ0_INPUT 0x00001000
#define SIR_RXD1_INPUT 0x00000400
#define SIR_CTS0_INPUT 0x00000100
#define SIR_RXD0_INPUT 0x00000040
#define SIR_GATE1_INPUT 0x00000020
#define SIR_GATE0_INPUT 0x00000010
#define SIR_IRQ3_INPUT 0x00000008
#define SIR_IRQ2_INPUT 0x00000004
#define SIR_IRQ1_INPUT 0x00000002
#define SIR_IRQ0_INPUT 0x00000001
#define SIR_DREQ_BITS (SIR_DREQ0_INPUT | SIR_DREQ1_INPUT | \
SIR_DREQ2_INPUT | SIR_DREQ3_INPUT | \
SIR_DREQ4_INPUT | SIR_DREQ5_INPUT | \
SIR_DREQ6_INPUT | SIR_DREQ7_INPUT)
/* SOR definitions */
#define SOR_GPIO_OUTPUT 0
#define SOR_DACK3_OUTPUT 0x00200000
#define SOR_DACK2_OUTPUT 0x00100000
#define SOR_DONE1_OUTPUT 0x00020000
#define SOR_DACK1_OUTPUT 0x00010000
#define SOR_DONE0_OUTPUT 0x00004000
#define SOR_DACK0_OUTPUT 0x00002000
#define SOR_TXD1_OUTPUT 0x00000800
#define SOR_RTS0_OUTPUT 0x00000200
#define SOR_TXD0_OUTPUT 0x00000080
#define SOR_TOUT1_OUTPUT 0x00000020
#define SOR_TOUT0_OUTPUT 0x00000010
#define SOR_DONE_BITS (SOR_DONE0_OUTPUT | SOR_DONE1_OUTPUT)
#define SOR_DACK_BITS (SOR_DACK0_OUTPUT | SOR_DACK1_OUTPUT | \
SOR_DACK2_OUTPUT | SOR_DACK3_OUTPUT)
/* PDSR definitions */
#define PDSR_UNCHANGED 0
#define PDSR_SET_BIT(X) (1 << (X))
/* PDCR definitions */
#define PDCR_UNCHANGED 0
#define PDCR_CLEAR_BIT(X) (1 << (X))
/* RSTR definitions */
/* Read Only */
#define RSTR_POWERON 0x00000400
#define RSTR_SOFTRESET_STATUS 0x00000100
/* Write Only */
#define RSTR_SOFTRESET 0x00000001
#endif /* _ASM_GPIO_REGS */
/* hardirq.h: FRV hardware IRQ management
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_HARDIRQ_H
#define __ASM_HARDIRQ_H
#include <linux/config.h>
#include <linux/threads.h>
typedef struct {
unsigned int __softirq_pending;
unsigned long idle_timestamp;
} ____cacheline_aligned irq_cpustat_t;
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
#define irq_enter() (preempt_count() += HARDIRQ_OFFSET)
#define nmi_enter() (irq_enter())
#define nmi_exit() (preempt_count() -= HARDIRQ_OFFSET)
#define irq_exit() \
do { \
preempt_count() -= IRQ_EXIT_OFFSET; \
if (!in_interrupt() && softirq_pending(smp_processor_id())) \
do_softirq(); \
preempt_enable_no_resched(); \
} while (0)
#ifdef CONFIG_SMP
#error SMP not available on FR-V
#endif /* CONFIG_SMP */
#endif
/* highmem.h: virtual kernel memory mappings for high memory
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
* - Derived from include/asm-i386/highmem.h
*
* See Documentation/fujitsu/frv/mmu-layout.txt for more information.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_HIGHMEM_H
#define _ASM_HIGHMEM_H
#ifdef __KERNEL__
#include <linux/config.h>
#include <linux/init.h>
#include <asm/mem-layout.h>
#include <asm/spr-regs.h>
#include <asm/mb-regs.h>
#define NR_TLB_LINES 64 /* number of lines in the TLB */
#ifndef __ASSEMBLY__
#include <linux/interrupt.h>
#include <asm/kmap_types.h>
#include <asm/pgtable.h>
#ifdef CONFIG_DEBUG_HIGHMEM
#define HIGHMEM_DEBUG 1
#else
#define HIGHMEM_DEBUG 0
#endif
/* declarations for highmem.c */
extern unsigned long highstart_pfn, highend_pfn;
#define kmap_prot PAGE_KERNEL
#define kmap_pte ______kmap_pte_in_TLB
extern pte_t *pkmap_page_table;
extern void kmap_init(void);
#define flush_cache_kmaps() do { } while (0)
/*
* Right now we initialize only a single pte table. It can be extended
* easily, subsequent pte tables have to be allocated in one physical
* chunk of RAM.
*/
#define LAST_PKMAP PTRS_PER_PTE
#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
extern void *kmap_high(struct page *page);
extern void kunmap_high(struct page *page);
extern void *kmap(struct page *page);
extern void kunmap(struct page *page);
extern struct page *kmap_atomic_to_page(void *ptr);
#endif /* !__ASSEMBLY__ */
/*
* The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
* gives a more generic (and caching) interface. But kmap_atomic can
* be used in IRQ contexts, so in some (very limited) cases we need
* it.
*/
#define KMAP_ATOMIC_CACHE_DAMR 8
#ifndef __ASSEMBLY__
#define __kmap_atomic_primary(type, paddr, ampr) \
({ \
unsigned long damlr, dampr; \
\
dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
\
if (type != __KM_CACHE) \
asm volatile("movgs %0,dampr"#ampr :: "r"(dampr)); \
else \
asm volatile("movgs %0,iampr"#ampr"\n" \
"movgs %0,dampr"#ampr"\n" \
:: "r"(dampr) \
); \
\
asm("movsg damlr"#ampr",%0" : "=r"(damlr)); \
\
/*printk("DAMR"#ampr": PRIM sl=%d L=%08lx P=%08lx\n", type, damlr, dampr);*/ \
\
(void *) damlr; \
})
#define __kmap_atomic_secondary(slot, paddr) \
({ \
unsigned long damlr = KMAP_ATOMIC_SECONDARY_FRAME + (slot) * PAGE_SIZE; \
unsigned long dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
\
asm volatile("movgs %0,tplr \n" \
"movgs %1,tppr \n" \
"tlbpr %0,gr0,#2,#1" \
: : "r"(damlr), "r"(dampr)); \
\
/*printk("TLB: SECN sl=%d L=%08lx P=%08lx\n", slot, damlr, dampr);*/ \
\
(void *) damlr; \
})
static inline void *kmap_atomic(struct page *page, enum km_type type)
{
unsigned long paddr;
preempt_disable();
paddr = page_to_phys(page);
switch (type) {
case 0: return __kmap_atomic_primary(0, paddr, 2);
case 1: return __kmap_atomic_primary(1, paddr, 3);
case 2: return __kmap_atomic_primary(2, paddr, 4);
case 3: return __kmap_atomic_primary(3, paddr, 5);
case 4: return __kmap_atomic_primary(4, paddr, 6);
case 5: return __kmap_atomic_primary(5, paddr, 7);
case 6: return __kmap_atomic_primary(6, paddr, 8);
case 7: return __kmap_atomic_primary(7, paddr, 9);
case 8: return __kmap_atomic_primary(8, paddr, 10);
case 9 ... 9 + NR_TLB_LINES - 1:
return __kmap_atomic_secondary(type - 9, paddr);
default:
BUG();
return 0;
}
}
#define __kunmap_atomic_primary(type, ampr) \
do { \
asm volatile("movgs gr0,dampr"#ampr"\n"); \
if (type == __KM_CACHE) \
asm volatile("movgs gr0,iampr"#ampr"\n"); \
} while(0)
#define __kunmap_atomic_secondary(slot, vaddr) \
do { \
asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr)); \
} while(0)
static inline void kunmap_atomic(void *kvaddr, enum km_type type)
{
switch (type) {
case 0: __kunmap_atomic_primary(0, 2); break;
case 1: __kunmap_atomic_primary(1, 3); break;
case 2: __kunmap_atomic_primary(2, 4); break;
case 3: __kunmap_atomic_primary(3, 5); break;
case 4: __kunmap_atomic_primary(4, 6); break;
case 5: __kunmap_atomic_primary(5, 7); break;
case 6: __kunmap_atomic_primary(6, 8); break;
case 7: __kunmap_atomic_primary(7, 9); break;
case 8: __kunmap_atomic_primary(8, 10); break;
case 9 ... 9 + NR_TLB_LINES - 1:
__kunmap_atomic_secondary(type - 9, kvaddr);
break;
default:
BUG();
}
preempt_enable();
}
#endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_HIGHMEM_H */
/* hw_irq.h: FR-V specific h/w IRQ stuff
*
* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_HW_IRQ_H
#define _ASM_HW_IRQ_H
#endif /* _ASM_HW_IRQ_H */
/* ide.h: FRV IDE declarations
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _ASM_IDE_H
#define _ASM_IDE_H
#ifdef __KERNEL__
#include <linux/config.h>
#include <asm/setup.h>
#include <asm/io.h>
#include <asm/irq.h>
#undef SUPPORT_SLOW_DATA_PORTS
#define SUPPORT_SLOW_DATA_PORTS 0
#undef SUPPORT_VLB_SYNC
#define SUPPORT_VLB_SYNC 0
#ifndef MAX_HWIFS
#define MAX_HWIFS 8
#endif
/****************************************************************************/
/*
* some bits needed for parts of the IDE subsystem to compile
*/
#define __ide_mm_insw(port, addr, n) insw(port, addr, n)
#define __ide_mm_insl(port, addr, n) insl(port, addr, n)
#define __ide_mm_outsw(port, addr, n) outsw(port, addr, n)
#define __ide_mm_outsl(port, addr, n) outsl(port, addr, n)
#endif /* __KERNEL__ */
#endif /* _ASM_IDE_H */
#ifndef _ASM_INIT_H
#define _ASM_INIT_H
#define __init __attribute__ ((__section__ (".text.init")))
#define __initdata __attribute__ ((__section__ (".data.init")))
/* For assembly routines */
#define __INIT .section ".text.init",#alloc,#execinstr
#define __FINIT .previous
#define __INITDATA .section ".data.init",#alloc,#write
#endif
/* io.h: FRV I/O operations
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* This gets interesting when talking to the PCI bus - the CPU is in big endian
* mode, the PCI bus is little endian and the hardware in the middle can do
* byte swapping
*/
#ifndef _ASM_IO_H
#define _ASM_IO_H
#ifdef __KERNEL__
#include <linux/config.h>
#include <asm/virtconvert.h>
#include <asm/string.h>
#include <asm/mb-regs.h>
#include <linux/delay.h>
/*
* swap functions are sometimes needed to interface little-endian hardware
*/
static inline unsigned short _swapw(unsigned short v)
{
return ((v << 8) | (v >> 8));
}
static inline unsigned long _swapl(unsigned long v)
{
return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24));
}
//#define __iormb() asm volatile("membar")
//#define __iowmb() asm volatile("membar")
#define __raw_readb(addr) __builtin_read8((void *) (addr))
#define __raw_readw(addr) __builtin_read16((void *) (addr))
#define __raw_readl(addr) __builtin_read32((void *) (addr))
#define __raw_writeb(datum, addr) __builtin_write8((void *) (addr), datum)
#define __raw_writew(datum, addr) __builtin_write16((void *) (addr), datum)
#define __raw_writel(datum, addr) __builtin_write32((void *) (addr), datum)
static inline void io_outsb(unsigned int addr, const void *buf, int len)
{
unsigned long __ioaddr = (unsigned long) addr;
const uint8_t *bp = buf;
while (len--)
__builtin_write8((volatile void __iomem *) __ioaddr, *bp++);
}
static inline void io_outsw(unsigned int addr, const void *buf, int len)
{
unsigned long __ioaddr = (unsigned long) addr;
const uint16_t *bp = buf;
while (len--)
__builtin_write16((volatile void __iomem *) __ioaddr, (*bp++));
}
extern void __outsl_ns(unsigned int addr, const void *buf, int len);
extern void __outsl_sw(unsigned int addr, const void *buf, int len);
static inline void __outsl(unsigned int addr, const void *buf, int len, int swap)
{
unsigned long __ioaddr = (unsigned long) addr;
if (!swap)
__outsl_ns(__ioaddr, buf, len);
else
__outsl_sw(__ioaddr, buf, len);
}
static inline void io_insb(unsigned long addr, void *buf, int len)
{
uint8_t *bp = buf;
while (len--)
*bp++ = __builtin_read8((volatile void __iomem *) addr);
}
static inline void io_insw(unsigned long addr, void *buf, int len)
{
uint16_t *bp = buf;
while (len--)
*bp++ = __builtin_read16((volatile void __iomem *) addr);
}
extern void __insl_ns(unsigned long addr, void *buf, int len);
extern void __insl_sw(unsigned long addr, void *buf, int len);
static inline void __insl(unsigned long addr, void *buf, int len, int swap)
{
if (!swap)
__insl_ns(addr, buf, len);
else
__insl_sw(addr, buf, len);
}
/*
* make the short names macros so specific devices
* can override them as required
*/
static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
{
memset((void __force *) addr, val, count);
}
static inline void memcpy_fromio(void *dst, volatile void __iomem *src, int count)
{
memcpy(dst, (void __force *) src, count);
}
static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
{
memcpy((void __force *) dst, src, count);
}
static inline uint8_t inb(unsigned long addr)
{
return __builtin_read8((void *)addr);
}
static inline uint16_t inw(unsigned long addr)
{
uint16_t ret = __builtin_read16((void *)addr);
if (__is_PCI_IO(addr))
ret = _swapw(ret);
return ret;
}
static inline uint32_t inl(unsigned long addr)
{
uint32_t ret = __builtin_read32((void *)addr);
if (__is_PCI_IO(addr))
ret = _swapl(ret);
return ret;
}
static inline void outb(uint8_t datum, unsigned long addr)
{
__builtin_write8((void *)addr, datum);
}
static inline void outw(uint16_t datum, unsigned long addr)
{
if (__is_PCI_IO(addr))
datum = _swapw(datum);
__builtin_write16((void *)addr, datum);
}
static inline void outl(uint32_t datum, unsigned long addr)
{
if (__is_PCI_IO(addr))
datum = _swapl(datum);
__builtin_write32((void *)addr, datum);
}
#define inb_p(addr) inb(addr)
#define inw_p(addr) inw(addr)
#define inl_p(addr) inl(addr)
#define outb_p(x,addr) outb(x,addr)
#define outw_p(x,addr) outw(x,addr)
#define outl_p(x,addr) outl(x,addr)
#define outsb(a,b,l) io_outsb(a,b,l)
#define outsw(a,b,l) io_outsw(a,b,l)
#define outsl(a,b,l) __outsl(a,b,l,0)
#define insb(a,b,l) io_insb(a,b,l)
#define insw(a,b,l) io_insw(a,b,l)
#define insl(a,b,l) __insl(a,b,l,0)
#define IO_SPACE_LIMIT 0xffffffff
static inline uint8_t readb(const volatile void __iomem *addr)
{
return __builtin_read8((volatile uint8_t __force *) addr);
}
static inline uint16_t readw(const volatile void __iomem *addr)
{
uint16_t ret = __builtin_read16((volatile uint16_t __force *)addr);
if (__is_PCI_MEM(addr))
ret = _swapw(ret);
return ret;
}
static inline uint32_t readl(const volatile void __iomem *addr)
{
uint32_t ret = __builtin_read32((volatile uint32_t __force *)addr);
if (__is_PCI_MEM(addr))
ret = _swapl(ret);
return ret;
}
static inline void writeb(uint8_t datum, volatile void __iomem *addr)
{
__builtin_write8((volatile uint8_t __force *) addr, datum);
if (__is_PCI_MEM(addr))
__flush_PCI_writes();
}
static inline void writew(uint16_t datum, volatile void __iomem *addr)
{
if (__is_PCI_MEM(addr))
datum = _swapw(datum);
__builtin_write16((volatile uint16_t __force *) addr, datum);
if (__is_PCI_MEM(addr))
__flush_PCI_writes();
}
static inline void writel(uint32_t datum, volatile void __iomem *addr)
{
if (__is_PCI_MEM(addr))
datum = _swapl(datum);
__builtin_write32((volatile uint32_t __force *) addr, datum);
if (__is_PCI_MEM(addr))
__flush_PCI_writes();
}
/* Values for nocacheflag and cmode */
#define IOMAP_FULL_CACHING 0
#define IOMAP_NOCACHE_SER 1
#define IOMAP_NOCACHE_NONSER 2
#define IOMAP_WRITETHROUGH 3
extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
extern void __iounmap(void __iomem *addr, unsigned long size);
static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
}
static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
}
static inline void __iomem *ioremap_writethrough(unsigned long physaddr, unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
}
static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
}
extern void iounmap(void __iomem *addr);
static inline void flush_write_buffers(void)
{
__asm__ __volatile__ ("membar" : : :"memory");
}
#endif /* __KERNEL__ */
#endif /* _ASM_IO_H */
/*
* linux/ioctl.h for Linux by H.H. Bergman.
*/
#ifndef _ASM_IOCTL_H
#define _ASM_IOCTL_H
/* ioctl command encoding: 32 bits total, command in lower 16 bits,
* size of the parameter structure in the lower 14 bits of the
* upper 16 bits.
* Encoding the size of the parameter structure in the ioctl request
* is useful for catching programs compiled with old versions
* and to avoid overwriting user space outside the user buffer area.
* The highest 2 bits are reserved for indicating the ``access mode''.
* NOTE: This limits the max parameter size to 16kB -1 !
*/
/*
* I don't really have any idea about what this should look like, so
* for the time being, this is heavily based on the PC definitions.
*/
/*
* The following is for compatibility across the various Linux
* platforms. The i386 ioctl numbering scheme doesn't really enforce
* a type field. De facto, however, the top 8 bits of the lower 16
* bits are indeed used as a type field, so we might just as well make
* this explicit here. Please be sure to use the decoding macros
* below from now on.
*/
#define _IOC_NRBITS 8
#define _IOC_TYPEBITS 8
#define _IOC_SIZEBITS 14
#define _IOC_DIRBITS 2
#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
#define _IOC_NRSHIFT 0
#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS)
#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS)
#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
/*
* Direction bits.
*/
#define _IOC_NONE 0U
#define _IOC_WRITE 1U
#define _IOC_READ 2U
#define _IOC(dir,type,nr,size) \
(((dir) << _IOC_DIRSHIFT) | \
((type) << _IOC_TYPESHIFT) | \
((nr) << _IOC_NRSHIFT) | \
((size) << _IOC_SIZESHIFT))
/* used to create numbers */
#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
/* used to decode ioctl numbers.. */
#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
/* ...and for the drivers/sound files... */
#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT)
#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT)
#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT)
#define IOCSIZE_SHIFT (_IOC_SIZESHIFT)
#endif /* _ASM_IOCTL_H */
#ifndef __ASM_IOCTLS_H__
#define __ASM_IOCTLS_H__
#include <asm/ioctl.h>
/* 0x54 is just a magic number to make these relatively unique ('T') */
#define TCGETS 0x5401
#define TCSETS 0x5402
#define TCSETSW 0x5403
#define TCSETSF 0x5404
#define TCGETA 0x5405
#define TCSETA 0x5406
#define TCSETAW 0x5407
#define TCSETAF 0x5408
#define TCSBRK 0x5409
#define TCXONC 0x540A
#define TCFLSH 0x540B
#define TIOCEXCL 0x540C
#define TIOCNXCL 0x540D
#define TIOCSCTTY 0x540E
#define TIOCGPGRP 0x540F
#define TIOCSPGRP 0x5410
#define TIOCOUTQ 0x5411
#define TIOCSTI 0x5412
#define TIOCGWINSZ 0x5413
#define TIOCSWINSZ 0x5414
#define TIOCMGET 0x5415
#define TIOCMBIS 0x5416
#define TIOCMBIC 0x5417
#define TIOCMSET 0x5418
#define TIOCGSOFTCAR 0x5419
#define TIOCSSOFTCAR 0x541A
#define FIONREAD 0x541B
#define TIOCINQ FIONREAD
#define TIOCLINUX 0x541C
#define TIOCCONS 0x541D
#define TIOCGSERIAL 0x541E
#define TIOCSSERIAL 0x541F
#define TIOCPKT 0x5420
#define FIONBIO 0x5421
#define TIOCNOTTY 0x5422
#define TIOCSETD 0x5423
#define TIOCGETD 0x5424
#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */
#define TIOCSBRK 0x5427 /* BSD compatibility */
#define TIOCCBRK 0x5428 /* BSD compatibility */
#define TIOCGSID 0x5429 /* Return the session ID of FD */
#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
#define FIOCLEX 0x5451
#define FIOASYNC 0x5452
#define TIOCSERCONFIG 0x5453
#define TIOCSERGWILD 0x5454
#define TIOCSERSWILD 0x5455
#define TIOCGLCKTRMIOS 0x5456
#define TIOCSLCKTRMIOS 0x5457
#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
#define TIOCSERGETLSR 0x5459 /* Get line status register */
#define TIOCSERGETMULTI 0x545A /* Get multiport config */
#define TIOCSERSETMULTI 0x545B /* Set multiport config */
#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
#define FIOQSIZE 0x545E
/* Used for packet mode */
#define TIOCPKT_DATA 0
#define TIOCPKT_FLUSHREAD 1
#define TIOCPKT_FLUSHWRITE 2
#define TIOCPKT_STOP 4
#define TIOCPKT_START 8
#define TIOCPKT_NOSTOP 16
#define TIOCPKT_DOSTOP 32
#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
#endif /* __ASM_IOCTLS_H__ */
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