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Commit 4aefe155 authored by Jeff Garzik's avatar Jeff Garzik
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Merge git://git.tuxdriver.com/git/netdev-jwl

parents f912696a d3808760
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Showing with 3160 additions and 1743 deletions
drivers/net/bnx2.c
View file @ 4aefe155
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drivers/net/bnx2.h
View file @ 4aefe155
......@@ -1449,8 +1449,9 @@ struct l2_fhdr {
#define BNX2_EMAC_MODE_PORT_NONE (0L<<2)
#define BNX2_EMAC_MODE_PORT_MII (1L<<2)
#define BNX2_EMAC_MODE_PORT_GMII (2L<<2)
#define BNX2_EMAC_MODE_PORT_UNDEF (3L<<2)
#define BNX2_EMAC_MODE_PORT_MII_10 (3L<<2)
#define BNX2_EMAC_MODE_MAC_LOOP (1L<<4)
#define BNX2_EMAC_MODE_25G (1L<<5)
#define BNX2_EMAC_MODE_TAGGED_MAC_CTL (1L<<7)
#define BNX2_EMAC_MODE_TX_BURST (1L<<8)
#define BNX2_EMAC_MODE_MAX_DEFER_DROP_ENA (1L<<9)
......@@ -3714,6 +3715,15 @@ struct l2_fhdr {
#define BNX2_MCP_ROM 0x00150000
#define BNX2_MCP_SCRATCH 0x00160000
#define BNX2_SHM_HDR_SIGNATURE BNX2_MCP_SCRATCH
#define BNX2_SHM_HDR_SIGNATURE_SIG_MASK 0xffff0000
#define BNX2_SHM_HDR_SIGNATURE_SIG 0x53530000
#define BNX2_SHM_HDR_SIGNATURE_VER_MASK 0x000000ff
#define BNX2_SHM_HDR_SIGNATURE_VER_ONE 0x00000001
#define BNX2_SHM_HDR_ADDR_0 BNX2_MCP_SCRATCH + 4
#define BNX2_SHM_HDR_ADDR_1 BNX2_MCP_SCRATCH + 8
#define NUM_MC_HASH_REGISTERS 8
......@@ -3724,6 +3734,53 @@ struct l2_fhdr {
#define PHY_ID(id) ((id) & 0xfffffff0)
#define PHY_REV_ID(id) ((id) & 0xf)
/* 5708 Serdes PHY registers */
#define BCM5708S_UP1 0xb
#define BCM5708S_UP1_2G5 0x1
#define BCM5708S_BLK_ADDR 0x1f
#define BCM5708S_BLK_ADDR_DIG 0x0000
#define BCM5708S_BLK_ADDR_DIG3 0x0002
#define BCM5708S_BLK_ADDR_TX_MISC 0x0005
/* Digital Block */
#define BCM5708S_1000X_CTL1 0x10
#define BCM5708S_1000X_CTL1_FIBER_MODE 0x0001
#define BCM5708S_1000X_CTL1_AUTODET_EN 0x0010
#define BCM5708S_1000X_CTL2 0x11
#define BCM5708S_1000X_CTL2_PLLEL_DET_EN 0x0001
#define BCM5708S_1000X_STAT1 0x14
#define BCM5708S_1000X_STAT1_SGMII 0x0001
#define BCM5708S_1000X_STAT1_LINK 0x0002
#define BCM5708S_1000X_STAT1_FD 0x0004
#define BCM5708S_1000X_STAT1_SPEED_MASK 0x0018
#define BCM5708S_1000X_STAT1_SPEED_10 0x0000
#define BCM5708S_1000X_STAT1_SPEED_100 0x0008
#define BCM5708S_1000X_STAT1_SPEED_1G 0x0010
#define BCM5708S_1000X_STAT1_SPEED_2G5 0x0018
#define BCM5708S_1000X_STAT1_TX_PAUSE 0x0020
#define BCM5708S_1000X_STAT1_RX_PAUSE 0x0040
/* Digital3 Block */
#define BCM5708S_DIG_3_0 0x10
#define BCM5708S_DIG_3_0_USE_IEEE 0x0001
/* Tx/Misc Block */
#define BCM5708S_TX_ACTL1 0x15
#define BCM5708S_TX_ACTL1_DRIVER_VCM 0x30
#define BCM5708S_TX_ACTL3 0x17
#define MIN_ETHERNET_PACKET_SIZE 60
#define MAX_ETHERNET_PACKET_SIZE 1514
#define MAX_ETHERNET_JUMBO_PACKET_SIZE 9014
......@@ -3799,7 +3856,7 @@ struct sw_bd {
#define BUFFERED_FLASH_PHY_PAGE_SIZE (1 << BUFFERED_FLASH_PAGE_BITS)
#define BUFFERED_FLASH_BYTE_ADDR_MASK (BUFFERED_FLASH_PHY_PAGE_SIZE-1)
#define BUFFERED_FLASH_PAGE_SIZE 264
#define BUFFERED_FLASH_TOTAL_SIZE 131072
#define BUFFERED_FLASH_TOTAL_SIZE 0x21000
#define SAIFUN_FLASH_PAGE_BITS 8
#define SAIFUN_FLASH_PHY_PAGE_SIZE (1 << SAIFUN_FLASH_PAGE_BITS)
......@@ -3807,6 +3864,12 @@ struct sw_bd {
#define SAIFUN_FLASH_PAGE_SIZE 256
#define SAIFUN_FLASH_BASE_TOTAL_SIZE 65536
#define ST_MICRO_FLASH_PAGE_BITS 8
#define ST_MICRO_FLASH_PHY_PAGE_SIZE (1 << ST_MICRO_FLASH_PAGE_BITS)
#define ST_MICRO_FLASH_BYTE_ADDR_MASK (ST_MICRO_FLASH_PHY_PAGE_SIZE-1)
#define ST_MICRO_FLASH_PAGE_SIZE 256
#define ST_MICRO_FLASH_BASE_TOTAL_SIZE 65536
#define NVRAM_TIMEOUT_COUNT 30000
......@@ -3815,6 +3878,8 @@ struct sw_bd {
BNX2_NVM_CFG1_PROTECT_MODE | \
BNX2_NVM_CFG1_FLASH_SIZE)
#define FLASH_BACKUP_STRAP_MASK (0xf << 26)
struct flash_spec {
u32 strapping;
u32 config1;
......@@ -3849,6 +3914,9 @@ struct bnx2 {
u16 tx_cons;
int tx_ring_size;
u16 hw_tx_cons;
u16 hw_rx_cons;
#ifdef BCM_VLAN
struct vlan_group *vlgrp;
#endif
......@@ -3893,6 +3961,7 @@ struct bnx2 {
#define PHY_SERDES_FLAG 1
#define PHY_CRC_FIX_FLAG 2
#define PHY_PARALLEL_DETECT_FLAG 4
#define PHY_2_5G_CAPABLE_FLAG 8
#define PHY_INT_MODE_MASK_FLAG 0x300
#define PHY_INT_MODE_AUTO_POLLING_FLAG 0x100
#define PHY_INT_MODE_LINK_READY_FLAG 0x200
......@@ -3901,6 +3970,7 @@ struct bnx2 {
/* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */
#define CHIP_NUM(bp) (((bp)->chip_id) & 0xffff0000)
#define CHIP_NUM_5706 0x57060000
#define CHIP_NUM_5708 0x57080000
#define CHIP_REV(bp) (((bp)->chip_id) & 0x0000f000)
#define CHIP_REV_Ax 0x00000000
......@@ -3913,6 +3983,9 @@ struct bnx2 {
#define CHIP_ID(bp) (((bp)->chip_id) & 0xfffffff0)
#define CHIP_ID_5706_A0 0x57060000
#define CHIP_ID_5706_A1 0x57060010
#define CHIP_ID_5706_A2 0x57060020
#define CHIP_ID_5708_A0 0x57080000
#define CHIP_ID_5708_B0 0x57081000
#define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf)
......@@ -3991,6 +4064,8 @@ struct bnx2 {
u8 mac_addr[8];
u32 shmem_base;
u32 fw_ver;
int pm_cap;
......@@ -4130,14 +4205,46 @@ struct fw_info {
#define BNX2_FW_MSG_STATUS_FAILURE 0x00ff0000
#define BNX2_LINK_STATUS 0x0000000c
#define BNX2_LINK_STATUS_INIT_VALUE 0xffffffff
#define BNX2_LINK_STATUS_LINK_UP 0x1
#define BNX2_LINK_STATUS_LINK_DOWN 0x0
#define BNX2_LINK_STATUS_SPEED_MASK 0x1e
#define BNX2_LINK_STATUS_AN_INCOMPLETE (0<<1)
#define BNX2_LINK_STATUS_10HALF (1<<1)
#define BNX2_LINK_STATUS_10FULL (2<<1)
#define BNX2_LINK_STATUS_100HALF (3<<1)
#define BNX2_LINK_STATUS_100BASE_T4 (4<<1)
#define BNX2_LINK_STATUS_100FULL (5<<1)
#define BNX2_LINK_STATUS_1000HALF (6<<1)
#define BNX2_LINK_STATUS_1000FULL (7<<1)
#define BNX2_LINK_STATUS_2500HALF (8<<1)
#define BNX2_LINK_STATUS_2500FULL (9<<1)
#define BNX2_LINK_STATUS_AN_ENABLED (1<<5)
#define BNX2_LINK_STATUS_AN_COMPLETE (1<<6)
#define BNX2_LINK_STATUS_PARALLEL_DET (1<<7)
#define BNX2_LINK_STATUS_RESERVED (1<<8)
#define BNX2_LINK_STATUS_PARTNER_AD_1000FULL (1<<9)
#define BNX2_LINK_STATUS_PARTNER_AD_1000HALF (1<<10)
#define BNX2_LINK_STATUS_PARTNER_AD_100BT4 (1<<11)
#define BNX2_LINK_STATUS_PARTNER_AD_100FULL (1<<12)
#define BNX2_LINK_STATUS_PARTNER_AD_100HALF (1<<13)
#define BNX2_LINK_STATUS_PARTNER_AD_10FULL (1<<14)
#define BNX2_LINK_STATUS_PARTNER_AD_10HALF (1<<15)
#define BNX2_LINK_STATUS_TX_FC_ENABLED (1<<16)
#define BNX2_LINK_STATUS_RX_FC_ENABLED (1<<17)
#define BNX2_LINK_STATUS_PARTNER_SYM_PAUSE_CAP (1<<18)
#define BNX2_LINK_STATUS_PARTNER_ASYM_PAUSE_CAP (1<<19)
#define BNX2_LINK_STATUS_SERDES_LINK (1<<20)
#define BNX2_LINK_STATUS_PARTNER_AD_2500FULL (1<<21)
#define BNX2_LINK_STATUS_PARTNER_AD_2500HALF (1<<22)
#define BNX2_DRV_PULSE_MB 0x00000010
#define BNX2_DRV_PULSE_SEQ_MASK 0x0000ffff
#define BNX2_DRV_PULSE_SEQ_MASK 0x00007fff
/* Indicate to the firmware not to go into the
* OS absent when it is not getting driver pulse.
* This is used for debugging. */
#define BNX2_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE 0x00010000
#define BNX2_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE 0x00080000
#define BNX2_DEV_INFO_SIGNATURE 0x00000020
#define BNX2_DEV_INFO_SIGNATURE_MAGIC 0x44564900
......@@ -4160,6 +4267,8 @@ struct fw_info {
#define BNX2_SHARED_HW_CFG_DESIGN_LOM 0x1
#define BNX2_SHARED_HW_CFG_PHY_COPPER 0
#define BNX2_SHARED_HW_CFG_PHY_FIBER 0x2
#define BNX2_SHARED_HW_CFG_PHY_2_5G 0x20
#define BNX2_SHARED_HW_CFG_PHY_BACKPLANE 0x40
#define BNX2_SHARED_HW_CFG_LED_MODE_SHIFT_BITS 8
#define BNX2_SHARED_HW_CFG_LED_MODE_MASK 0x300
#define BNX2_SHARED_HW_CFG_LED_MODE_MAC 0
......@@ -4173,9 +4282,11 @@ struct fw_info {
#define BNX2_PORT_HW_CFG_MAC_LOWER 0x00000054
#define BNX2_PORT_HW_CFG_CONFIG 0x00000058
#define BNX2_PORT_HW_CFG_CFG_TXCTL3_MASK 0x0000ffff
#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_MASK 0x001f0000
#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_AN 0x00000000
#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_1G 0x00030000
#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_2_5G 0x00040000
#define BNX2_PORT_HW_CFG_IMD_MAC_A_UPPER 0x00000068
#define BNX2_PORT_HW_CFG_IMD_MAC_A_LOWER 0x0000006c
......
drivers/net/bnx2_fw.h
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drivers/net/e1000/e1000_ethtool.c
View file @ 4aefe155
......@@ -1739,7 +1739,7 @@ e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
}
}
struct ethtool_ops e1000_ethtool_ops = {
static struct ethtool_ops e1000_ethtool_ops = {
.get_settings = e1000_get_settings,
.set_settings = e1000_set_settings,
.get_drvinfo = e1000_get_drvinfo,
......
drivers/net/e1000/e1000_hw.c
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drivers/net/e1000/e1000_hw.h
View file @ 4aefe155
......@@ -284,7 +284,6 @@ typedef enum {
/* Initialization */
int32_t e1000_reset_hw(struct e1000_hw *hw);
int32_t e1000_init_hw(struct e1000_hw *hw);
int32_t e1000_id_led_init(struct e1000_hw * hw);
int32_t e1000_set_mac_type(struct e1000_hw *hw);
void e1000_set_media_type(struct e1000_hw *hw);
......@@ -292,10 +291,8 @@ void e1000_set_media_type(struct e1000_hw *hw);
int32_t e1000_setup_link(struct e1000_hw *hw);
int32_t e1000_phy_setup_autoneg(struct e1000_hw *hw);
void e1000_config_collision_dist(struct e1000_hw *hw);
int32_t e1000_config_fc_after_link_up(struct e1000_hw *hw);
int32_t e1000_check_for_link(struct e1000_hw *hw);
int32_t e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t * speed, uint16_t * duplex);
int32_t e1000_wait_autoneg(struct e1000_hw *hw);
int32_t e1000_force_mac_fc(struct e1000_hw *hw);
/* PHY */
......@@ -303,21 +300,11 @@ int32_t e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy
int32_t e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data);
int32_t e1000_phy_hw_reset(struct e1000_hw *hw);
int32_t e1000_phy_reset(struct e1000_hw *hw);
int32_t e1000_detect_gig_phy(struct e1000_hw *hw);
int32_t e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
int32_t e1000_phy_m88_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
int32_t e1000_phy_igp_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
int32_t e1000_get_cable_length(struct e1000_hw *hw, uint16_t *min_length, uint16_t *max_length);
int32_t e1000_check_polarity(struct e1000_hw *hw, uint16_t *polarity);
int32_t e1000_check_downshift(struct e1000_hw *hw);
int32_t e1000_validate_mdi_setting(struct e1000_hw *hw);
/* EEPROM Functions */
int32_t e1000_init_eeprom_params(struct e1000_hw *hw);
boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw);
int32_t e1000_read_eeprom_eerd(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
int32_t e1000_write_eeprom_eewr(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
int32_t e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd);
/* MNG HOST IF functions */
uint32_t e1000_enable_mng_pass_thru(struct e1000_hw *hw);
......@@ -377,13 +364,6 @@ int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer,
uint16_t length);
boolean_t e1000_check_mng_mode(struct e1000_hw *hw);
boolean_t e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
int32_t e1000_mng_enable_host_if(struct e1000_hw *hw);
int32_t e1000_mng_host_if_write(struct e1000_hw *hw, uint8_t *buffer,
uint16_t length, uint16_t offset, uint8_t *sum);
int32_t e1000_mng_write_cmd_header(struct e1000_hw* hw,
struct e1000_host_mng_command_header* hdr);
int32_t e1000_mng_write_commit(struct e1000_hw *hw);
int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data);
int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw);
......@@ -395,13 +375,10 @@ int32_t e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask);
void e1000_swfw_sync_release(struct e1000_hw *hw, uint16_t mask);
/* Filters (multicast, vlan, receive) */
void e1000_init_rx_addrs(struct e1000_hw *hw);
void e1000_mc_addr_list_update(struct e1000_hw *hw, uint8_t * mc_addr_list, uint32_t mc_addr_count, uint32_t pad, uint32_t rar_used_count);
uint32_t e1000_hash_mc_addr(struct e1000_hw *hw, uint8_t * mc_addr);
void e1000_mta_set(struct e1000_hw *hw, uint32_t hash_value);
void e1000_rar_set(struct e1000_hw *hw, uint8_t * mc_addr, uint32_t rar_index);
void e1000_write_vfta(struct e1000_hw *hw, uint32_t offset, uint32_t value);
void e1000_clear_vfta(struct e1000_hw *hw);
/* LED functions */
int32_t e1000_setup_led(struct e1000_hw *hw);
......@@ -412,7 +389,6 @@ int32_t e1000_led_off(struct e1000_hw *hw);
/* Adaptive IFS Functions */
/* Everything else */
void e1000_clear_hw_cntrs(struct e1000_hw *hw);
void e1000_reset_adaptive(struct e1000_hw *hw);
void e1000_update_adaptive(struct e1000_hw *hw);
void e1000_tbi_adjust_stats(struct e1000_hw *hw, struct e1000_hw_stats *stats, uint32_t frame_len, uint8_t * mac_addr);
......@@ -423,29 +399,11 @@ void e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value);
void e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value);
/* Port I/O is only supported on 82544 and newer */
uint32_t e1000_io_read(struct e1000_hw *hw, unsigned long port);
uint32_t e1000_read_reg_io(struct e1000_hw *hw, uint32_t offset);
void e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value);
void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset, uint32_t value);
int32_t e1000_config_dsp_after_link_change(struct e1000_hw *hw, boolean_t link_up);
int32_t e1000_set_d3_lplu_state(struct e1000_hw *hw, boolean_t active);
int32_t e1000_set_d0_lplu_state(struct e1000_hw *hw, boolean_t active);
void e1000_set_pci_express_master_disable(struct e1000_hw *hw);
void e1000_enable_pciex_master(struct e1000_hw *hw);
int32_t e1000_disable_pciex_master(struct e1000_hw *hw);
int32_t e1000_get_auto_rd_done(struct e1000_hw *hw);
int32_t e1000_get_phy_cfg_done(struct e1000_hw *hw);
int32_t e1000_get_software_semaphore(struct e1000_hw *hw);
void e1000_release_software_semaphore(struct e1000_hw *hw);
int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
int32_t e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);
void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);
int32_t e1000_commit_shadow_ram(struct e1000_hw *hw);
uint8_t e1000_arc_subsystem_valid(struct e1000_hw *hw);
#define E1000_READ_REG_IO(a, reg) \
e1000_read_reg_io((a), E1000_##reg)
#define E1000_WRITE_REG_IO(a, reg, val) \
e1000_write_reg_io((a), E1000_##reg, val)
/* PCI Device IDs */
#define E1000_DEV_ID_82542 0x1000
......
drivers/net/e1000/e1000_main.c
View file @ 4aefe155
......@@ -37,7 +37,7 @@
*/
char e1000_driver_name[] = "e1000";
char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
#ifndef CONFIG_E1000_NAPI
#define DRIVERNAPI
#else
......@@ -45,7 +45,7 @@ char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
#endif
#define DRV_VERSION "6.1.16-k2"DRIVERNAPI
char e1000_driver_version[] = DRV_VERSION;
char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
/* e1000_pci_tbl - PCI Device ID Table
*
......@@ -112,14 +112,14 @@ int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
int e1000_setup_tx_resources(struct e1000_adapter *adapter,
struct e1000_tx_ring *txdr);
int e1000_setup_rx_resources(struct e1000_adapter *adapter,
struct e1000_rx_ring *rxdr);
void e1000_free_tx_resources(struct e1000_adapter *adapter,
struct e1000_tx_ring *tx_ring);
void e1000_free_rx_resources(struct e1000_adapter *adapter,
struct e1000_rx_ring *rx_ring);
static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
struct e1000_tx_ring *txdr);
static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
struct e1000_rx_ring *rxdr);
static void e1000_free_tx_resources(struct e1000_adapter *adapter,
struct e1000_tx_ring *tx_ring);
static void e1000_free_rx_resources(struct e1000_adapter *adapter,
struct e1000_rx_ring *rx_ring);
void e1000_update_stats(struct e1000_adapter *adapter);
/* Local Function Prototypes */
......@@ -296,7 +296,8 @@ e1000_irq_enable(struct e1000_adapter *adapter)
E1000_WRITE_FLUSH(&adapter->hw);
}
}
void
static void
e1000_update_mng_vlan(struct e1000_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
......@@ -1141,7 +1142,7 @@ e1000_check_64k_bound(struct e1000_adapter *adapter,
* Return 0 on success, negative on failure
**/
int
static int
e1000_setup_tx_resources(struct e1000_adapter *adapter,
struct e1000_tx_ring *txdr)
{
......@@ -1359,7 +1360,7 @@ e1000_configure_tx(struct e1000_adapter *adapter)
* Returns 0 on success, negative on failure
**/
int
static int
e1000_setup_rx_resources(struct e1000_adapter *adapter,
struct e1000_rx_ring *rxdr)
{
......@@ -1747,7 +1748,7 @@ e1000_configure_rx(struct e1000_adapter *adapter)
* Free all transmit software resources
**/
void
static void
e1000_free_tx_resources(struct e1000_adapter *adapter,
struct e1000_tx_ring *tx_ring)
{
......@@ -1858,7 +1859,7 @@ e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
* Free all receive software resources
**/
void
static void
e1000_free_rx_resources(struct e1000_adapter *adapter,
struct e1000_rx_ring *rx_ring)
{
......
drivers/net/hamradio/dmascc.c
View file @ 4aefe155
......@@ -311,16 +311,6 @@ static void __exit dmascc_exit(void)
}
}
#ifndef MODULE
void __init dmascc_setup(char *str, int *ints)
{
int i;
for (i = 0; i < MAX_NUM_DEVS && i < ints[0]; i++)
io[i] = ints[i + 1];
}
#endif
static int __init dmascc_init(void)
{
int h, i, j, n;
......
drivers/net/ixgb/ixgb_ethtool.c
View file @ 4aefe155
......@@ -694,7 +694,7 @@ ixgb_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
}
}
struct ethtool_ops ixgb_ethtool_ops = {
static struct ethtool_ops ixgb_ethtool_ops = {
.get_settings = ixgb_get_settings,
.set_settings = ixgb_set_settings,
.get_drvinfo = ixgb_get_drvinfo,
......
drivers/net/ixgb/ixgb_hw.c
View file @ 4aefe155
......@@ -47,9 +47,22 @@ static void ixgb_optics_reset(struct ixgb_hw *hw);
static ixgb_phy_type ixgb_identify_phy(struct ixgb_hw *hw);
uint32_t ixgb_mac_reset(struct ixgb_hw *hw);
static void ixgb_clear_hw_cntrs(struct ixgb_hw *hw);
uint32_t ixgb_mac_reset(struct ixgb_hw *hw)
static void ixgb_clear_vfta(struct ixgb_hw *hw);
static void ixgb_init_rx_addrs(struct ixgb_hw *hw);
static uint16_t ixgb_read_phy_reg(struct ixgb_hw *hw,
uint32_t reg_address,
uint32_t phy_address,
uint32_t device_type);
static boolean_t ixgb_setup_fc(struct ixgb_hw *hw);
static boolean_t mac_addr_valid(uint8_t *mac_addr);
static uint32_t ixgb_mac_reset(struct ixgb_hw *hw)
{
uint32_t ctrl_reg;
......@@ -335,7 +348,7 @@ ixgb_init_hw(struct ixgb_hw *hw)
* of the receive addresss registers. Clears the multicast table. Assumes
* the receiver is in reset when the routine is called.
*****************************************************************************/
void
static void
ixgb_init_rx_addrs(struct ixgb_hw *hw)
{
uint32_t i;
......@@ -604,7 +617,7 @@ ixgb_write_vfta(struct ixgb_hw *hw,
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
void
static void
ixgb_clear_vfta(struct ixgb_hw *hw)
{
uint32_t offset;
......@@ -620,7 +633,7 @@ ixgb_clear_vfta(struct ixgb_hw *hw)
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
boolean_t
static boolean_t
ixgb_setup_fc(struct ixgb_hw *hw)
{
uint32_t ctrl_reg;
......@@ -722,7 +735,7 @@ ixgb_setup_fc(struct ixgb_hw *hw)
* This requires that first an address cycle command is sent, followed by a
* read command.
*****************************************************************************/
uint16_t
static uint16_t
ixgb_read_phy_reg(struct ixgb_hw *hw,
uint32_t reg_address,
uint32_t phy_address,
......@@ -815,7 +828,7 @@ ixgb_read_phy_reg(struct ixgb_hw *hw,
* This requires that first an address cycle command is sent, followed by a
* write command.
*****************************************************************************/
void
static void
ixgb_write_phy_reg(struct ixgb_hw *hw,
uint32_t reg_address,
uint32_t phy_address,
......@@ -959,7 +972,7 @@ boolean_t ixgb_check_for_bad_link(struct ixgb_hw *hw)
*
* hw - Struct containing variables accessed by shared code
*****************************************************************************/
void
static void
ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
{
volatile uint32_t temp_reg;
......@@ -1114,7 +1127,7 @@ ixgb_get_bus_info(struct ixgb_hw *hw)
* mac_addr - pointer to MAC address.
*
*****************************************************************************/
boolean_t
static boolean_t
mac_addr_valid(uint8_t *mac_addr)
{
boolean_t is_valid = TRUE;
......
drivers/net/ixgb/ixgb_hw.h
View file @ 4aefe155
......@@ -784,23 +784,8 @@ struct ixgb_hw_stats {
extern boolean_t ixgb_adapter_stop(struct ixgb_hw *hw);
extern boolean_t ixgb_init_hw(struct ixgb_hw *hw);
extern boolean_t ixgb_adapter_start(struct ixgb_hw *hw);
extern void ixgb_init_rx_addrs(struct ixgb_hw *hw);
extern void ixgb_check_for_link(struct ixgb_hw *hw);
extern boolean_t ixgb_check_for_bad_link(struct ixgb_hw *hw);
extern boolean_t ixgb_setup_fc(struct ixgb_hw *hw);
extern void ixgb_clear_hw_cntrs(struct ixgb_hw *hw);
extern boolean_t mac_addr_valid(uint8_t *mac_addr);
extern uint16_t ixgb_read_phy_reg(struct ixgb_hw *hw,
uint32_t reg_addr,
uint32_t phy_addr,
uint32_t device_type);
extern void ixgb_write_phy_reg(struct ixgb_hw *hw,
uint32_t reg_addr,
uint32_t phy_addr,
uint32_t device_type,
uint16_t data);
extern void ixgb_rar_set(struct ixgb_hw *hw,
uint8_t *addr,
......@@ -818,8 +803,6 @@ extern void ixgb_write_vfta(struct ixgb_hw *hw,
uint32_t offset,
uint32_t value);
extern void ixgb_clear_vfta(struct ixgb_hw *hw);
/* Access functions to eeprom data */
void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr);
uint32_t ixgb_get_ee_pba_number(struct ixgb_hw *hw);
......
drivers/net/ixgb/ixgb_main.c
View file @ 4aefe155
......@@ -45,7 +45,7 @@
*/
char ixgb_driver_name[] = "ixgb";
char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
#ifndef CONFIG_IXGB_NAPI
#define DRIVERNAPI
......
drivers/net/wireless/airo.c
View file @ 4aefe155
......@@ -47,6 +47,8 @@
#include <linux/pci.h>
#include <asm/uaccess.h>
#include "airo.h"
#ifdef CONFIG_PCI
static struct pci_device_id card_ids[] = {
{ 0x14b9, 1, PCI_ANY_ID, PCI_ANY_ID, },
......
drivers/net/wireless/airo.h 0 → 100644
View file @ 4aefe155
#ifndef _AIRO_H_
#define _AIRO_H_
struct net_device *init_airo_card(unsigned short irq, int port, int is_pcmcia,
struct device *dmdev);
int reset_airo_card(struct net_device *dev);
void stop_airo_card(struct net_device *dev, int freeres);
#endif /* _AIRO_H_ */
drivers/net/wireless/airo_cs.c
View file @ 4aefe155
......@@ -42,6 +42,8 @@
#include <asm/io.h>
#include <asm/system.h>
#include "airo.h"
/*
All the PCMCIA modules use PCMCIA_DEBUG to control debugging. If
you do not define PCMCIA_DEBUG at all, all the debug code will be
......@@ -78,10 +80,6 @@ MODULE_SUPPORTED_DEVICE("Aironet 4500, 4800 and Cisco 340 PCMCIA cards");
event handler.
*/
struct net_device *init_airo_card( int, int, int, struct device * );
void stop_airo_card( struct net_device *, int );
int reset_airo_card( struct net_device * );
static void airo_config(dev_link_t *link);
static void airo_release(dev_link_t *link);
static int airo_event(event_t event, int priority,
......
drivers/net/wireless/prism54/islpci_eth.c
View file @ 4aefe155
......@@ -244,7 +244,6 @@ islpci_eth_transmit(struct sk_buff *skb, struct net_device *ndev)
priv->statistics.tx_dropped++;
spin_unlock_irqrestore(&priv->slock, flags);
dev_kfree_skb(skb);
skb = NULL;
return err;
}
......
include/linux/ethtool.h
View file @ 4aefe155
......@@ -453,10 +453,11 @@ struct ethtool_ops {
* it was foced up into this mode or autonegotiated.
*/
/* The forced speed, 10Mb, 100Mb, gigabit, 10GbE. */
/* The forced speed, 10Mb, 100Mb, gigabit, 2.5Gb, 10GbE. */
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
#define SPEED_2500 2500
#define SPEED_10000 10000
/* Duplex, half or full. */
......
include/linux/pci_ids.h
View file @ 4aefe155
......@@ -1785,6 +1785,7 @@
#define PCI_DEVICE_ID_TIGON3_5704 0x1648
#define PCI_DEVICE_ID_TIGON3_5704S_2 0x1649
#define PCI_DEVICE_ID_NX2_5706 0x164a
#define PCI_DEVICE_ID_NX2_5708 0x164c
#define PCI_DEVICE_ID_TIGON3_5702FE 0x164d
#define PCI_DEVICE_ID_TIGON3_5705 0x1653
#define PCI_DEVICE_ID_TIGON3_5705_2 0x1654
......@@ -1809,6 +1810,7 @@
#define PCI_DEVICE_ID_TIGON3_5703X 0x16a7
#define PCI_DEVICE_ID_TIGON3_5704S 0x16a8
#define PCI_DEVICE_ID_NX2_5706S 0x16aa
#define PCI_DEVICE_ID_NX2_5708S 0x16ac
#define PCI_DEVICE_ID_TIGON3_5702A3 0x16c6
#define PCI_DEVICE_ID_TIGON3_5703A3 0x16c7
#define PCI_DEVICE_ID_TIGON3_5781 0x16dd
......
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