Commit 4b915450 authored by Heiko Stuebner's avatar Heiko Stuebner

ARM: dts: rockchip: move rk3288 edp phy under the GRF

The edp-phy control is a part of the General Register Files and
with a recent patch in 4.6 the phy driver can now also handle this
correctly, so move the dts node under the GRF as well.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 6e38e6b2
...@@ -201,15 +201,6 @@ xin24m: oscillator { ...@@ -201,15 +201,6 @@ xin24m: oscillator {
#clock-cells = <0>; #clock-cells = <0>;
}; };
edp_phy: edp-phy {
compatible = "rockchip,rk3288-dp-phy";
clocks = <&cru SCLK_EDP_24M>;
clock-names = "24m";
rockchip,grf = <&grf>;
#phy-cells = <0>;
status = "disabled";
};
timer { timer {
compatible = "arm,armv7-timer"; compatible = "arm,armv7-timer";
arm,cpu-registers-not-fw-configured; arm,cpu-registers-not-fw-configured;
...@@ -756,6 +747,14 @@ cru: clock-controller@ff760000 { ...@@ -756,6 +747,14 @@ cru: clock-controller@ff760000 {
grf: syscon@ff770000 { grf: syscon@ff770000 {
compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
reg = <0xff770000 0x1000>; reg = <0xff770000 0x1000>;
edp_phy: edp-phy {
compatible = "rockchip,rk3288-dp-phy";
clocks = <&cru SCLK_EDP_24M>;
clock-names = "24m";
#phy-cells = <0>;
status = "disabled";
};
}; };
wdt: watchdog@ff800000 { wdt: watchdog@ff800000 {
......
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