Commit 4d0a72b6 authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_latency

Only send non-0 clocks to DC for validation.  This mirrors
what the windows driver does.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/963Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c3724357
...@@ -1026,12 +1026,15 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, ...@@ -1026,12 +1026,15 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,
clocks->num_levels = 0; clocks->num_levels = 0;
for (i = 0; i < pclk_vol_table->count; i++) { for (i = 0; i < pclk_vol_table->count; i++) {
clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk * 10; if (pclk_vol_table->entries[i].clk) {
clocks->data[i].latency_in_us = latency_required ? clocks->data[clocks->num_levels].clocks_in_khz =
smu10_get_mem_latency(hwmgr, pclk_vol_table->entries[i].clk * 10;
pclk_vol_table->entries[i].clk) : clocks->data[clocks->num_levels].latency_in_us = latency_required ?
0; smu10_get_mem_latency(hwmgr,
clocks->num_levels++; pclk_vol_table->entries[i].clk) :
0;
clocks->num_levels++;
}
} }
return 0; return 0;
......
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