Merge tag 'gemini-dts' of...

Merge tag 'gemini-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt

Gemini DTS updates for v4.21:
- Fix the erroneous partition table on D-Link DIR-685
- Multiplex flash usage with other usage using pin control
  handling (merged to the MTD tree)
- Use the RedBoot partition parser on SQ201
- Add the USB blocks (DT bindings merged in the last merge
  window)
- Bump the debounce times a bit to avoid bouncing

* tag 'gemini-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: Bump Gemini platforms to use 100ms debounce
  ARM: dts: Add the FOTG210 USB host to Gemini boards
  ARM: dts: Fix up SQ201 flash access
  ARM: dts: Enable Gemini flash access
  ARM: dts: Fix up the D-Link DIR-685 MTD partition info
Signed-off-by: Olof Johansson <olof@lixom.net>

arch/arm/boot/dts/gemini-dlink-dir-685.dts

@@ -28,7 +28,7 @@ gpio_keys {
 		compatible = "gpio-keys";
 
 		button-esc {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_ESC>;
 			label = "reset";
@@ -36,7 +36,7 @@ button-esc {
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 		button-eject {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_EJECTCD>;
 			label = "unmount";
@@ -64,7 +64,6 @@ spi {
 		gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
 		gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
 		gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
-		/* Collides with pflash CE1, not so cool */
 		cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
 		num-chipselects = <1>;
 
@@ -253,15 +252,18 @@ phy4: phy@4 {
 	soc {
 		flash@30000000 {
 			/*
-			 * Flash access is by default disabled, because it
-			 * collides with the Chip Enable signal for the display
-			 * panel, that reuse the parallel flash Chip Select 1
-			 * (CS1). Enabling flash makes graphics stop working.
-			 *
-			 * We might be able to hack around this by letting
-			 * GPIO poke around in the flash controller registers.
+			 * Flash access collides with the Chip Enable signal for
+			 * the display panel, that reuse the parallel flash Chip
+			 * Select 1 (CS1). We switch the pin control state so we
+			 * enable these pins for flash access only when we need
+			 * then, and when disabled they can be used for GPIO which
+			 * is what the display panel needs.
 			 */
-			/* status = "okay"; */
+			status = "okay";
+			pinctrl-names = "enabled", "disabled";
+			pinctrl-0 = <&pflash_default_pins>;
+			pinctrl-1 = <&pflash_disabled_pins>;
+
 			/* 32MB of flash */
 			reg = <0x30000000 0x02000000>;
 
@@ -274,20 +276,16 @@ partition@0 {
 				read-only;
 			};
 			/*
-			 * Between the boot loader and the rootfs is the kernel
-			 * in a custom Storlink format flashed from the boot
-			 * menu. The rootfs is in squashfs format.
+			 * This firmware image contains the kernel catenated
+			 * with the squashfs root filesystem. For some reason
+			 * this is called "upgrade" on the vendor system.
 			 */
-			partition@1800c0 {
-				label = "rootfs";
-				reg = <0x001800c0 0x01dbff40>;
-				read-only;
-			};
-			partition@1f40000 {
+			partition@40000 {
 				label = "upgrade";
-				reg = <0x01f40000 0x00040000>;
+				reg = <0x00040000 0x01f40000>;
 				read-only;
 			};
+			/* RGDB, Residental Gateway Database? */
 			partition@1f80000 {
 				label = "rgdb";
 				reg = <0x01f80000 0x00040000>;
@@ -331,7 +329,6 @@ mux {
 						"gpio0cgrp",
 						"gpio0egrp",
 						"gpio0fgrp",
-						"gpio0ggrp",
 						"gpio0hgrp";
 					};
 				};
@@ -346,6 +343,18 @@ mux {
 						groups = "gpio1bgrp";
 					};
 				};
+				/*
+				 * These GPIO groups will be mapped in over some
+				 * of the flash pins when the flash is not in
+				 * active use.
+				 */
+				pflash_disabled_pins: pinctrl-pflash-disabled {
+					mux {
+						function = "gpio0";
+						groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
+							 "gpio0kgrp";
+					};
+				};
 				pinctrl-gmii {
 					mux {
 						function = "gmii";
@@ -434,7 +443,7 @@ ata@63000000 {
 		};
 
 		display-controller@6a000000 {
-			status = "okay";
+			status = "disabled";
 
 			port@0 {
 				reg = <0>;
@@ -443,5 +452,13 @@ display_out: endpoint {
 				};
 			};
 		};
+
+		usb@68000000 {
+			status = "okay";
+		};
+
+		usb@69000000 {
+			status = "okay";
+		};
 	};
 };

arch/arm/boot/dts/gemini-dlink-dns-313.dts

@@ -34,7 +34,7 @@ gpio_keys {
 		compatible = "gpio-keys";
 
 		button-esc {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_ESC>;
 			label = "reset";

arch/arm/boot/dts/gemini-nas4220b.dts

@@ -28,7 +28,7 @@ gpio_keys {
 		compatible = "gpio-keys";
 
 		button-setup {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_SETUP>;
 			label = "Backup button";
@@ -36,7 +36,7 @@ button-setup {
 			gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
 		};
 		button-restart {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_RESTART>;
 			label = "Softreset button";
@@ -204,5 +204,13 @@ ata@63000000 {
 		ata@63400000 {
 			status = "okay";
 		};
+
+		usb@68000000 {
+			status = "okay";
+		};
+
+		usb@69000000 {
+			status = "okay";
+		};
 	};
 };

arch/arm/boot/dts/gemini-rut1xx.dts

@@ -28,7 +28,7 @@ gpio_keys {
 		compatible = "gpio-keys";
 
 		button-setup {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_SETUP>;
 			label = "Reset to defaults";
@@ -124,5 +124,25 @@ ethernet-port@1 {
 				/* Not used in this platform */
 			};
 		};
+
+		ethernet@60000000 {
+			status = "okay";
+
+			ethernet-port@0 {
+				phy-mode = "rgmii";
+				phy-handle = <&phy0>;
+			};
+			ethernet-port@1 {
+				/* Not used in this platform */
+			};
+		};
+
+		usb@68000000 {
+			status = "okay";
+		};
+
+		usb@69000000 {
+			status = "okay";
+		};
 	};
 };

arch/arm/boot/dts/gemini-sl93512r.dts

@@ -324,5 +324,13 @@ ata@63000000 {
 		ata@63400000 {
 			status = "okay";
 		};
+
+		usb@68000000 {
+			status = "okay";
+		};
+
+		usb@69000000 {
+			status = "okay";
+		};
 	};
 };

arch/arm/boot/dts/gemini-sq201.dts

@@ -20,7 +20,7 @@ memory@0 { /* 128 MB */
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,115200n8";
+		bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
 		stdout-path = &uart0;
 	};
 
@@ -28,7 +28,7 @@ gpio_keys {
 		compatible = "gpio-keys";
 
 		button-setup {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_SETUP>;
 			label = "factory reset";
@@ -41,14 +41,12 @@ leds {
 		compatible = "gpio-leds";
 		led-green-info {
 			label = "sq201:green:info";
-			/* Conflict with parallel flash */
 			gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
 			linux,default-trigger = "heartbeat";
 		};
 		led-green-usb {
 			label = "sq201:green:usb";
-			/* Conflict with parallel and NAND flash */
 			gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
 			default-state = "off";
 			linux,default-trigger = "usb-host";
@@ -126,49 +124,17 @@ fixed-link {
 
 	soc {
 		flash@30000000 {
-			/*
-			 * Flash access can be enabled, with the side effect
-			 * of disabling access to GPIO LED on GPIO0[20] which
-			 * reuse one of the parallel flash chip select lines.
-			 * Also the default firmware on the machine has the
-			 * problem that since it uses the flash, the two LEDS
-			 * on the right become numb.
-			 */
-			/* status = "okay"; */
+			status = "okay";
+			pinctrl-names = "enabled", "disabled";
+			pinctrl-0 = <&pflash_default_pins>;
+			pinctrl-1 = <&pflash_disabled_pins>;
 			/* 16MB of flash */
 			reg = <0x30000000 0x01000000>;
 
-			partition@0 {
-				label = "RedBoot";
-				reg = <0x00000000 0x00120000>;
-				read-only;
-			};
-			partition@120000 {
-				label = "Kernel";
-				reg = <0x00120000 0x00200000>;
-			};
-			partition@320000 {
-				label = "Ramdisk";
-				reg = <0x00320000 0x00600000>;
-			};
-			partition@920000 {
-				label = "Application";
-				reg = <0x00920000 0x00600000>;
-			};
-			partition@f20000 {
-				label = "VCTL";
-				reg = <0x00f20000 0x00020000>;
-				read-only;
-			};
-			partition@f40000 {
-				label = "CurConf";
-				reg = <0x00f40000 0x000a0000>;
-				read-only;
-			};
-			partition@fe0000 {
-				label = "FIS directory";
-				reg = <0x00fe0000 0x00020000>;
-				read-only;
+			partitions {
+				compatible = "redboot-fis";
+				/* Eraseblock at 0xfe0000 */
+				fis-index-block = <0x1fc>;
 			};
 		};
 
@@ -184,9 +150,7 @@ gpio0_default_pins: pinctrl-gpio0 {
 					mux {
 						function = "gpio0";
 						groups = "gpio0fgrp",
-						"gpio0ggrp",
-						"gpio0hgrp",
-						"gpio0kgrp";
+						"gpio0hgrp";
 					};
 				};
 				/*
@@ -199,6 +163,18 @@ mux {
 						groups = "gpio1dgrp";
 					};
 				};
+				/*
+				 * These GPIO groups will be mapped in over some
+				 * of the flash pins when the flash is not in
+				 * active use.
+				 */
+				pflash_disabled_pins: pinctrl-pflash-disabled {
+					mux {
+						function = "gpio0";
+						groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
+							 "gpio0kgrp";
+					};
+				};
 				pinctrl-gmii {
 					mux {
 						function = "gmii";
@@ -316,5 +292,13 @@ fixed-link {
 		ata@63000000 {
 			status = "okay";
 		};
+
+		usb@68000000 {
+			status = "okay";
+		};
+
+		usb@69000000 {
+			status = "okay";
+		};
 	};
 };

arch/arm/boot/dts/gemini-wbd111.dts

@@ -29,7 +29,7 @@ gpio_keys {
 		compatible = "gpio-keys";
 
 		button-setup {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_SETUP>;
 			label = "reset";
@@ -171,5 +171,13 @@ ethernet-port@1 {
 				/* Not used in this platform */
 			};
 		};
+
+		usb@68000000 {
+			status = "okay";
+		};
+
+		usb@69000000 {
+			status = "okay";
+		};
 	};
 };

arch/arm/boot/dts/gemini-wbd222.dts

@@ -28,7 +28,7 @@ gpio_keys {
 		compatible = "gpio-keys";
 
 		button-setup {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_SETUP>;
 			label = "reset";
@@ -183,5 +183,13 @@ ethernet-port@1 {
 				phy-handle = <&phy1>;
 			};
 		};
+
+		usb@68000000 {
+			status = "okay";
+		};
+
+		usb@69000000 {
+			status = "okay";
+		};
 	};
 };

arch/arm/boot/dts/gemini.dtsi

@@ -409,5 +409,37 @@ display-controller@6a000000 {
 			#size-cells = <0>;
 			status = "disabled";
 		};
+
+		usb@68000000 {
+			compatible = "cortina,gemini-usb", "faraday,fotg210";
+			reg = <0x68000000 0x1000>;
+			interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
+			resets = <&syscon GEMINI_RESET_USB0>;
+			clocks = <&syscon GEMINI_CLK_GATE_USB0>;
+			clock-names = "PCLK";
+			/*
+			 * This will claim pins for USB0 and USB1 at the same
+			 * time as they are using some common pins. If you for
+			 * some reason have a system using USB1 at 96000000 but
+			 * NOT using USB0 at 68000000 you wll have to add the
+			 * usb_default_pins to the USB controller at 96000000
+			 * in your .dts for the board.
+			 */
+			pinctrl-names = "default";
+			pinctrl-0 = <&usb_default_pins>;
+			syscon = <&syscon>;
+			status = "disabled";
+		};
+
+		usb@69000000 {
+			compatible = "cortina,gemini-usb", "faraday,fotg210";
+			reg = <0x69000000 0x1000>;
+			interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
+			resets = <&syscon GEMINI_RESET_USB1>;
+			clocks = <&syscon GEMINI_CLK_GATE_USB1>;
+			clock-names = "PCLK";
+			syscon = <&syscon>;
+			status = "disabled";
+		};
 	};
 };