Commit 52718908 authored by Jarkko Nikula's avatar Jarkko Nikula Committed by Mark Brown

spi: dw-pci: Add support for Intel Elkhart Lake PSE SPI

Add support for Intel(R) Programmable Services Engine (Intel(R) PSE) SPI
controller in Intel Elkhart Lake when interface is assigned to the host
processor.
Signed-off-by: default avatarJarkko Nikula <jarkko.nikula@linux.intel.com>
Link: https://lore.kernel.org/r/20190812101344.3975-1-jarkko.nikula@linux.intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 79629d0f
...@@ -19,6 +19,7 @@ struct spi_pci_desc { ...@@ -19,6 +19,7 @@ struct spi_pci_desc {
int (*setup)(struct dw_spi *); int (*setup)(struct dw_spi *);
u16 num_cs; u16 num_cs;
u16 bus_num; u16 bus_num;
u32 max_freq;
}; };
static struct spi_pci_desc spi_pci_mid_desc_1 = { static struct spi_pci_desc spi_pci_mid_desc_1 = {
...@@ -33,6 +34,12 @@ static struct spi_pci_desc spi_pci_mid_desc_2 = { ...@@ -33,6 +34,12 @@ static struct spi_pci_desc spi_pci_mid_desc_2 = {
.bus_num = 1, .bus_num = 1,
}; };
static struct spi_pci_desc spi_pci_ehl_desc = {
.num_cs = 1,
.bus_num = -1,
.max_freq = 100000000,
};
static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
struct dw_spi *dws; struct dw_spi *dws;
...@@ -65,6 +72,7 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -65,6 +72,7 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (desc) { if (desc) {
dws->num_cs = desc->num_cs; dws->num_cs = desc->num_cs;
dws->bus_num = desc->bus_num; dws->bus_num = desc->bus_num;
dws->max_freq = desc->max_freq;
if (desc->setup) { if (desc->setup) {
ret = desc->setup(dws); ret = desc->setup(dws);
...@@ -125,6 +133,11 @@ static const struct pci_device_id pci_ids[] = { ...@@ -125,6 +133,11 @@ static const struct pci_device_id pci_ids[] = {
{ PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc_1}, { PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc_1},
/* Intel MID platform SPI controller 2 */ /* Intel MID platform SPI controller 2 */
{ PCI_VDEVICE(INTEL, 0x0812), (kernel_ulong_t)&spi_pci_mid_desc_2}, { PCI_VDEVICE(INTEL, 0x0812), (kernel_ulong_t)&spi_pci_mid_desc_2},
/* Intel Elkhart Lake PSE SPI controllers */
{ PCI_VDEVICE(INTEL, 0x4b84), (kernel_ulong_t)&spi_pci_ehl_desc},
{ PCI_VDEVICE(INTEL, 0x4b85), (kernel_ulong_t)&spi_pci_ehl_desc},
{ PCI_VDEVICE(INTEL, 0x4b86), (kernel_ulong_t)&spi_pci_ehl_desc},
{ PCI_VDEVICE(INTEL, 0x4b87), (kernel_ulong_t)&spi_pci_ehl_desc},
{}, {},
}; };
......
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