mmc: sdhci-msm: Optionally wait for signal level changes

Not all instances of the SDCC core supports changing signal voltage and
as such will not generate a power interrupt when the software attempts
to change the voltage. This results in probing the eMMC on some devices
to take over 2 minutes.

Check that the SWITCHABLE_SIGNALING_VOLTAGE bit in MCI_GENERICS is set
before waiting for the power interrupt.

Cc: Sahitya Tummala <stummala@codeaurora.org>
Cc: Vijay Viswanath <vviswana@codeaurora.org>
Fixes: c0309b38 ("mmc: sdhci-msm: Add sdhci msm register write APIs which wait for pwr irq")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

drivers/mmc/host/sdhci-msm.c

@@ -29,6 +29,9 @@
 #define CORE_VERSION_MAJOR_MASK		(0xf << CORE_VERSION_MAJOR_SHIFT)
 #define CORE_VERSION_MINOR_MASK		0xff
 
+#define CORE_MCI_GENERICS		0x70
+#define SWITCHABLE_SIGNALING_VOLTAGE	BIT(29)
+
 #define CORE_HC_MODE		0x78
 #define HC_MODE_EN		0x1
 #define CORE_POWER		0x0
@@ -1028,11 +1031,22 @@ static void sdhci_msm_check_power_status(struct sdhci_host *host, u32 req_type)
 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
 	bool done = false;
+	u32 val;
 
 	pr_debug("%s: %s: request %d curr_pwr_state %x curr_io_level %x\n",
 			mmc_hostname(host->mmc), __func__, req_type,
 			msm_host->curr_pwr_state, msm_host->curr_io_level);
 
+	/*
+	 * The power interrupt will not be generated for signal voltage
+	 * switches if SWITCHABLE_SIGNALING_VOLTAGE in MCI_GENERICS is not set.
+	 */
+	val = readl(msm_host->core_mem + CORE_MCI_GENERICS);
+	if ((req_type & REQ_IO_HIGH || req_type & REQ_IO_LOW) &&
+	    !(val & SWITCHABLE_SIGNALING_VOLTAGE)) {
+		return;
+	}
+
 	/*
 	 * The IRQ for request type IO High/LOW will be generated when -
 	 * there is a state change in 1.8V enable bit (bit 3) of