Commit 52b81c89 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Greg Kroah-Hartman

Staging: rt28x0: run *.h files through Lindent

Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 0f65bec1
...@@ -41,40 +41,26 @@ ...@@ -41,40 +41,26 @@
#define __AP_H__ #define __AP_H__
// ap_wpa.c // ap_wpa.c
VOID WpaStateMachineInit( VOID WpaStateMachineInit(IN PRTMP_ADAPTER pAd,
IN PRTMP_ADAPTER pAd, IN STATE_MACHINE * Sm, OUT STATE_MACHINE_FUNC Trans[]);
IN STATE_MACHINE *Sm,
OUT STATE_MACHINE_FUNC Trans[]);
#ifdef RTMP_MAC_USB #ifdef RTMP_MAC_USB
VOID BeaconUpdateExec( VOID BeaconUpdateExec(IN PVOID SystemSpecific1,
IN PVOID SystemSpecific1, IN PVOID FunctionContext,
IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3);
IN PVOID SystemSpecific2,
IN PVOID SystemSpecific3);
#endif // RTMP_MAC_USB // #endif // RTMP_MAC_USB //
VOID RTMPSetPiggyBack( VOID RTMPSetPiggyBack(IN PRTMP_ADAPTER pAd, IN BOOLEAN bPiggyBack);
IN PRTMP_ADAPTER pAd,
IN BOOLEAN bPiggyBack);
VOID MacTableReset( VOID MacTableReset(IN PRTMP_ADAPTER pAd);
IN PRTMP_ADAPTER pAd);
MAC_TABLE_ENTRY *MacTableInsertEntry( MAC_TABLE_ENTRY *MacTableInsertEntry(IN PRTMP_ADAPTER pAd,
IN PRTMP_ADAPTER pAd, IN PUCHAR pAddr,
IN PUCHAR pAddr, IN UCHAR apidx, IN BOOLEAN CleanAll);
IN UCHAR apidx,
IN BOOLEAN CleanAll);
BOOLEAN MacTableDeleteEntry( BOOLEAN MacTableDeleteEntry(IN PRTMP_ADAPTER pAd,
IN PRTMP_ADAPTER pAd, IN USHORT wcid, IN PUCHAR pAddr);
IN USHORT wcid,
IN PUCHAR pAddr);
MAC_TABLE_ENTRY *MacTableLookup( MAC_TABLE_ENTRY *MacTableLookup(IN PRTMP_ADAPTER pAd, IN PUCHAR pAddr);
IN PRTMP_ADAPTER pAd,
IN PUCHAR pAddr);
#endif // __AP_H__
#endif // __AP_H__
...@@ -43,7 +43,6 @@ ...@@ -43,7 +43,6 @@
#include "../rtmp_iface.h" #include "../rtmp_iface.h"
#include "../rtmp_dot11.h" #include "../rtmp_dot11.h"
// //
// Device ID & Vendor ID related definitions, // Device ID & Vendor ID related definitions,
// NOTE: you should not add the new VendorID/DeviceID here unless you not sure it belongs to what chip. // NOTE: you should not add the new VendorID/DeviceID here unless you not sure it belongs to what chip.
...@@ -61,10 +60,6 @@ ...@@ -61,10 +60,6 @@
#define PCI_CLASS_BRIDGE_PCI 0x0604 #define PCI_CLASS_BRIDGE_PCI 0x0604
#endif #endif
#define TXINFO_SIZE 0 #define TXINFO_SIZE 0
#define RTMP_PKT_TAIL_PADDING 0 #define RTMP_PKT_TAIL_PADDING 0
#define fRTMP_ADAPTER_NEED_STOP_TX 0 #define fRTMP_ADAPTER_NEED_STOP_TX 0
...@@ -72,86 +67,83 @@ ...@@ -72,86 +67,83 @@
#define AUX_CTRL 0x10c #define AUX_CTRL 0x10c
// //
// TX descriptor format, Tx ring, Mgmt Ring // TX descriptor format, Tx ring, Mgmt Ring
// //
typedef struct PACKED _TXD_STRUC { typedef struct PACKED _TXD_STRUC {
// Word 0 // Word 0
UINT32 SDPtr0; UINT32 SDPtr0;
// Word 1 // Word 1
UINT32 SDLen1:14; UINT32 SDLen1:14;
UINT32 LastSec1:1; UINT32 LastSec1:1;
UINT32 Burst:1; UINT32 Burst:1;
UINT32 SDLen0:14; UINT32 SDLen0:14;
UINT32 LastSec0:1; UINT32 LastSec0:1;
UINT32 DMADONE:1; UINT32 DMADONE:1;
//Word2 //Word2
UINT32 SDPtr1; UINT32 SDPtr1;
//Word3 //Word3
UINT32 rsv2:24; UINT32 rsv2:24;
UINT32 WIV:1; // Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition UINT32 WIV:1; // Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition
UINT32 QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA UINT32 QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA
UINT32 rsv:2; UINT32 rsv:2;
UINT32 TCO:1; // UINT32 TCO:1; //
UINT32 UCO:1; // UINT32 UCO:1; //
UINT32 ICO:1; // UINT32 ICO:1; //
} TXD_STRUC, *PTXD_STRUC; } TXD_STRUC, *PTXD_STRUC;
// //
// Rx descriptor format, Rx Ring // Rx descriptor format, Rx Ring
// //
typedef struct PACKED _RXD_STRUC{ typedef struct PACKED _RXD_STRUC {
// Word 0 // Word 0
UINT32 SDP0; UINT32 SDP0;
// Word 1 // Word 1
UINT32 SDL1:14; UINT32 SDL1:14;
UINT32 Rsv:2; UINT32 Rsv:2;
UINT32 SDL0:14; UINT32 SDL0:14;
UINT32 LS0:1; UINT32 LS0:1;
UINT32 DDONE:1; UINT32 DDONE:1;
// Word 2 // Word 2
UINT32 SDP1; UINT32 SDP1;
// Word 3 // Word 3
UINT32 BA:1; UINT32 BA:1;
UINT32 DATA:1; UINT32 DATA:1;
UINT32 NULLDATA:1; UINT32 NULLDATA:1;
UINT32 FRAG:1; UINT32 FRAG:1;
UINT32 U2M:1; // 1: this RX frame is unicast to me UINT32 U2M:1; // 1: this RX frame is unicast to me
UINT32 Mcast:1; // 1: this is a multicast frame UINT32 Mcast:1; // 1: this is a multicast frame
UINT32 Bcast:1; // 1: this is a broadcast frame UINT32 Bcast:1; // 1: this is a broadcast frame
UINT32 MyBss:1; // 1: this frame belongs to the same BSSID UINT32 MyBss:1; // 1: this frame belongs to the same BSSID
UINT32 Crc:1; // 1: CRC error UINT32 Crc:1; // 1: CRC error
UINT32 CipherErr:2; // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid UINT32 CipherErr:2; // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid
UINT32 AMSDU:1; // rx with 802.3 header, not 802.11 header. UINT32 AMSDU:1; // rx with 802.3 header, not 802.11 header.
UINT32 HTC:1; UINT32 HTC:1;
UINT32 RSSI:1; UINT32 RSSI:1;
UINT32 L2PAD:1; UINT32 L2PAD:1;
UINT32 AMPDU:1; UINT32 AMPDU:1;
UINT32 Decrypted:1; // this frame is being decrypted. UINT32 Decrypted:1; // this frame is being decrypted.
UINT32 PlcpSignal:1; // To be moved UINT32 PlcpSignal:1; // To be moved
UINT32 PlcpRssil:1;// To be moved UINT32 PlcpRssil:1; // To be moved
UINT32 Rsv1:13; UINT32 Rsv1:13;
} RXD_STRUC, *PRXD_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC; } RXD_STRUC, *PRXD_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
typedef union _TX_ATTENUATION_CTRL_STRUC { typedef union _TX_ATTENUATION_CTRL_STRUC {
struct struct {
{ ULONG RF_ISOLATION_ENABLE:1;
ULONG RF_ISOLATION_ENABLE:1; ULONG Reserve2:7;
ULONG Reserve2:7; ULONG PCIE_PHY_TX_ATTEN_VALUE:3;
ULONG PCIE_PHY_TX_ATTEN_VALUE:3; ULONG PCIE_PHY_TX_ATTEN_EN:1;
ULONG PCIE_PHY_TX_ATTEN_EN:1; ULONG Reserve1:20;
ULONG Reserve1:20;
} field; } field;
ULONG word; ULONG word;
} TX_ATTENUATION_CTRL_STRUC, *PTX_ATTENUATION_CTRL_STRUC; } TX_ATTENUATION_CTRL_STRUC, *PTX_ATTENUATION_CTRL_STRUC;
/* ----------------- EEPROM Related MACRO ----------------- */ /* ----------------- EEPROM Related MACRO ----------------- */
// 8051 firmware image for RT2860 - base address = 0x4000 // 8051 firmware image for RT2860 - base address = 0x4000
#define FIRMWARE_IMAGE_BASE 0x2000 #define FIRMWARE_IMAGE_BASE 0x2000
#define MAX_FIRMWARE_IMAGE_SIZE 0x2000 // 8kbyte #define MAX_FIRMWARE_IMAGE_SIZE 0x2000 // 8kbyte
/* ----------------- Frimware Related MACRO ----------------- */ /* ----------------- Frimware Related MACRO ----------------- */
#define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \ #define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \
...@@ -175,14 +167,12 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -175,14 +167,12 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0); \ RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0); \
}while(0) }while(0)
/* ----------------- TX Related MACRO ----------------- */ /* ----------------- TX Related MACRO ----------------- */
#define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0) #define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
#define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0) #define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
#define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \ #define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
((freeNum) >= (ULONG)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */ ((freeNum) >= (ULONG)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */
#define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) \ #define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) \
do{}while(0) do{}while(0)
...@@ -190,12 +180,11 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -190,12 +180,11 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
(((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3)) (((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3))
//(((freeNum) != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 1 /*0*/)) //(((freeNum) != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 1 /*0*/))
#define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \ #define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \
RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen)
#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \ #define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
/* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)*/ /* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) */
#define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \ #define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \
RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
...@@ -210,7 +199,7 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -210,7 +199,7 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx) RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx)
#define HAL_LastTxIdx(_pAd, _QueIdx,_LastTxIdx) \ #define HAL_LastTxIdx(_pAd, _QueIdx,_LastTxIdx) \
/*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx)*/ /*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx) */
#define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx) \ #define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx) \
RTMP_IO_WRITE32((_pAd), TX_CTX_IDX0+((_QueIdx)*0x10), (_pAd)->TxRing[(_QueIdx)].TxCpuIdx) RTMP_IO_WRITE32((_pAd), TX_CTX_IDX0+((_QueIdx)*0x10), (_pAd)->TxRing[(_QueIdx)].TxCpuIdx)
...@@ -225,17 +214,14 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -225,17 +214,14 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
: \ : \
(_pAd->TxRing[_QueIdx].TxSwFreeIdx + TX_RING_SIZE - _pAd->TxRing[_QueIdx].TxCpuIdx - 1); (_pAd->TxRing[_QueIdx].TxSwFreeIdx + TX_RING_SIZE - _pAd->TxRing[_QueIdx].TxCpuIdx - 1);
#define GET_MGMTRING_FREENO(_pAd) \ #define GET_MGMTRING_FREENO(_pAd) \
(_pAd->MgmtRing.TxSwFreeIdx > _pAd->MgmtRing.TxCpuIdx) ? \ (_pAd->MgmtRing.TxSwFreeIdx > _pAd->MgmtRing.TxCpuIdx) ? \
(_pAd->MgmtRing.TxSwFreeIdx - _pAd->MgmtRing.TxCpuIdx - 1) \ (_pAd->MgmtRing.TxSwFreeIdx - _pAd->MgmtRing.TxCpuIdx - 1) \
: \ : \
(_pAd->MgmtRing.TxSwFreeIdx + MGMT_RING_SIZE - _pAd->MgmtRing.TxCpuIdx - 1); (_pAd->MgmtRing.TxSwFreeIdx + MGMT_RING_SIZE - _pAd->MgmtRing.TxCpuIdx - 1);
/* ----------------- RX Related MACRO ----------------- */ /* ----------------- RX Related MACRO ----------------- */
/* ----------------- ASIC Related MACRO ----------------- */ /* ----------------- ASIC Related MACRO ----------------- */
// reset MAC of a station entry to 0x000000000000 // reset MAC of a station entry to 0x000000000000
#define RTMP_STA_ENTRY_MAC_RESET(pAd, Wcid) \ #define RTMP_STA_ENTRY_MAC_RESET(pAd, Wcid) \
...@@ -272,7 +258,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -272,7 +258,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
pAd->SharedKey[apidx][KeyID].CipherAlg, \ pAd->SharedKey[apidx][KeyID].CipherAlg, \
pEntry); } pEntry); }
// Insert the BA bitmap to ASIC for the Wcid entry // Insert the BA bitmap to ASIC for the Wcid entry
#define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \ #define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \
do{ \ do{ \
...@@ -283,9 +268,8 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -283,9 +268,8 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
RTMP_IO_WRITE32((_pAd), _Offset, _Value);\ RTMP_IO_WRITE32((_pAd), _Offset, _Value);\
}while(0) }while(0)
// Remove the BA bitmap from ASIC for the Wcid entry // Remove the BA bitmap from ASIC for the Wcid entry
// bitmap field starts at 0x10000 in ASIC WCID table // bitmap field starts at 0x10000 in ASIC WCID table
#define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \ #define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \
do{ \ do{ \
UINT32 _Value = 0, _Offset; \ UINT32 _Value = 0, _Offset; \
...@@ -295,7 +279,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -295,7 +279,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
RTMP_IO_WRITE32((_pAd), _Offset, _Value); \ RTMP_IO_WRITE32((_pAd), _Offset, _Value); \
}while(0) }while(0)
/* ----------------- Interface Related MACRO ----------------- */ /* ----------------- Interface Related MACRO ----------------- */
// //
...@@ -314,7 +297,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -314,7 +297,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
RTMP_SET_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \ RTMP_SET_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \
}while(0) }while(0)
#define RTMP_IRQ_INIT(pAd) \ #define RTMP_IRQ_INIT(pAd) \
{ pAd->int_enable_reg = ((DELAYINTMASK) | \ { pAd->int_enable_reg = ((DELAYINTMASK) | \
(RxINT|TxDataInt|TxMgmtInt)) & ~(0x03); \ (RxINT|TxDataInt|TxMgmtInt)) & ~(0x03); \
...@@ -326,7 +308,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -326,7 +308,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff);\ RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff);\
RTMP_ASIC_INTERRUPT_ENABLE(pAd); } RTMP_ASIC_INTERRUPT_ENABLE(pAd); }
/* ----------------- MLME Related MACRO ----------------- */ /* ----------------- MLME Related MACRO ----------------- */
#define RTMP_MLME_HANDLER(pAd) MlmeHandler(pAd) #define RTMP_MLME_HANDLER(pAd) MlmeHandler(pAd)
...@@ -344,7 +325,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -344,7 +325,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
/* ----------------- Power Save Related MACRO ----------------- */ /* ----------------- Power Save Related MACRO ----------------- */
#define RTMP_PS_POLL_ENQUEUE(pAd) EnqueuePsPoll(pAd) #define RTMP_PS_POLL_ENQUEUE(pAd) EnqueuePsPoll(pAd)
// For RTMPPCIePowerLinkCtrlRestore () function // For RTMPPCIePowerLinkCtrlRestore () function
#define RESTORE_HALT 1 #define RESTORE_HALT 1
#define RESTORE_WAKEUP 2 #define RESTORE_WAKEUP 2
...@@ -358,7 +338,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC { ...@@ -358,7 +338,6 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
#define CID2MASK 0x00ff0000 #define CID2MASK 0x00ff0000
#define CID3MASK 0xff000000 #define CID3MASK 0xff000000
#define RTMP_STA_FORCE_WAKEUP(pAd, bFromTx) \ #define RTMP_STA_FORCE_WAKEUP(pAd, bFromTx) \
RT28xxPciStaAsicForceWakeup(pAd, bFromTx); RT28xxPciStaAsicForceWakeup(pAd, bFromTx);
......
This diff is collapsed.
...@@ -43,14 +43,12 @@ ...@@ -43,14 +43,12 @@
// //
#define NIC2860_PCI_DEVICE_ID 0x0601 #define NIC2860_PCI_DEVICE_ID 0x0601
#define NIC2860_PCIe_DEVICE_ID 0x0681 #define NIC2860_PCIe_DEVICE_ID 0x0681
#define NIC2760_PCI_DEVICE_ID 0x0701 // 1T/2R Cardbus ??? #define NIC2760_PCI_DEVICE_ID 0x0701 // 1T/2R Cardbus ???
#define NIC2790_PCIe_DEVICE_ID 0x0781 // 1T/2R miniCard #define NIC2790_PCIe_DEVICE_ID 0x0781 // 1T/2R miniCard
#define VEN_AWT_PCIe_DEVICE_ID 0x1059 #define VEN_AWT_PCIe_DEVICE_ID 0x1059
#define VEN_AWT_PCI_VENDOR_ID 0x1A3B #define VEN_AWT_PCI_VENDOR_ID 0x1A3B
#define EDIMAX_PCI_VENDOR_ID 0x1432 #define EDIMAX_PCI_VENDOR_ID 0x1432
#endif //__RT2860_H__ // #endif //__RT2860_H__ //
...@@ -40,8 +40,7 @@ ...@@ -40,8 +40,7 @@
#include "../rtmp_type.h" #include "../rtmp_type.h"
#include "mac_usb.h" #include "mac_usb.h"
//#define RTMP_CHIP_NAME "RT2870"
//#define RTMP_CHIP_NAME "RT2870"
#endif // RT2870 // #endif // RT2870 //
#endif //__RT2870_H__ // #endif //__RT2870_H__ //
...@@ -39,7 +39,6 @@ ...@@ -39,7 +39,6 @@
#ifdef RT3070 #ifdef RT3070
#ifndef RTMP_USB_SUPPORT #ifndef RTMP_USB_SUPPORT
#error "For RT3070, you should define the compile flag -DRTMP_USB_SUPPORT" #error "For RT3070, you should define the compile flag -DRTMP_USB_SUPPORT"
#endif #endif
......
...@@ -63,9 +63,9 @@ ...@@ -63,9 +63,9 @@
// //
// Device ID & Vendor ID, these values should match EEPROM value // Device ID & Vendor ID, these values should match EEPROM value
// //
#define NIC3090_PCIe_DEVICE_ID 0x3090 // 1T/1R miniCard #define NIC3090_PCIe_DEVICE_ID 0x3090 // 1T/1R miniCard
#define NIC3091_PCIe_DEVICE_ID 0x3091 // 1T/2R miniCard #define NIC3091_PCIe_DEVICE_ID 0x3091 // 1T/2R miniCard
#define NIC3092_PCIe_DEVICE_ID 0x3092 // 2T/2R miniCard #define NIC3092_PCIe_DEVICE_ID 0x3092 // 2T/2R miniCard
#endif // RT3090 // #endif // RT3090 //
......
...@@ -39,7 +39,6 @@ ...@@ -39,7 +39,6 @@
#ifdef RT30xx #ifdef RT30xx
extern REG_PAIR RT30xx_RFRegTable[]; extern REG_PAIR RT30xx_RFRegTable[];
extern UCHAR NUM_RF_REG_PARMS; extern UCHAR NUM_RF_REG_PARMS;
......
This diff is collapsed.
...@@ -38,7 +38,6 @@ ...@@ -38,7 +38,6 @@
#ifndef __RTMP_PHY_H__ #ifndef __RTMP_PHY_H__
#define __RTMP_PHY_H__ #define __RTMP_PHY_H__
/* /*
RF sections RF sections
*/ */
...@@ -75,31 +74,30 @@ ...@@ -75,31 +74,30 @@
#define RF_R30 30 #define RF_R30 30
#define RF_R31 31 #define RF_R31 31
// value domain of pAd->RfIcType // value domain of pAd->RfIcType
#define RFIC_2820 1 // 2.4G 2T3R #define RFIC_2820 1 // 2.4G 2T3R
#define RFIC_2850 2 // 2.4G/5G 2T3R #define RFIC_2850 2 // 2.4G/5G 2T3R
#define RFIC_2720 3 // 2.4G 1T2R #define RFIC_2720 3 // 2.4G 1T2R
#define RFIC_2750 4 // 2.4G/5G 1T2R #define RFIC_2750 4 // 2.4G/5G 1T2R
#define RFIC_3020 5 // 2.4G 1T1R #define RFIC_3020 5 // 2.4G 1T1R
#define RFIC_2020 6 // 2.4G B/G #define RFIC_2020 6 // 2.4G B/G
#define RFIC_3021 7 // 2.4G 1T2R #define RFIC_3021 7 // 2.4G 1T2R
#define RFIC_3022 8 // 2.4G 2T2R #define RFIC_3022 8 // 2.4G 2T2R
#define RFIC_3052 9 // 2.4G/5G 2T2R #define RFIC_3052 9 // 2.4G/5G 2T2R
/* /*
BBP sections BBP sections
*/ */
#define BBP_R0 0 // version #define BBP_R0 0 // version
#define BBP_R1 1 // TSSI #define BBP_R1 1 // TSSI
#define BBP_R2 2 // TX configure #define BBP_R2 2 // TX configure
#define BBP_R3 3 #define BBP_R3 3
#define BBP_R4 4 #define BBP_R4 4
#define BBP_R5 5 #define BBP_R5 5
#define BBP_R6 6 #define BBP_R6 6
#define BBP_R14 14 // RX configure #define BBP_R14 14 // RX configure
#define BBP_R16 16 #define BBP_R16 16
#define BBP_R17 17 // RX sensibility #define BBP_R17 17 // RX sensibility
#define BBP_R18 18 #define BBP_R18 18
#define BBP_R21 21 #define BBP_R21 21
#define BBP_R22 22 #define BBP_R22 22
...@@ -108,12 +106,12 @@ ...@@ -108,12 +106,12 @@
#define BBP_R26 26 #define BBP_R26 26
#define BBP_R27 27 #define BBP_R27 27
#define BBP_R31 31 #define BBP_R31 31
#define BBP_R49 49 //TSSI #define BBP_R49 49 //TSSI
#define BBP_R50 50 #define BBP_R50 50
#define BBP_R51 51 #define BBP_R51 51
#define BBP_R52 52 #define BBP_R52 52
#define BBP_R55 55 #define BBP_R55 55
#define BBP_R62 62 // Rx SQ0 Threshold HIGH #define BBP_R62 62 // Rx SQ0 Threshold HIGH
#define BBP_R63 63 #define BBP_R63 63
#define BBP_R64 64 #define BBP_R64 64
#define BBP_R65 65 #define BBP_R65 65
...@@ -121,7 +119,7 @@ ...@@ -121,7 +119,7 @@
#define BBP_R67 67 #define BBP_R67 67
#define BBP_R68 68 #define BBP_R68 68
#define BBP_R69 69 #define BBP_R69 69
#define BBP_R70 70 // Rx AGC SQ CCK Xcorr threshold #define BBP_R70 70 // Rx AGC SQ CCK Xcorr threshold
#define BBP_R73 73 #define BBP_R73 73
#define BBP_R75 75 #define BBP_R75 75
#define BBP_R77 77 #define BBP_R77 77
...@@ -135,7 +133,7 @@ ...@@ -135,7 +133,7 @@
#define BBP_R86 86 #define BBP_R86 86
#define BBP_R91 91 #define BBP_R91 91
#define BBP_R92 92 #define BBP_R92 92
#define BBP_R94 94 // Tx Gain Control #define BBP_R94 94 // Tx Gain Control
#define BBP_R103 103 #define BBP_R103 103
#define BBP_R105 105 #define BBP_R105 105
#define BBP_R106 106 #define BBP_R106 106
...@@ -151,16 +149,16 @@ ...@@ -151,16 +149,16 @@
#define BBP_R122 122 #define BBP_R122 122
#define BBP_R123 123 #define BBP_R123 123
#ifdef RT30xx #ifdef RT30xx
#define BBP_R138 138 // add by johnli, RF power sequence setup, ADC dynamic on/off control #define BBP_R138 138 // add by johnli, RF power sequence setup, ADC dynamic on/off control
#endif // RT30xx // #endif // RT30xx //
#define BBPR94_DEFAULT 0x06 // Add 1 value will gain 1db #define BBPR94_DEFAULT 0x06 // Add 1 value will gain 1db
// //
// BBP & RF are using indirect access. Before write any value into it. // BBP & RF are using indirect access. Before write any value into it.
// We have to make sure there is no outstanding command pending via checking busy bit. // We have to make sure there is no outstanding command pending via checking busy bit.
// //
#define MAX_BUSY_COUNT 100 // Number of retry before failing access BBP & RF indirect register #define MAX_BUSY_COUNT 100 // Number of retry before failing access BBP & RF indirect register
//#define PHY_TR_SWITCH_TIME 5 // usec //#define PHY_TR_SWITCH_TIME 5 // usec
...@@ -416,7 +414,6 @@ ...@@ -416,7 +414,6 @@
} \ } \
}while(0) }while(0)
/* /*
This marco used for the BBP write operation which didn't need via MCU. This marco used for the BBP write operation which didn't need via MCU.
*/ */
...@@ -539,7 +536,6 @@ ...@@ -539,7 +536,6 @@
RTMP_IO_WRITE32(_pAd, 0x1210, _macData); \ RTMP_IO_WRITE32(_pAd, 0x1210, _macData); \
}while(0) }while(0)
#define RTMP_ASIC_MMPS_ENABLE(_pAd) \ #define RTMP_ASIC_MMPS_ENABLE(_pAd) \
do{ \ do{ \
UINT32 _macData; \ UINT32 _macData; \
......
...@@ -41,7 +41,6 @@ ...@@ -41,7 +41,6 @@
#include "rtmp_type.h" #include "rtmp_type.h"
#include "rtmp_def.h" #include "rtmp_def.h"
#define ODOR 0 #define ODOR 0
#define IDOR 1 #define IDOR 1
#define BOTH 2 #define BOTH 2
...@@ -53,28 +52,27 @@ ...@@ -53,28 +52,27 @@
typedef struct _CH_DESP { typedef struct _CH_DESP {
UCHAR FirstChannel; UCHAR FirstChannel;
UCHAR NumOfCh; UCHAR NumOfCh;
CHAR MaxTxPwr; // dBm CHAR MaxTxPwr; // dBm
UCHAR Geography; // 0:out door, 1:in door, 2:both UCHAR Geography; // 0:out door, 1:in door, 2:both
BOOLEAN DfsReq; // Dfs require, 0: No, 1: yes. BOOLEAN DfsReq; // Dfs require, 0: No, 1: yes.
} CH_DESP, *PCH_DESP; } CH_DESP, *PCH_DESP;
typedef struct _CH_REGION { typedef struct _CH_REGION {
UCHAR CountReg[3]; UCHAR CountReg[3];
UCHAR DfsType; // 0: CE, 1: FCC, 2: JAP, 3:JAP_W53, JAP_W56 UCHAR DfsType; // 0: CE, 1: FCC, 2: JAP, 3:JAP_W53, JAP_W56
CH_DESP ChDesp[10]; CH_DESP ChDesp[10];
} CH_REGION, *PCH_REGION; } CH_REGION, *PCH_REGION;
extern CH_REGION ChRegion[]; extern CH_REGION ChRegion[];
typedef struct _CH_FREQ_MAP_{ typedef struct _CH_FREQ_MAP_ {
UINT16 channel; UINT16 channel;
UINT16 freqKHz; UINT16 freqKHz;
}CH_FREQ_MAP; } CH_FREQ_MAP;
extern CH_FREQ_MAP CH_HZ_ID_MAP[]; extern CH_FREQ_MAP CH_HZ_ID_MAP[];
extern int CH_HZ_ID_MAP_NUM; extern int CH_HZ_ID_MAP_NUM;
#define MAP_CHANNEL_ID_TO_KHZ(_ch, _khz) \ #define MAP_CHANNEL_ID_TO_KHZ(_ch, _khz) \
do{ \ do{ \
int _chIdx; \ int _chIdx; \
...@@ -105,24 +103,15 @@ extern int CH_HZ_ID_MAP_NUM; ...@@ -105,24 +103,15 @@ extern int CH_HZ_ID_MAP_NUM;
(_ch) = 1; \ (_ch) = 1; \
}while(0) }while(0)
VOID BuildChannelListEx(IN PRTMP_ADAPTER pAd);
VOID BuildChannelListEx( VOID BuildBeaconChList(IN PRTMP_ADAPTER pAd,
IN PRTMP_ADAPTER pAd); OUT PUCHAR pBuf, OUT PULONG pBufLen);
VOID BuildBeaconChList( VOID N_ChannelCheck(IN PRTMP_ADAPTER pAd);
IN PRTMP_ADAPTER pAd,
OUT PUCHAR pBuf,
OUT PULONG pBufLen);
VOID N_ChannelCheck( VOID N_SetCenCh(IN PRTMP_ADAPTER pAd);
IN PRTMP_ADAPTER pAd);
VOID N_SetCenCh( UINT8 GetCuntryMaxTxPwr(IN PRTMP_ADAPTER pAd, IN UINT8 channel);
IN PRTMP_ADAPTER pAd);
UINT8 GetCuntryMaxTxPwr(
IN PRTMP_ADAPTER pAd,
IN UINT8 channel);
#endif // __CHLIST_H__ #endif // __CHLIST_H__
...@@ -39,23 +39,18 @@ ...@@ -39,23 +39,18 @@
#ifndef __ACTION_H__ #ifndef __ACTION_H__
#define __ACTION_H__ #define __ACTION_H__
typedef struct PACKED __HT_INFO_OCTET typedef struct PACKED __HT_INFO_OCTET {
{ UCHAR Request:1;
UCHAR Request:1; UCHAR Forty_MHz_Intolerant:1;
UCHAR Forty_MHz_Intolerant:1; UCHAR STA_Channel_Width:1;
UCHAR STA_Channel_Width:1; UCHAR Reserved:5;
UCHAR Reserved:5;
} HT_INFORMATION_OCTET; } HT_INFORMATION_OCTET;
typedef struct PACKED __FRAME_HT_INFO {
typedef struct PACKED __FRAME_HT_INFO HEADER_802_11 Hdr;
{ UCHAR Category;
HEADER_802_11 Hdr; UCHAR Action;
UCHAR Category; HT_INFORMATION_OCTET HT_Info;
UCHAR Action; } FRAME_HT_INFO, *PFRAME_HT_INFO;
HT_INFORMATION_OCTET HT_Info;
} FRAME_HT_INFO, *PFRAME_HT_INFO;
#endif /* __ACTION_H__ */ #endif /* __ACTION_H__ */
...@@ -48,24 +48,18 @@ ...@@ -48,24 +48,18 @@
#ifdef SHA1_SUPPORT #ifdef SHA1_SUPPORT
#define HMAC_SHA1_SUPPORT #define HMAC_SHA1_SUPPORT
VOID HMAC_SHA1 ( VOID HMAC_SHA1(IN const UINT8 Key[],
IN const UINT8 Key[], IN UINT KeyLen,
IN UINT KeyLen, IN const UINT8 Message[],
IN const UINT8 Message[], IN UINT MessageLen, OUT UINT8 MAC[], IN UINT MACLen);
IN UINT MessageLen,
OUT UINT8 MAC[],
IN UINT MACLen);
#endif /* SHA1_SUPPORT */ #endif /* SHA1_SUPPORT */
#ifdef MD5_SUPPORT #ifdef MD5_SUPPORT
#define HMAC_MD5_SUPPORT #define HMAC_MD5_SUPPORT
VOID HMAC_MD5 ( VOID HMAC_MD5(IN const UINT8 Key[],
IN const UINT8 Key[], IN UINT KeyLen,
IN UINT KeyLen, IN const UINT8 Message[],
IN const UINT8 Message[], IN UINT MessageLen, OUT UINT8 MAC[], IN UINT MACLen);
IN UINT MessageLen,
OUT UINT8 MAC[],
IN UINT MACLen);
#endif /* MD5_SUPPORT */ #endif /* MD5_SUPPORT */
#endif /* __CRYPT_HMAC_H__ */ #endif /* __CRYPT_HMAC_H__ */
...@@ -51,30 +51,22 @@ ...@@ -51,30 +51,22 @@
#define MD5_SUPPORT #define MD5_SUPPORT
#ifdef MD5_SUPPORT #ifdef MD5_SUPPORT
#define MD5_BLOCK_SIZE 64 /* 512 bits = 64 bytes */ #define MD5_BLOCK_SIZE 64 /* 512 bits = 64 bytes */
#define MD5_DIGEST_SIZE 16 /* 128 bits = 16 bytes */ #define MD5_DIGEST_SIZE 16 /* 128 bits = 16 bytes */
typedef struct { typedef struct {
UINT32 HashValue[4]; UINT32 HashValue[4];
UINT64 MessageLen; UINT64 MessageLen;
UINT8 Block[MD5_BLOCK_SIZE]; UINT8 Block[MD5_BLOCK_SIZE];
UINT BlockLen; UINT BlockLen;
} MD5_CTX_STRUC, *PMD5_CTX_STRUC; } MD5_CTX_STRUC, *PMD5_CTX_STRUC;
VOID MD5_Init ( VOID MD5_Init(IN MD5_CTX_STRUC * pMD5_CTX);
IN MD5_CTX_STRUC *pMD5_CTX); VOID MD5_Hash(IN MD5_CTX_STRUC * pMD5_CTX);
VOID MD5_Hash ( VOID MD5_Append(IN MD5_CTX_STRUC * pMD5_CTX,
IN MD5_CTX_STRUC *pMD5_CTX); IN const UINT8 Message[], IN UINT MessageLen);
VOID MD5_Append ( VOID MD5_End(IN MD5_CTX_STRUC * pMD5_CTX, OUT UINT8 DigestMessage[]);
IN MD5_CTX_STRUC *pMD5_CTX, VOID RT_MD5(IN const UINT8 Message[],
IN const UINT8 Message[], IN UINT MessageLen, OUT UINT8 DigestMessage[]);
IN UINT MessageLen);
VOID MD5_End (
IN MD5_CTX_STRUC *pMD5_CTX,
OUT UINT8 DigestMessage[]);
VOID RT_MD5 (
IN const UINT8 Message[],
IN UINT MessageLen,
OUT UINT8 DigestMessage[]);
#endif /* MD5_SUPPORT */ #endif /* MD5_SUPPORT */
#endif /* __CRYPT_MD5_H__ */ #endif /* __CRYPT_MD5_H__ */
...@@ -52,30 +52,22 @@ ...@@ -52,30 +52,22 @@
#define SHA1_SUPPORT #define SHA1_SUPPORT
#ifdef SHA1_SUPPORT #ifdef SHA1_SUPPORT
#define SHA1_BLOCK_SIZE 64 /* 512 bits = 64 bytes */ #define SHA1_BLOCK_SIZE 64 /* 512 bits = 64 bytes */
#define SHA1_DIGEST_SIZE 20 /* 160 bits = 20 bytes */ #define SHA1_DIGEST_SIZE 20 /* 160 bits = 20 bytes */
typedef struct _SHA1_CTX_STRUC { typedef struct _SHA1_CTX_STRUC {
UINT32 HashValue[5]; /* 5 = (SHA1_DIGEST_SIZE / 32) */ UINT32 HashValue[5]; /* 5 = (SHA1_DIGEST_SIZE / 32) */
UINT64 MessageLen; /* total size */ UINT64 MessageLen; /* total size */
UINT8 Block[SHA1_BLOCK_SIZE]; UINT8 Block[SHA1_BLOCK_SIZE];
UINT BlockLen; UINT BlockLen;
} SHA1_CTX_STRUC, *PSHA1_CTX_STRUC; } SHA1_CTX_STRUC, *PSHA1_CTX_STRUC;
VOID RT_SHA1_Init ( VOID RT_SHA1_Init(IN SHA1_CTX_STRUC * pSHA_CTX);
IN SHA1_CTX_STRUC *pSHA_CTX); VOID SHA1_Hash(IN SHA1_CTX_STRUC * pSHA_CTX);
VOID SHA1_Hash ( VOID SHA1_Append(IN SHA1_CTX_STRUC * pSHA_CTX,
IN SHA1_CTX_STRUC *pSHA_CTX); IN const UINT8 Message[], IN UINT MessageLen);
VOID SHA1_Append ( VOID SHA1_End(IN SHA1_CTX_STRUC * pSHA_CTX, OUT UINT8 DigestMessage[]);
IN SHA1_CTX_STRUC *pSHA_CTX, VOID RT_SHA1(IN const UINT8 Message[],
IN const UINT8 Message[], IN UINT MessageLen, OUT UINT8 DigestMessage[]);
IN UINT MessageLen);
VOID SHA1_End (
IN SHA1_CTX_STRUC *pSHA_CTX,
OUT UINT8 DigestMessage[]);
VOID RT_SHA1 (
IN const UINT8 Message[],
IN UINT MessageLen,
OUT UINT8 DigestMessage[]);
#endif /* SHA1_SUPPORT */ #endif /* SHA1_SUPPORT */
#endif /* __CRYPT_SHA2_H__ */ #endif /* __CRYPT_SHA2_H__ */
...@@ -36,6 +36,4 @@ ...@@ -36,6 +36,4 @@
Fonchi 03-12-2007 created Fonchi 03-12-2007 created
*/ */
BOOLEAN RadarChannelCheck( BOOLEAN RadarChannelCheck(IN PRTMP_ADAPTER pAd, IN UCHAR Ch);
IN PRTMP_ADAPTER pAd,
IN UCHAR Ch);
...@@ -24,7 +24,6 @@ ...@@ -24,7 +24,6 @@
* * * *
************************************************************************* *************************************************************************
Module Name: Module Name:
eeprom.h eeprom.h
...@@ -38,41 +37,31 @@ ...@@ -38,41 +37,31 @@
#ifndef __EEPROM_H__ #ifndef __EEPROM_H__
#define __EEPROM_H__ #define __EEPROM_H__
#ifdef RTMP_PCI_SUPPORT #ifdef RTMP_PCI_SUPPORT
/************************************************************************* /*************************************************************************
* Public function declarations for prom-based chipset * Public function declarations for prom-based chipset
************************************************************************/ ************************************************************************/
int rtmp_ee_prom_read16( int rtmp_ee_prom_read16(IN PRTMP_ADAPTER pAd,
IN PRTMP_ADAPTER pAd, IN USHORT Offset, OUT USHORT * pValue);
IN USHORT Offset,
OUT USHORT *pValue);
#endif // RTMP_PCI_SUPPORT // #endif // RTMP_PCI_SUPPORT //
#ifdef RTMP_USB_SUPPORT #ifdef RTMP_USB_SUPPORT
/************************************************************************* /*************************************************************************
* Public function declarations for usb-based prom chipset * Public function declarations for usb-based prom chipset
************************************************************************/ ************************************************************************/
NTSTATUS RTUSBReadEEPROM16( NTSTATUS RTUSBReadEEPROM16(IN PRTMP_ADAPTER pAd,
IN PRTMP_ADAPTER pAd, IN USHORT offset, OUT PUSHORT pData);
IN USHORT offset,
OUT PUSHORT pData);
#endif // RTMP_USB_SUPPORT // #endif // RTMP_USB_SUPPORT //
#ifdef RT30xx #ifdef RT30xx
#ifdef RTMP_EFUSE_SUPPORT #ifdef RTMP_EFUSE_SUPPORT
int rtmp_ee_efuse_read16( int rtmp_ee_efuse_read16(IN RTMP_ADAPTER * pAd,
IN RTMP_ADAPTER *pAd, IN USHORT Offset, OUT USHORT * pValue);
IN USHORT Offset,
OUT USHORT *pValue);
#endif // RTMP_EFUSE_SUPPORT // #endif // RTMP_EFUSE_SUPPORT //
#endif // RT30xx // #endif // RT30xx //
/************************************************************************* /*************************************************************************
* Public function declarations for prom operation callback functions setting * Public function declarations for prom operation callback functions setting
************************************************************************/ ************************************************************************/
INT RtmpChipOpsEepromHook( INT RtmpChipOpsEepromHook(IN RTMP_ADAPTER * pAd, IN INT infType);
IN RTMP_ADAPTER *pAd,
IN INT infType);
#endif // __EEPROM_H__ // #endif // __EEPROM_H__ //
...@@ -31,7 +31,6 @@ ...@@ -31,7 +31,6 @@
#define RT28XX_HANDLE_DEV_ASSIGN(handle, dev_p) \ #define RT28XX_HANDLE_DEV_ASSIGN(handle, dev_p) \
((POS_COOKIE)handle)->pci_dev = dev_p; ((POS_COOKIE)handle)->pci_dev = dev_p;
#ifdef LINUX #ifdef LINUX
// set driver data // set driver data
#define RT28XX_DRVDATA_SET(_a) pci_set_drvdata(_a, net_dev); #define RT28XX_DRVDATA_SET(_a) pci_set_drvdata(_a, net_dev);
...@@ -64,7 +63,6 @@ ...@@ -64,7 +63,6 @@
pci_resource_len(dev_p, 0)); } \ pci_resource_len(dev_p, 0)); } \
if (net_dev->irq) pci_release_regions(dev_p); } if (net_dev->irq) pci_release_regions(dev_p); }
#define PCI_REG_READ_WORD(pci_dev, offset, Configuration) \ #define PCI_REG_READ_WORD(pci_dev, offset, Configuration) \
if (pci_read_config_word(pci_dev, offset, &reg16) == 0) \ if (pci_read_config_word(pci_dev, offset, &reg16) == 0) \
Configuration = le2cpu16(reg16); \ Configuration = le2cpu16(reg16); \
...@@ -77,5 +75,4 @@ ...@@ -77,5 +75,4 @@
#endif // LINUX // #endif // LINUX //
#endif // __RTMP_PCI_H__ // #endif // __RTMP_PCI_H__ //
...@@ -28,28 +28,24 @@ ...@@ -28,28 +28,24 @@
#ifndef __RTMP_USB_H__ #ifndef __RTMP_USB_H__
#define __RTMP_USB_H__ #define __RTMP_USB_H__
#include "../rtusb_io.h" #include "../rtusb_io.h"
#ifdef LINUX #ifdef LINUX
#include <linux/usb.h> #include <linux/usb.h>
typedef struct usb_device * PUSB_DEV; typedef struct usb_device *PUSB_DEV;
typedef struct urb *purbb_t; typedef struct urb *purbb_t;
typedef struct usb_ctrlrequest devctrlrequest; typedef struct usb_ctrlrequest devctrlrequest;
#endif // LINUX // #endif // LINUX //
extern UCHAR EpToQueue[6]; extern UCHAR EpToQueue[6];
#define RXBULKAGGRE_ZISE 12 #define RXBULKAGGRE_ZISE 12
#define MAX_TXBULK_LIMIT (LOCAL_TXBUF_SIZE*(BULKAGGRE_ZISE-1)) #define MAX_TXBULK_LIMIT (LOCAL_TXBUF_SIZE*(BULKAGGRE_ZISE-1))
#define MAX_TXBULK_SIZE (LOCAL_TXBUF_SIZE*BULKAGGRE_ZISE) #define MAX_TXBULK_SIZE (LOCAL_TXBUF_SIZE*BULKAGGRE_ZISE)
#define MAX_RXBULK_SIZE (LOCAL_TXBUF_SIZE*RXBULKAGGRE_ZISE) #define MAX_RXBULK_SIZE (LOCAL_TXBUF_SIZE*RXBULKAGGRE_ZISE)
#define MAX_MLME_HANDLER_MEMORY 20 #define MAX_MLME_HANDLER_MEMORY 20
// Flags for Bulkflags control for bulk out data // Flags for Bulkflags control for bulk out data
// //
#define fRTUSB_BULK_OUT_DATA_NULL 0x00000001 #define fRTUSB_BULK_OUT_DATA_NULL 0x00000001
...@@ -69,7 +65,6 @@ extern UCHAR EpToQueue[6]; ...@@ -69,7 +65,6 @@ extern UCHAR EpToQueue[6];
// TODO:move to ./ate/include/iface/ate_usb.h // TODO:move to ./ate/include/iface/ate_usb.h
#define FREE_HTTX_RING(_pCookie, _pipeId, _txContext) \ #define FREE_HTTX_RING(_pCookie, _pipeId, _txContext) \
{ \ { \
if ((_txContext)->ENextBulkOutPosition == (_txContext)->CurWritePosition) \ if ((_txContext)->ENextBulkOutPosition == (_txContext)->CurWritePosition) \
...@@ -79,8 +74,6 @@ extern UCHAR EpToQueue[6]; ...@@ -79,8 +74,6 @@ extern UCHAR EpToQueue[6];
/*NdisInterlockedDecrement(&(_p)->TxCount); */\ /*NdisInterlockedDecrement(&(_p)->TxCount); */\
} }
/****************************************************************************** /******************************************************************************
USB Bulk operation related definitions USB Bulk operation related definitions
...@@ -100,7 +93,7 @@ extern UCHAR EpToQueue[6]; ...@@ -100,7 +93,7 @@ extern UCHAR EpToQueue[6];
// unlink urb // unlink urb
#define RTUSB_UNLINK_URB(pUrb) usb_kill_urb(pUrb) #define RTUSB_UNLINK_URB(pUrb) usb_kill_urb(pUrb)
extern void dump_urb(struct urb* purb); extern void dump_urb(struct urb *purb);
#define InterlockedIncrement atomic_inc #define InterlockedIncrement atomic_inc
#define NdisInterlockedIncrement atomic_inc #define NdisInterlockedIncrement atomic_inc
...@@ -110,12 +103,8 @@ extern void dump_urb(struct urb* purb); ...@@ -110,12 +103,8 @@ extern void dump_urb(struct urb* purb);
#endif // LINUX // #endif // LINUX //
#define NT_SUCCESS(status) (((status) >=0) ? (TRUE):(FALSE)) #define NT_SUCCESS(status) (((status) >=0) ? (TRUE):(FALSE))
#define USBD_TRANSFER_DIRECTION_OUT 0 #define USBD_TRANSFER_DIRECTION_OUT 0
#define USBD_TRANSFER_DIRECTION_IN 0 #define USBD_TRANSFER_DIRECTION_IN 0
#define USBD_SHORT_TRANSFER_OK 0 #define USBD_SHORT_TRANSFER_OK 0
...@@ -131,7 +120,6 @@ extern void dump_urb(struct urb* purb); ...@@ -131,7 +120,6 @@ extern void dump_urb(struct urb* purb);
#define CONTROL_TIMEOUT_JIFFIES ( (100 * OS_HZ) / 1000) #define CONTROL_TIMEOUT_JIFFIES ( (100 * OS_HZ) / 1000)
#define UNLINK_TIMEOUT_MS 3 #define UNLINK_TIMEOUT_MS 3
VOID RTUSBBulkOutDataPacketComplete(purbb_t purb, struct pt_regs *pt_regs); VOID RTUSBBulkOutDataPacketComplete(purbb_t purb, struct pt_regs *pt_regs);
VOID RTUSBBulkOutMLMEPacketComplete(purbb_t pUrb, struct pt_regs *pt_regs); VOID RTUSBBulkOutMLMEPacketComplete(purbb_t pUrb, struct pt_regs *pt_regs);
VOID RTUSBBulkOutNullFrameComplete(purbb_t pUrb, struct pt_regs *pt_regs); VOID RTUSBBulkOutNullFrameComplete(purbb_t pUrb, struct pt_regs *pt_regs);
...@@ -139,7 +127,6 @@ VOID RTUSBBulkOutRTSFrameComplete(purbb_t pUrb, struct pt_regs *pt_regs); ...@@ -139,7 +127,6 @@ VOID RTUSBBulkOutRTSFrameComplete(purbb_t pUrb, struct pt_regs *pt_regs);
VOID RTUSBBulkOutPsPollComplete(purbb_t pUrb, struct pt_regs *pt_regs); VOID RTUSBBulkOutPsPollComplete(purbb_t pUrb, struct pt_regs *pt_regs);
VOID RTUSBBulkRxComplete(purbb_t pUrb, struct pt_regs *pt_regs); VOID RTUSBBulkRxComplete(purbb_t pUrb, struct pt_regs *pt_regs);
#ifdef KTHREAD_SUPPORT #ifdef KTHREAD_SUPPORT
#define RTUSBMlmeUp(pAd) \ #define RTUSBMlmeUp(pAd) \
do{ \ do{ \
...@@ -196,5 +183,4 @@ VOID RTUSBBulkRxComplete(purbb_t pUrb, struct pt_regs *pt_regs); ...@@ -196,5 +183,4 @@ VOID RTUSBBulkRxComplete(purbb_t pUrb, struct pt_regs *pt_regs);
#define RTMP_IRQ_REQUEST(net_dev) do{}while(0) #define RTMP_IRQ_REQUEST(net_dev) do{}while(0)
#define RTMP_IRQ_RELEASE(net_dev) do{}while(0) #define RTMP_IRQ_RELEASE(net_dev) do{}while(0)
#endif // __RTMP_USB_H__ // #endif // __RTMP_USB_H__ //
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...@@ -68,5 +68,4 @@ ...@@ -68,5 +68,4 @@
#include "igmp_snoop.h" #include "igmp_snoop.h"
#endif // IGMP_SNOOP_SUPPORT // #endif // IGMP_SNOOP_SUPPORT //
#endif // __RT_CONFIG_H__ #endif // __RT_CONFIG_H__
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...@@ -37,42 +37,27 @@ ...@@ -37,42 +37,27 @@
#ifndef __RTMP_CKIPMIC_H__ #ifndef __RTMP_CKIPMIC_H__
#define __RTMP_CKIPMIC_H__ #define __RTMP_CKIPMIC_H__
typedef struct _MIC_CONTEXT { typedef struct _MIC_CONTEXT {
/* --- MMH context */ /* --- MMH context */
UCHAR CK[16]; /* the key */ UCHAR CK[16]; /* the key */
UCHAR coefficient[16]; /* current aes counter mode coefficients */ UCHAR coefficient[16]; /* current aes counter mode coefficients */
ULONGLONG accum; /* accumulated mic, reduced to u32 in final() */ ULONGLONG accum; /* accumulated mic, reduced to u32 in final() */
UINT position; /* current position (byte offset) in message */ UINT position; /* current position (byte offset) in message */
UCHAR part[4]; /* for conversion of message to u32 for mmh */ UCHAR part[4]; /* for conversion of message to u32 for mmh */
} MIC_CONTEXT, *PMIC_CONTEXT; } MIC_CONTEXT, *PMIC_CONTEXT;
VOID xor_128( VOID xor_128(IN PUCHAR a, IN PUCHAR b, OUT PUCHAR out);
IN PUCHAR a,
IN PUCHAR b,
OUT PUCHAR out);
UCHAR RTMPCkipSbox( UCHAR RTMPCkipSbox(IN UCHAR a);
IN UCHAR a);
VOID xor_32( VOID xor_32(IN PUCHAR a, IN PUCHAR b, OUT PUCHAR out);
IN PUCHAR a,
IN PUCHAR b,
OUT PUCHAR out);
VOID next_key( VOID next_key(IN PUCHAR key, IN INT round);
IN PUCHAR key,
IN INT round);
VOID byte_sub( VOID byte_sub(IN PUCHAR in, OUT PUCHAR out);
IN PUCHAR in,
OUT PUCHAR out);
VOID shift_row( VOID shift_row(IN PUCHAR in, OUT PUCHAR out);
IN PUCHAR in,
OUT PUCHAR out);
VOID mix_column( VOID mix_column(IN PUCHAR in, OUT PUCHAR out);
IN PUCHAR in,
OUT PUCHAR out);
#endif //__RTMP_CKIPMIC_H__ #endif //__RTMP_CKIPMIC_H__
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...@@ -30,73 +30,71 @@ ...@@ -30,73 +30,71 @@
#include "rtmp_type.h" #include "rtmp_type.h"
// 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1. // 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1.
typedef struct PACKED { typedef struct PACKED {
UINT32 MA:1; //management action payload exist in (QoS Null+HTC) UINT32 MA:1; //management action payload exist in (QoS Null+HTC)
UINT32 TRQ:1; //sounding request UINT32 TRQ:1; //sounding request
UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback
UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110. UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110.
UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB. UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB.
UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available
UINT32 CalPos:2; // calibration position UINT32 CalPos:2; // calibration position
UINT32 CalSeq:2; //calibration sequence UINT32 CalSeq:2; //calibration sequence
UINT32 FBKReq:2; //feedback request UINT32 FBKReq:2; //feedback request
UINT32 CSISTEERING:2; //CSI/ STEERING UINT32 CSISTEERING:2; //CSI/ STEERING
UINT32 ZLFAnnouce:1; // ZLF announcement UINT32 ZLFAnnouce:1; // ZLF announcement
UINT32 rsv:5; //calibration sequence UINT32 rsv:5; //calibration sequence
UINT32 ACConstraint:1; //feedback request UINT32 ACConstraint:1; //feedback request
UINT32 RDG:1; //RDG / More PPDU UINT32 RDG:1; //RDG / More PPDU
} HT_CONTROL, *PHT_CONTROL; } HT_CONTROL, *PHT_CONTROL;
// 2-byte QOS CONTROL field // 2-byte QOS CONTROL field
typedef struct PACKED { typedef struct PACKED {
USHORT TID:4; USHORT TID:4;
USHORT EOSP:1; USHORT EOSP:1;
USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA
USHORT AMsduPresent:1; USHORT AMsduPresent:1;
USHORT Txop_QueueSize:8; USHORT Txop_QueueSize:8;
} QOS_CONTROL, *PQOS_CONTROL; } QOS_CONTROL, *PQOS_CONTROL;
// 2-byte Frame control field // 2-byte Frame control field
typedef struct PACKED { typedef struct PACKED {
USHORT Ver:2; // Protocol version USHORT Ver:2; // Protocol version
USHORT Type:2; // MSDU type USHORT Type:2; // MSDU type
USHORT SubType:4; // MSDU subtype USHORT SubType:4; // MSDU subtype
USHORT ToDs:1; // To DS indication USHORT ToDs:1; // To DS indication
USHORT FrDs:1; // From DS indication USHORT FrDs:1; // From DS indication
USHORT MoreFrag:1; // More fragment bit USHORT MoreFrag:1; // More fragment bit
USHORT Retry:1; // Retry status bit USHORT Retry:1; // Retry status bit
USHORT PwrMgmt:1; // Power management bit USHORT PwrMgmt:1; // Power management bit
USHORT MoreData:1; // More data bit USHORT MoreData:1; // More data bit
USHORT Wep:1; // Wep data USHORT Wep:1; // Wep data
USHORT Order:1; // Strict order expected USHORT Order:1; // Strict order expected
} FRAME_CONTROL, *PFRAME_CONTROL; } FRAME_CONTROL, *PFRAME_CONTROL;
typedef struct PACKED _HEADER_802_11 { typedef struct PACKED _HEADER_802_11 {
FRAME_CONTROL FC; FRAME_CONTROL FC;
USHORT Duration; USHORT Duration;
UCHAR Addr1[MAC_ADDR_LEN]; UCHAR Addr1[MAC_ADDR_LEN];
UCHAR Addr2[MAC_ADDR_LEN]; UCHAR Addr2[MAC_ADDR_LEN];
UCHAR Addr3[MAC_ADDR_LEN]; UCHAR Addr3[MAC_ADDR_LEN];
USHORT Frag:4; USHORT Frag:4;
USHORT Sequence:12; USHORT Sequence:12;
UCHAR Octet[0]; UCHAR Octet[0];
} HEADER_802_11, *PHEADER_802_11; } HEADER_802_11, *PHEADER_802_11;
typedef struct PACKED _PSPOLL_FRAME { typedef struct PACKED _PSPOLL_FRAME {
FRAME_CONTROL FC; FRAME_CONTROL FC;
USHORT Aid; USHORT Aid;
UCHAR Bssid[MAC_ADDR_LEN]; UCHAR Bssid[MAC_ADDR_LEN];
UCHAR Ta[MAC_ADDR_LEN]; UCHAR Ta[MAC_ADDR_LEN];
} PSPOLL_FRAME, *PPSPOLL_FRAME; } PSPOLL_FRAME, *PPSPOLL_FRAME;
typedef struct PACKED _RTS_FRAME { typedef struct PACKED _RTS_FRAME {
FRAME_CONTROL FC; FRAME_CONTROL FC;
USHORT Duration; USHORT Duration;
UCHAR Addr1[MAC_ADDR_LEN]; UCHAR Addr1[MAC_ADDR_LEN];
UCHAR Addr2[MAC_ADDR_LEN]; UCHAR Addr2[MAC_ADDR_LEN];
}RTS_FRAME, *PRTS_FRAME; } RTS_FRAME, *PRTS_FRAME;
#endif // __DOT11_BASE_H__ // #endif // __DOT11_BASE_H__ //
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