Commit 534e0481 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab

[media] drxk: Add support for parallel mode and prints mpeg mode

While the driver has support for both serial and parallel mode,
There's was way to select serial mode via configuration. Add
a config option for that, while keeping the default in serial mode.

Also, at debug mode, it will now print a message when mpeg is
enabled/disabled, and showing if parallel or serial mode were
selected, helping developers to double-check if the DRX-K is at
the right mode.
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 0d3e6fe7
...@@ -8,6 +8,8 @@ ...@@ -8,6 +8,8 @@
* struct drxk_config - Configure the initial parameters for DRX-K * struct drxk_config - Configure the initial parameters for DRX-K
* *
* adr: I2C Address of the DRX-K * adr: I2C Address of the DRX-K
* parallel_ts: true means that the device uses parallel TS,
* Serial otherwise.
* single_master: Device is on the single master mode * single_master: Device is on the single master mode
* no_i2c_bridge: Don't switch the I2C bridge to talk with tuner * no_i2c_bridge: Don't switch the I2C bridge to talk with tuner
* antenna_gpio: GPIO bit used to control the antenna * antenna_gpio: GPIO bit used to control the antenna
...@@ -22,6 +24,7 @@ struct drxk_config { ...@@ -22,6 +24,7 @@ struct drxk_config {
u8 adr; u8 adr;
bool single_master; bool single_master;
bool no_i2c_bridge; bool no_i2c_bridge;
bool parallel_ts;
bool antenna_dvbt; bool antenna_dvbt;
u16 antenna_gpio; u16 antenna_gpio;
......
...@@ -660,7 +660,6 @@ static int init_state(struct drxk_state *state) ...@@ -660,7 +660,6 @@ static int init_state(struct drxk_state *state)
/* io_pad_cfg_mode output mode is drive always */ /* io_pad_cfg_mode output mode is drive always */
/* io_pad_cfg_drive is set to power 2 (23 mA) */ /* io_pad_cfg_drive is set to power 2 (23 mA) */
u32 ulGPIOCfg = 0x0113; u32 ulGPIOCfg = 0x0113;
u32 ulSerialMode = 1;
u32 ulInvertTSClock = 0; u32 ulInvertTSClock = 0;
u32 ulTSDataStrength = DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH; u32 ulTSDataStrength = DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH;
u32 ulTSClockkStrength = DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH; u32 ulTSClockkStrength = DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH;
...@@ -811,8 +810,6 @@ static int init_state(struct drxk_state *state) ...@@ -811,8 +810,6 @@ static int init_state(struct drxk_state *state)
/* MPEG output configuration */ /* MPEG output configuration */
state->m_enableMPEGOutput = true; /* If TRUE; enable MPEG ouput */ state->m_enableMPEGOutput = true; /* If TRUE; enable MPEG ouput */
state->m_insertRSByte = false; /* If TRUE; insert RS byte */ state->m_insertRSByte = false; /* If TRUE; insert RS byte */
state->m_enableParallel = true; /* If TRUE;
parallel out otherwise serial */
state->m_invertDATA = false; /* If TRUE; invert DATA signals */ state->m_invertDATA = false; /* If TRUE; invert DATA signals */
state->m_invertERR = false; /* If TRUE; invert ERR signal */ state->m_invertERR = false; /* If TRUE; invert ERR signal */
state->m_invertSTR = false; /* If TRUE; invert STR signals */ state->m_invertSTR = false; /* If TRUE; invert STR signals */
...@@ -857,8 +854,6 @@ static int init_state(struct drxk_state *state) ...@@ -857,8 +854,6 @@ static int init_state(struct drxk_state *state)
state->m_bPowerDown = false; state->m_bPowerDown = false;
state->m_currentPowerMode = DRX_POWER_DOWN; state->m_currentPowerMode = DRX_POWER_DOWN;
state->m_enableParallel = (ulSerialMode == 0);
state->m_rfmirror = (ulRfMirror == 0); state->m_rfmirror = (ulRfMirror == 0);
state->m_IfAgcPol = false; state->m_IfAgcPol = false;
return 0; return 0;
...@@ -1195,7 +1190,9 @@ static int MPEGTSConfigurePins(struct drxk_state *state, bool mpegEnable) ...@@ -1195,7 +1190,9 @@ static int MPEGTSConfigurePins(struct drxk_state *state, bool mpegEnable)
u16 sioPdrMclkCfg = 0; u16 sioPdrMclkCfg = 0;
u16 sioPdrMdxCfg = 0; u16 sioPdrMdxCfg = 0;
dprintk(1, "\n"); dprintk(1, ": mpeg %s, %s mode\n",
mpegEnable ? "enable" : "disable",
state->m_enableParallel ? "parallel" : "serial");
/* stop lock indicator process */ /* stop lock indicator process */
status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE);
...@@ -6432,6 +6429,11 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config, ...@@ -6432,6 +6429,11 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config,
state->antenna_dvbt = config->antenna_dvbt; state->antenna_dvbt = config->antenna_dvbt;
state->m_ChunkSize = config->chunk_size; state->m_ChunkSize = config->chunk_size;
if (config->parallel_ts)
state->m_enableParallel = true;
else
state->m_enableParallel = false;
/* NOTE: as more UIO bits will be used, add them to the mask */ /* NOTE: as more UIO bits will be used, add them to the mask */
state->UIO_mask = config->antenna_gpio; state->UIO_mask = config->antenna_gpio;
......
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