Commit 5356c2c7 authored by Ludovic Barre's avatar Ludovic Barre Committed by Mark Brown

spi: spi-mem: stm32-qspi: avoid memory corruption at low frequency

This patch solves a memory corruption seen at 8 MHz.
To avoid such issue, timeout counter is disabled.
Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 26843bb1
...@@ -76,7 +76,6 @@ ...@@ -76,7 +76,6 @@
#define QSPI_PSMAR 0x28 #define QSPI_PSMAR 0x28
#define QSPI_PIR 0x2c #define QSPI_PIR 0x2c
#define QSPI_LPTR 0x30 #define QSPI_LPTR 0x30
#define LPTR_DFT_TIMEOUT 0x10
#define STM32_QSPI_MAX_MMAP_SZ SZ_256M #define STM32_QSPI_MAX_MMAP_SZ SZ_256M
#define STM32_QSPI_MAX_NORCHIP 2 #define STM32_QSPI_MAX_NORCHIP 2
...@@ -372,8 +371,7 @@ static int stm32_qspi_setup(struct spi_device *spi) ...@@ -372,8 +371,7 @@ static int stm32_qspi_setup(struct spi_device *spi)
flash->presc = presc; flash->presc = presc;
mutex_lock(&qspi->lock); mutex_lock(&qspi->lock);
writel_relaxed(LPTR_DFT_TIMEOUT, qspi->io_base + QSPI_LPTR); cr = FIELD_PREP(CR_FTHRES_MASK, 3) | CR_SSHIFT | CR_EN;
cr = FIELD_PREP(CR_FTHRES_MASK, 3) | CR_TCEN | CR_SSHIFT | CR_EN;
writel_relaxed(cr, qspi->io_base + QSPI_CR); writel_relaxed(cr, qspi->io_base + QSPI_CR);
/* set dcr fsize to max address */ /* set dcr fsize to max address */
......
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