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Commit 53760710 authored by Linus Torvalds's avatar Linus Torvalds
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Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm: (22 commits)
  [ARM] fix section-based ioremap
  [NET] am79c961a: fix spin_lock usage
  [ARM] omap: usb: thou shalt not provide empty release functions
  [ARM] omap: watchdog: allow OMAP watchdog driver on OMAP34xx platforms
  [ARM] 5369/1: omap mmc: Add new omap hsmmc controller for 2430 and 34xx, v3
  [ARM] clkdev: fix clock matching
  [ARM] 5370/1: at91: fix rm9200 watchdog
  [ARM] 5368/1: arch/arm/mach-davinci/usb.c buildfix
  [ARM] 5365/1: s3cmci: Use new include path of dma.h
  [ARM] fix StrongARM-11x0 page copy implementation
  [ARM] omap: ensure OMAP drivers pass a struct device to clk_get()
  ARM: OMAP: Fix compile for h3 MMC
  ARM: OMAP: Remove unused platform devices, v3
  ARM: OMAP: Fix ASoC by enabling writes to XCCR and RCCR McBSP registers, v3
  ARM: OMAP: Fix OSK ASoC by registering I2C board info for tlvaic23
  ARM: OMAP: remove duplicated #include's
  ARM: OMAP: Fix DMA CCR programming for request line > 63, v3
  ARM: OMAP: Fix gpio.c compile on 15xx with CONFIG_DEBUGFS
  ARM: OMAP: Fix compile for beagle
  ARM: OMAP: Fix gpio by switching to generic gpio calls, v2
  ...
parents cfb901bf 24f11ec0
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Showing with 1355 additions and 568 deletions
arch/arm/common/clkdev.c
View file @ 53760710
......@@ -24,6 +24,15 @@
static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
/*
* Find the correct struct clk for the device and connection ID.
* We do slightly fuzzy matching here:
* An entry with a NULL ID is assumed to be a wildcard.
* If an entry has a device ID, it must match
* If an entry has a connection ID, it must match
* Then we take the most specific entry - with the following
* order of precidence: dev+con > dev only > con only.
*/
static struct clk *clk_find(const char *dev_id, const char *con_id)
{
struct clk_lookup *p;
......@@ -31,13 +40,17 @@ static struct clk *clk_find(const char *dev_id, const char *con_id)
int match, best = 0;
list_for_each_entry(p, &clocks, node) {
if ((p->dev_id && !dev_id) || (p->con_id && !con_id))
continue;
match = 0;
if (p->dev_id)
match += 2 * (strcmp(p->dev_id, dev_id) == 0);
if (p->con_id)
match += 1 * (strcmp(p->con_id, con_id) == 0);
if (p->dev_id) {
if (!dev_id || strcmp(p->dev_id, dev_id))
continue;
match += 2;
}
if (p->con_id) {
if (!con_id || strcmp(p->con_id, con_id))
continue;
match += 1;
}
if (match == 0)
continue;
......
arch/arm/mach-davinci/usb.c
View file @ 53760710
......@@ -12,6 +12,7 @@
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
static struct musb_hdrc_eps_bits musb_eps[] = {
......
arch/arm/mach-omap1/board-h2.c
View file @ 53760710
......@@ -37,16 +37,14 @@
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <mach/gpio-switch.h>
#include <mach/mux.h>
#include <mach/dma.h>
#include <mach/tc.h>
#include <mach/nand.h>
#include <mach/irda.h>
#include <mach/usb.h>
#include <mach/keypad.h>
#include <mach/common.h>
#include <mach/mcbsp.h>
#include <mach/omap-alsa.h>
static int h2_keymap[] = {
KEY(0, 0, KEY_LEFT),
......@@ -292,41 +290,6 @@ static struct platform_device h2_lcd_device = {
.id = -1,
};
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
.srgr1 = FWID(15),
.srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
.pcr0 = CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP,
/*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */
};
static struct omap_alsa_codec_config alsa_config = {
.name = "H2 TSC2101",
.mcbsp_regs_alsa = &mcbsp_regs,
.codec_configure_dev = NULL, /* tsc2101_configure, */
.codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */
.codec_clock_setup = NULL, /* tsc2101_clock_setup, */
.codec_clock_on = NULL, /* tsc2101_clock_on, */
.codec_clock_off = NULL, /* tsc2101_clock_off, */
.get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
};
static struct platform_device h2_mcbsp1_device = {
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &alsa_config,
},
};
static struct platform_device *h2_devices[] __initdata = {
&h2_nor_device,
&h2_nand_device,
......@@ -334,7 +297,6 @@ static struct platform_device *h2_devices[] __initdata = {
&h2_irda_device,
&h2_kp_device,
&h2_lcd_device,
&h2_mcbsp1_device,
};
static void __init h2_init_smc91x(void)
......@@ -409,11 +371,6 @@ static struct omap_board_config_kernel h2_config[] __initdata = {
#define H2_NAND_RB_GPIO_PIN 62
static int h2_nand_dev_ready(struct omap_nand_platform_data *data)
{
return gpio_get_value(H2_NAND_RB_GPIO_PIN);
}
static void __init h2_init(void)
{
/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
......
arch/arm/mach-omap1/board-h3.c
View file @ 53760710
......@@ -49,8 +49,6 @@
#include <mach/keypad.h>
#include <mach/dma.h>
#include <mach/common.h>
#include <mach/mcbsp.h>
#include <mach/omap-alsa.h>
#define H3_TS_GPIO 48
......@@ -387,41 +385,6 @@ static struct spi_board_info h3_spi_board_info[] __initdata = {
},
};
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
.srgr1 = FWID(15),
.srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
.pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
/*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */
};
static struct omap_alsa_codec_config alsa_config = {
.name = "H3 TSC2101",
.mcbsp_regs_alsa = &mcbsp_regs,
.codec_configure_dev = NULL, /* tsc2101_configure, */
.codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */
.codec_clock_setup = NULL, /* tsc2101_clock_setup, */
.codec_clock_on = NULL, /* tsc2101_clock_on, */
.codec_clock_off = NULL, /* tsc2101_clock_off, */
.get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
};
static struct platform_device h3_mcbsp1_device = {
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &alsa_config,
},
};
static struct platform_device *devices[] __initdata = {
&nor_device,
&nand_device,
......@@ -430,7 +393,6 @@ static struct platform_device *devices[] __initdata = {
&h3_irda_device,
&h3_kp_device,
&h3_lcd_device,
&h3_mcbsp1_device,
};
static struct omap_usb_config h3_usb_config __initdata = {
......@@ -472,18 +434,6 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = {
},
};
static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
{
.name = "mmc_slot",
.gpio = OMAP_MPUIO(1),
.type = OMAP_GPIO_SWITCH_TYPE_COVER,
.debounce_rising = 100,
.debounce_falling = 0,
.notify = h3_mmc_slot_cover_handler,
.notify_data = NULL,
},
};
#define H3_NAND_RB_GPIO_PIN 10
static int nand_dev_ready(struct omap_nand_platform_data *data)
......
arch/arm/mach-omap1/board-innovator.c
View file @ 53760710
......@@ -37,8 +37,6 @@
#include <mach/usb.h>
#include <mach/keypad.h>
#include <mach/common.h>
#include <mach/mcbsp.h>
#include <mach/omap-alsa.h>
#include <mach/mmc.h>
static int innovator_keymap[] = {
......@@ -115,42 +113,6 @@ static struct platform_device innovator_flash_device = {
.resource = &innovator_flash_resource,
};
#define DEFAULT_BITPERSAMPLE 16
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0),
.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG,
.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
.srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1),
.srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1),
/*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */
.pcr0 = CLKXP | CLKRP, /* mcbsp: slave */
};
static struct omap_alsa_codec_config alsa_config = {
.name = "OMAP Innovator AIC23",
.mcbsp_regs_alsa = &mcbsp_regs,
.codec_configure_dev = NULL, /* aic23_configure, */
.codec_set_samplerate = NULL, /* aic23_set_samplerate, */
.codec_clock_setup = NULL, /* aic23_clock_setup, */
.codec_clock_on = NULL, /* aic23_clock_on, */
.codec_clock_off = NULL, /* aic23_clock_off, */
.get_default_samplerate = NULL, /* aic23_get_default_samplerate, */
};
static struct platform_device innovator_mcbsp1_device = {
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &alsa_config,
},
};
static struct resource innovator_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
......@@ -227,7 +189,6 @@ static struct platform_device innovator1510_spi_device = {
static struct platform_device *innovator1510_devices[] __initdata = {
&innovator_flash_device,
&innovator1510_smc91x_device,
&innovator_mcbsp1_device,
&innovator_kp_device,
&innovator1510_lcd_device,
&innovator1510_spi_device,
......
arch/arm/mach-omap1/board-nokia770.c
View file @ 53760710
......@@ -32,7 +32,6 @@
#include <mach/keypad.h>
#include <mach/common.h>
#include <mach/dsp_common.h>
#include <mach/aic23.h>
#include <mach/omapfb.h>
#include <mach/lcd_mipid.h>
#include <mach/mmc.h>
......@@ -261,6 +260,13 @@ static DEFINE_MUTEX(audio_pwr_lock);
*/
static int audio_pwr_state = -1;
static inline void aic23_power_up(void)
{
}
static inline void aic23_power_down(void)
{
}
/*
* audio_pwr_up / down should be called under audio_pwr_lock
*/
......
arch/arm/mach-omap1/board-osk.c
View file @ 53760710
......@@ -51,8 +51,6 @@
#include <mach/mux.h>
#include <mach/tc.h>
#include <mach/common.h>
#include <mach/mcbsp.h>
#include <mach/omap-alsa.h>
static struct mtd_partition osk_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
......@@ -141,47 +139,10 @@ static struct platform_device osk5912_cf_device = {
.resource = osk5912_cf_resources,
};
#define DEFAULT_BITPERSAMPLE 16
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0),
.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG,
.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
.srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1),
.srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1),
/*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */
.pcr0 = CLKXP | CLKRP, /* mcbsp: slave */
};
static struct omap_alsa_codec_config alsa_config = {
.name = "OSK AIC23",
.mcbsp_regs_alsa = &mcbsp_regs,
.codec_configure_dev = NULL, /* aic23_configure, */
.codec_set_samplerate = NULL, /* aic23_set_samplerate, */
.codec_clock_setup = NULL, /* aic23_clock_setup, */
.codec_clock_on = NULL, /* aic23_clock_on, */
.codec_clock_off = NULL, /* aic23_clock_off, */
.get_default_samplerate = NULL, /* aic23_get_default_samplerate, */
};
static struct platform_device osk5912_mcbsp1_device = {
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &alsa_config,
},
};
static struct platform_device *osk5912_devices[] __initdata = {
&osk5912_flash_device,
&osk5912_smc91x_device,
&osk5912_cf_device,
&osk5912_mcbsp1_device,
};
static struct gpio_led tps_leds[] = {
......@@ -259,8 +220,10 @@ static struct i2c_board_info __initdata osk_i2c_board_info[] = {
.platform_data = &tps_board,
},
{
I2C_BOARD_INFO("tlv320aic23", 0x1B),
},
/* TODO when driver support is ready:
* - aic23 audio chip at 0x1a
* - optionally on Mistral, ov9640 camera sensor at 0x30
*/
};
......
arch/arm/mach-omap1/board-palmte.c
View file @ 53760710
......@@ -42,8 +42,6 @@
#include <mach/irda.h>
#include <mach/keypad.h>
#include <mach/common.h>
#include <mach/mcbsp.h>
#include <mach/omap-alsa.h>
static void __init omap_palmte_init_irq(void)
{
......@@ -195,15 +193,6 @@ static struct omap_usb_config palmte_usb_config __initdata = {
.pins[0] = 2,
};
static struct omap_mmc_config palmte_mmc_config __initdata = {
.mmc[0] = {
.enabled = 1,
.wp_pin = PALMTE_MMC_WP_GPIO,
.power_pin = PALMTE_MMC_POWER_GPIO,
.switch_pin = PALMTE_MMC_SWITCH_GPIO,
},
};
static struct omap_lcd_config palmte_lcd_config __initdata = {
.ctrl_name = "internal",
};
......@@ -212,24 +201,6 @@ static struct omap_uart_config palmte_uart_config __initdata = {
.enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
};
static struct omap_mcbsp_reg_cfg palmte_mcbsp1_regs = {
.spcr2 = FRST | GRST | XRST | XINTM(3),
.xcr2 = XDATDLY(1) | XFIG,
.xcr1 = XWDLEN1(OMAP_MCBSP_WORD_32),
.pcr0 = SCLKME | FSXP | CLKXP,
};
static struct omap_alsa_codec_config palmte_alsa_config = {
.name = "TSC2102 audio",
.mcbsp_regs_alsa = &palmte_mcbsp1_regs,
.codec_configure_dev = NULL, /* tsc2102_configure, */
.codec_set_samplerate = NULL, /* tsc2102_set_samplerate, */
.codec_clock_setup = NULL, /* tsc2102_clock_setup, */
.codec_clock_on = NULL, /* tsc2102_clock_on, */
.codec_clock_off = NULL, /* tsc2102_clock_off, */
.get_default_samplerate = NULL, /* tsc2102_get_default_samplerate, */
};
#ifdef CONFIG_APM
/*
* Values measured in 10 minute intervals averaged over 10 samples.
......
arch/arm/mach-omap1/board-palmtt.c
View file @ 53760710
......@@ -30,7 +30,6 @@
#include <asm/mach/flash.h>
#include <mach/led.h>
#include <mach/mcbsp.h>
#include <mach/gpio.h>
#include <mach/mux.h>
#include <mach/usb.h>
......@@ -40,7 +39,6 @@
#include <mach/irda.h>
#include <mach/keypad.h>
#include <mach/common.h>
#include <mach/omap-alsa.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
......@@ -122,44 +120,6 @@ static struct platform_device palmtt_flash_device = {
.resource = &palmtt_flash_resource,
};
#define DEFAULT_BITPERSAMPLE 16
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0),
.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) |
RWDLEN1(OMAP_MCBSP_WORD_16),
.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG,
.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) |
XWDLEN1(OMAP_MCBSP_WORD_16),
.srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1),
.srgr2 = GSYNC | CLKSP | FSGM |
FPER(DEFAULT_BITPERSAMPLE * 2 - 1),
.pcr0 = CLKXP | CLKRP, /* mcbsp: slave */
};
static struct omap_alsa_codec_config alsa_config = {
.name = "PalmTT AIC23",
.mcbsp_regs_alsa = &mcbsp_regs,
.codec_configure_dev = NULL, /* aic23_configure, */
.codec_set_samplerate = NULL, /* aic23_set_samplerate, */
.codec_clock_setup = NULL, /* aic23_clock_setup, */
.codec_clock_on = NULL, /* aic23_clock_on, */
.codec_clock_off = NULL, /* aic23_clock_off, */
.get_default_samplerate = NULL, /* aic23_get_default_samplerate, */
};
static struct platform_device palmtt_mcbsp1_device = {
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &alsa_config,
},
};
static struct resource palmtt_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
......@@ -257,7 +217,6 @@ static struct platform_device palmtt_led_device = {
static struct platform_device *palmtt_devices[] __initdata = {
&palmtt_flash_device,
&palmtt_mcbsp1_device,
&palmtt_kp_device,
&palmtt_lcd_device,
&palmtt_irda_device,
......
arch/arm/mach-omap1/board-palmz71.c
View file @ 53760710
......@@ -32,7 +32,6 @@
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <mach/mcbsp.h>
#include <mach/gpio.h>
#include <mach/mux.h>
#include <mach/usb.h>
......@@ -179,41 +178,6 @@ static struct platform_device palmz71_spi_device = {
.id = -1,
};
#define DEFAULT_BITPERSAMPLE 16
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0),
.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG,
.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
.srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1),
.srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1),
.pcr0 = CLKXP | CLKRP, /* mcbsp: slave */
};
static struct omap_alsa_codec_config alsa_config = {
.name = "PalmZ71 AIC23",
.mcbsp_regs_alsa = &mcbsp_regs,
.codec_configure_dev = NULL, /* aic23_configure */
.codec_set_samplerate = NULL, /* aic23_set_samplerate */
.codec_clock_setup = NULL, /* aic23_clock_setup */
.codec_clock_on = NULL, /* aic23_clock_on */
.codec_clock_off = NULL, /* aic23_clock_off */
.get_default_samplerate = NULL, /* aic23_get_default_samplerate */
};
static struct platform_device palmz71_mcbsp1_device = {
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &alsa_config,
},
};
static struct omap_backlight_config palmz71_backlight_config = {
.default_intensity = 0xa0,
};
......@@ -229,7 +193,6 @@ static struct platform_device palmz71_backlight_device = {
static struct platform_device *devices[] __initdata = {
&palmz71_rom_device,
&palmz71_kp_device,
&palmz71_mcbsp1_device,
&palmz71_lcd_device,
&palmz71_irda_device,
&palmz71_spi_device,
......
arch/arm/mach-omap1/board-sx1.c
View file @ 53760710
......@@ -34,13 +34,12 @@
#include <mach/gpio.h>
#include <mach/mux.h>
#include <mach/dma.h>
#include <mach/irda.h>
#include <mach/usb.h>
#include <mach/tc.h>
#include <mach/board.h>
#include <mach/common.h>
#include <mach/mcbsp.h>
#include <mach/omap-alsa.h>
#include <mach/keypad.h>
/* Write to I2C device */
......@@ -254,35 +253,6 @@ static struct platform_device sx1_irda_device = {
.resource = sx1_irda_resources,
};
/*----------- McBSP & Sound -------------------------*/
/* Playback interface - McBSP1 */
static struct omap_mcbsp_reg_cfg mcbsp1_regs = {
.spcr2 = XINTM(3), /* SPCR2=30 */
.spcr1 = RINTM(3), /* SPCR1=30 */
.rcr2 = 0, /* RCR2 =00 */
.rcr1 = RFRLEN1(1) | RWDLEN1(OMAP_MCBSP_WORD_16), /* RCR1=140 */
.xcr2 = 0, /* XCR2 = 0 */
.xcr1 = XFRLEN1(1) | XWDLEN1(OMAP_MCBSP_WORD_16), /* XCR1 = 140 */
.srgr1 = FWID(15) | CLKGDV(12), /* SRGR1=0f0c */
.srgr2 = FSGM | FPER(31), /* SRGR2=101f */
.pcr0 = FSXM | FSRM | CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP,
/* PCR0 =0f0f */
};
static struct omap_alsa_codec_config sx1_alsa_config = {
.name = "SX1 EGold",
.mcbsp_regs_alsa = &mcbsp1_regs,
};
static struct platform_device sx1_mcbsp1_device = {
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &sx1_alsa_config,
},
};
/*----------- MTD -------------------------*/
static struct mtd_partition sx1_partitions[] = {
......@@ -394,7 +364,6 @@ static struct platform_device *sx1_devices[] __initdata = {
&sx1_flash_device,
&sx1_kp_device,
&sx1_lcd_device,
&sx1_mcbsp1_device,
&sx1_irda_device,
};
/*-----------------------------------------*/
......@@ -423,9 +392,9 @@ static void __init omap_sx1_init(void)
/* turn on USB power */
/* sx1_setusbpower(1); cant do it here because i2c is not ready */
omap_request_gpio(1); /* A_IRDA_OFF */
omap_request_gpio(11); /* A_SWITCH */
omap_request_gpio(15); /* A_USB_ON */
gpio_request(1, "A_IRDA_OFF");
gpio_request(11, "A_SWITCH");
gpio_request(15, "A_USB_ON");
gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */
gpio_direction_output(11, 0); /*A_SWITCH = 0 */
gpio_direction_output(15, 0); /*A_USB_ON = 0 */
......
arch/arm/mach-omap1/board-voiceblue.c
View file @ 53760710
......@@ -22,7 +22,6 @@
#include <linux/reboot.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/irq.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
......
arch/arm/mach-omap1/mcbsp.c
View file @ 53760710
......@@ -17,6 +17,7 @@
#include <linux/io.h>
#include <linux/platform_device.h>
#include <mach/irqs.h>
#include <mach/dma.h>
#include <mach/irqs.h>
#include <mach/mux.h>
......
arch/arm/mach-omap2/board-apollon.c
View file @ 53760710
......@@ -22,8 +22,6 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/onenand.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/leds.h>
#include <linux/err.h>
......@@ -282,65 +280,16 @@ static void __init apollon_led_init(void)
{
/* LED0 - AA10 */
omap_cfg_reg(AA10_242X_GPIO13);
omap_request_gpio(LED0_GPIO13);
omap_set_gpio_direction(LED0_GPIO13, 0);
omap_set_gpio_dataout(LED0_GPIO13, 0);
gpio_request(LED0_GPIO13, "LED0");
gpio_direction_output(LED0_GPIO13, 0);
/* LED1 - AA6 */
omap_cfg_reg(AA6_242X_GPIO14);
omap_request_gpio(LED1_GPIO14);
omap_set_gpio_direction(LED1_GPIO14, 0);
omap_set_gpio_dataout(LED1_GPIO14, 0);
gpio_request(LED1_GPIO14, "LED1");
gpio_direction_output(LED1_GPIO14, 0);
/* LED2 - AA4 */
omap_cfg_reg(AA4_242X_GPIO15);
omap_request_gpio(LED2_GPIO15);
omap_set_gpio_direction(LED2_GPIO15, 0);
omap_set_gpio_dataout(LED2_GPIO15, 0);
}
static irqreturn_t apollon_sw_interrupt(int irq, void *ignored)
{
static unsigned int led0, led1, led2;
if (irq == OMAP_GPIO_IRQ(SW_ENTER_GPIO16))
omap_set_gpio_dataout(LED0_GPIO13, led0 ^= 1);
else if (irq == OMAP_GPIO_IRQ(SW_UP_GPIO17))
omap_set_gpio_dataout(LED1_GPIO14, led1 ^= 1);
else if (irq == OMAP_GPIO_IRQ(SW_DOWN_GPIO58))
omap_set_gpio_dataout(LED2_GPIO15, led2 ^= 1);
return IRQ_HANDLED;
}
static void __init apollon_sw_init(void)
{
/* Enter SW - Y11 */
omap_cfg_reg(Y11_242X_GPIO16);
omap_request_gpio(SW_ENTER_GPIO16);
gpio_direction_input(SW_ENTER_GPIO16);
/* Up SW - AA12 */
omap_cfg_reg(AA12_242X_GPIO17);
omap_request_gpio(SW_UP_GPIO17);
gpio_direction_input(SW_UP_GPIO17);
/* Down SW - AA8 */
omap_cfg_reg(AA8_242X_GPIO58);
omap_request_gpio(SW_DOWN_GPIO58);
gpio_direction_input(SW_DOWN_GPIO58);
set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING);
if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt,
IRQF_SHARED, "enter sw",
&apollon_sw_interrupt))
return;
set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQ_TYPE_EDGE_RISING);
if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt,
IRQF_SHARED, "up sw",
&apollon_sw_interrupt))
return;
set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQ_TYPE_EDGE_RISING);
if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt,
IRQF_SHARED, "down sw",
&apollon_sw_interrupt))
return;
gpio_request(LED2_GPIO15, "LED2");
gpio_direction_output(LED2_GPIO15, 0);
}
static void __init apollon_usb_init(void)
......@@ -357,7 +306,6 @@ static void __init omap_apollon_init(void)
u32 v;
apollon_led_init();
apollon_sw_init();
apollon_flash_init();
apollon_usb_init();
......
arch/arm/mach-omap2/board-ldp.c
View file @ 53760710
......@@ -88,7 +88,7 @@ static inline void __init ldp_init_smc911x(void)
ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio);
if (omap_request_gpio(eth_gpio) < 0) {
if (gpio_request(eth_gpio, "smc911x irq") < 0) {
printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n",
eth_gpio);
return;
......
arch/arm/mach-omap2/board-omap3beagle.c
View file @ 53760710
......@@ -28,6 +28,8 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/i2c/twl4030.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
......@@ -120,6 +122,9 @@ static int beagle_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
omap_cfg_reg(AH8_34XX_GPIO29);
mmc[0].gpio_cd = gpio + 0;
twl4030_mmc_init(mmc);
/* REVISIT: need ehci-omap hooks for external VBUS
* power switch and overcurrent detect
......@@ -304,10 +309,6 @@ static void __init omap3_beagle_init(void)
omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
omap_serial_init();
omap_cfg_reg(AH8_34XX_GPIO29);
mmc[0].gpio_cd = gpio + 0;
twl4030_mmc_init(mmc);
omap_cfg_reg(J25_34XX_GPIO170);
gpio_request(170, "DVI_nPD");
/* REVISIT leave DVI powered down until it's needed ... */
......
arch/arm/mach-omap2/mcbsp.c
View file @ 53760710
......@@ -17,6 +17,7 @@
#include <linux/io.h>
#include <linux/platform_device.h>
#include <mach/irqs.h>
#include <mach/dma.h>
#include <mach/irqs.h>
#include <mach/mux.h>
......
arch/arm/mm/copypage-v4mc.c
View file @ 53760710
......@@ -68,7 +68,7 @@ mc_copy_user_page(void *from, void *to)
: "r" (from), "r" (to), "I" (PAGE_SIZE / 64));
}
void v4_mc_copy_user_highpage(struct page *from, struct page *to,
void v4_mc_copy_user_highpage(struct page *to, struct page *from,
unsigned long vaddr)
{
void *kto = kmap_atomic(to, KM_USER1);
......
arch/arm/mm/ioremap.c
View file @ 53760710
......@@ -138,7 +138,7 @@ void __check_kvm_seq(struct mm_struct *mm)
*/
static void unmap_area_sections(unsigned long virt, unsigned long size)
{
unsigned long addr = virt, end = virt + (size & ~SZ_1M);
unsigned long addr = virt, end = virt + (size & ~(SZ_1M - 1));
pgd_t *pgd;
flush_cache_vunmap(addr, end);
......@@ -337,10 +337,7 @@ void __iounmap(volatile void __iomem *io_addr)
void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
#ifndef CONFIG_SMP
struct vm_struct **p, *tmp;
#endif
unsigned int section_mapping = 0;
#ifndef CONFIG_SMP
/*
* If this is a section based mapping we need to handle it
* specially as the VM subsystem does not know how to handle
......@@ -352,11 +349,8 @@ void __iounmap(volatile void __iomem *io_addr)
for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) {
if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) {
if (tmp->flags & VM_ARM_SECTION_MAPPING) {
*p = tmp->next;
unmap_area_sections((unsigned long)tmp->addr,
tmp->size);
kfree(tmp);
section_mapping = 1;
}
break;
}
......@@ -364,7 +358,6 @@ void __iounmap(volatile void __iomem *io_addr)
write_unlock(&vmlist_lock);
#endif
if (!section_mapping)
vunmap(addr);
vunmap(addr);
}
EXPORT_SYMBOL(__iounmap);
arch/arm/plat-omap/dma.c
View file @ 53760710
......@@ -278,14 +278,11 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
u32 val;
val = dma_read(CCR(lch));
val &= ~(3 << 19);
if (dma_trigger > 63)
val |= 1 << 20;
if (dma_trigger > 31)
val |= 1 << 19;
val &= ~(0x1f);
val |= (dma_trigger & 0x1f);
/* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
val &= ~((3 << 19) | 0x1f);
val |= (dma_trigger & ~0x1f) << 14;
val |= dma_trigger & 0x1f;
if (sync_mode & OMAP_DMA_SYNC_FRAME)
val |= 1 << 5;
......
arch/arm/plat-omap/gpio.c
View file @ 53760710
......@@ -1789,6 +1789,8 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
/* FIXME for at least omap2, show pullup/pulldown state */
irqstat = irq_desc[irq].status;
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
defined(CONFIG_ARCH_OMAP34XX)
if (is_in && ((bank->suspend_wakeup & mask)
|| irqstat & IRQ_TYPE_SENSE_MASK)) {
char *trigger = NULL;
......@@ -1818,6 +1820,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
(bank->suspend_wakeup & mask)
? " wakeup" : "");
}
#endif
seq_printf(s, "\n");
}
......
arch/arm/plat-omap/include/mach/aic23.h deleted 100644 → 0
View file @ cfb901bf
/*
* arch/arm/plat-omap/include/mach/aic23.h
*
* Hardware definitions for TI TLV320AIC23 audio codec
*
* Copyright (C) 2002 RidgeRun, Inc.
* Author: Steve Johnson
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_AIC23_H
#define __ASM_ARCH_AIC23_H
// Codec TLV320AIC23
#define LEFT_LINE_VOLUME_ADDR 0x00
#define RIGHT_LINE_VOLUME_ADDR 0x01
#define LEFT_CHANNEL_VOLUME_ADDR 0x02
#define RIGHT_CHANNEL_VOLUME_ADDR 0x03
#define ANALOG_AUDIO_CONTROL_ADDR 0x04
#define DIGITAL_AUDIO_CONTROL_ADDR 0x05
#define POWER_DOWN_CONTROL_ADDR 0x06
#define DIGITAL_AUDIO_FORMAT_ADDR 0x07
#define SAMPLE_RATE_CONTROL_ADDR 0x08
#define DIGITAL_INTERFACE_ACT_ADDR 0x09
#define RESET_CONTROL_ADDR 0x0F
// Left (right) line input volume control register
#define LRS_ENABLED 0x0100
#define LIM_MUTED 0x0080
#define LIV_DEFAULT 0x0017
#define LIV_MAX 0x001f
#define LIV_MIN 0x0000
// Left (right) channel headphone volume control register
#define LZC_ON 0x0080
#define LHV_DEFAULT 0x0079
#define LHV_MAX 0x007f
#define LHV_MIN 0x0000
// Analog audio path control register
#define STA_REG(x) ((x)<<6)
#define STE_ENABLED 0x0020
#define DAC_SELECTED 0x0010
#define BYPASS_ON 0x0008
#define INSEL_MIC 0x0004
#define MICM_MUTED 0x0002
#define MICB_20DB 0x0001
// Digital audio path control register
#define DACM_MUTE 0x0008
#define DEEMP_32K 0x0002
#define DEEMP_44K 0x0004
#define DEEMP_48K 0x0006
#define ADCHP_ON 0x0001
// Power control down register
#define DEVICE_POWER_OFF 0x0080
#define CLK_OFF 0x0040
#define OSC_OFF 0x0020
#define OUT_OFF 0x0010
#define DAC_OFF 0x0008
#define ADC_OFF 0x0004
#define MIC_OFF 0x0002
#define LINE_OFF 0x0001
// Digital audio interface register
#define MS_MASTER 0x0040
#define LRSWAP_ON 0x0020
#define LRP_ON 0x0010
#define IWL_16 0x0000
#define IWL_20 0x0004
#define IWL_24 0x0008
#define IWL_32 0x000C
#define FOR_I2S 0x0002
#define FOR_DSP 0x0003
// Sample rate control register
#define CLKOUT_HALF 0x0080
#define CLKIN_HALF 0x0040
#define BOSR_384fs 0x0002 // BOSR_272fs when in USB mode
#define USB_CLK_ON 0x0001
#define SR_MASK 0xf
#define CLKOUT_SHIFT 7
#define CLKIN_SHIFT 6
#define SR_SHIFT 2
#define BOSR_SHIFT 1
// Digital interface register
#define ACT_ON 0x0001
#define TLV320AIC23ID1 (0x1a) // cs low
#define TLV320AIC23ID2 (0x1b) // cs high
void aic23_power_up(void);
void aic23_power_down(void);
#endif /* __ASM_ARCH_AIC23_H */
arch/arm/plat-omap/include/mach/board-h3.h
View file @ 53760710
......@@ -30,7 +30,9 @@
/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
#define OMAP1710_ETHR_START 0x04000300
#define H3_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
# define H3_TPS_GPIO_MMC_PWR_EN (H3_TPS_GPIO_BASE + 4)
extern void h3_mmc_init(void);
extern void h3_mmc_slot_cover_handler(void *arg, int state);
#endif /* __ASM_ARCH_OMAP_H3_H */
arch/arm/plat-omap/include/mach/gpio.h
View file @ 53760710
......@@ -87,16 +87,6 @@ extern void omap_set_gpio_debounce_time(int gpio, int enable);
#include <linux/errno.h>
#include <asm-generic/gpio.h>
static inline int omap_request_gpio(int gpio)
{
return gpio_request(gpio, "FIXME");
}
static inline void omap_free_gpio(int gpio)
{
gpio_free(gpio);
}
static inline int gpio_get_value(unsigned gpio)
{
return __gpio_get_value(gpio);
......
arch/arm/plat-omap/include/mach/mcbsp.h
View file @ 53760710
......@@ -87,6 +87,10 @@
#define OMAP_MCBSP_REG_XCERG 0x3A
#define OMAP_MCBSP_REG_XCERH 0x3C
/* Dummy defines, these are not available on omap1 */
#define OMAP_MCBSP_REG_XCCR 0x00
#define OMAP_MCBSP_REG_RCCR 0x00
#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1)
#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
......@@ -231,11 +235,16 @@
#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */
/*********************** McBSP XCCR bit definitions *************************/
#define EXTCLKGATE 0x8000
#define PPCONNECT 0x4000
#define DXENDLY(value) ((value)<<12) /* Bits 12:13 */
#define XFULL_CYCLE 0x0800
#define DILB 0x0020
#define XDMAEN 0x0008
#define XDISABLE 0x0001
/********************** McBSP RCCR bit definitions *************************/
#define RFULL_CYCLE 0x0800
#define RDMAEN 0x0008
#define RDISABLE 0x0001
......@@ -267,6 +276,8 @@ struct omap_mcbsp_reg_cfg {
u16 rcerh;
u16 xcerg;
u16 xcerh;
u16 xccr;
u16 rccr;
};
typedef enum {
......
arch/arm/plat-omap/mcbsp.c
View file @ 53760710
......@@ -173,6 +173,10 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
if (cpu_is_omap2430() || cpu_is_omap34xx()) {
OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr);
OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr);
}
}
EXPORT_SYMBOL(omap_mcbsp_config);
......
arch/arm/plat-omap/usb.c
View file @ 53760710
......@@ -431,15 +431,6 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_USB_GADGET_OMAP) || \
defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) || \
(defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG))
static void usb_release(struct device *dev)
{
/* normally not freed */
}
#endif
#ifdef CONFIG_USB_GADGET_OMAP
static struct resource udc_resources[] = {
......@@ -466,7 +457,6 @@ static struct platform_device udc_device = {
.name = "omap_udc",
.id = -1,
.dev = {
.release = usb_release,
.dma_mask = &udc_dmamask,
.coherent_dma_mask = 0xffffffff,
},
......@@ -497,7 +487,6 @@ static struct platform_device ohci_device = {
.name = "ohci",
.id = -1,
.dev = {
.release = usb_release,
.dma_mask = &ohci_dmamask,
.coherent_dma_mask = 0xffffffff,
},
......@@ -524,9 +513,6 @@ static struct resource otg_resources[] = {
static struct platform_device otg_device = {
.name = "omap_otg",
.id = -1,
.dev = {
.release = usb_release,
},
.num_resources = ARRAY_SIZE(otg_resources),
.resource = otg_resources,
};
......
drivers/char/hw_random/omap-rng.c
View file @ 53760710
......@@ -102,7 +102,7 @@ static int __init omap_rng_probe(struct platform_device *pdev)
return -EBUSY;
if (cpu_is_omap24xx()) {
rng_ick = clk_get(NULL, "rng_ick");
rng_ick = clk_get(&pdev->dev, "rng_ick");
if (IS_ERR(rng_ick)) {
dev_err(&pdev->dev, "Could not get rng_ick\n");
ret = PTR_ERR(rng_ick);
......
drivers/mmc/host/Kconfig
View file @ 53760710
......@@ -76,6 +76,16 @@ config MMC_OMAP
If unsure, say N.
config MMC_OMAP_HS
tristate "TI OMAP High Speed Multimedia Card Interface support"
depends on ARCH_OMAP2430 || ARCH_OMAP3
help
This selects the TI OMAP High Speed Multimedia card Interface.
If you have an OMAP2430 or OMAP3 board with a Multimedia Card slot,
say Y or M here.
If unsure, say N.
config MMC_WBSD
tristate "Winbond W83L51xD SD/MMC Card Interface support"
depends on ISA_DMA_API
......
drivers/mmc/host/Makefile
View file @ 53760710
......@@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o
obj-$(CONFIG_MMC_WBSD) += wbsd.o
obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
obj-$(CONFIG_MMC_OMAP) += omap.o
obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o
obj-$(CONFIG_MMC_AT91) += at91_mci.o
obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
......
drivers/mmc/host/omap_hsmmc.c 0 → 100644
View file @ 53760710
/*
* drivers/mmc/host/omap_hsmmc.c
*
* Driver for OMAP2430/3430 MMC controller.
*
* Copyright (C) 2007 Texas Instruments.
*
* Authors:
* Syed Mohammed Khasim <x0khasim@ti.com>
* Madhusudhan <madhu.cr@ti.com>
* Mohit Jalori <mjalori@ti.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/workqueue.h>
#include <linux/timer.h>
#include <linux/clk.h>
#include <linux/mmc/host.h>
#include <linux/io.h>
#include <linux/semaphore.h>
#include <mach/dma.h>
#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/mmc.h>
#include <mach/cpu.h>
/* OMAP HSMMC Host Controller Registers */
#define OMAP_HSMMC_SYSCONFIG 0x0010
#define OMAP_HSMMC_CON 0x002C
#define OMAP_HSMMC_BLK 0x0104
#define OMAP_HSMMC_ARG 0x0108
#define OMAP_HSMMC_CMD 0x010C
#define OMAP_HSMMC_RSP10 0x0110
#define OMAP_HSMMC_RSP32 0x0114
#define OMAP_HSMMC_RSP54 0x0118
#define OMAP_HSMMC_RSP76 0x011C
#define OMAP_HSMMC_DATA 0x0120
#define OMAP_HSMMC_HCTL 0x0128
#define OMAP_HSMMC_SYSCTL 0x012C
#define OMAP_HSMMC_STAT 0x0130
#define OMAP_HSMMC_IE 0x0134
#define OMAP_HSMMC_ISE 0x0138
#define OMAP_HSMMC_CAPA 0x0140
#define VS18 (1 << 26)
#define VS30 (1 << 25)
#define SDVS18 (0x5 << 9)
#define SDVS30 (0x6 << 9)
#define SDVSCLR 0xFFFFF1FF
#define SDVSDET 0x00000400
#define AUTOIDLE 0x1
#define SDBP (1 << 8)
#define DTO 0xe
#define ICE 0x1
#define ICS 0x2
#define CEN (1 << 2)
#define CLKD_MASK 0x0000FFC0
#define CLKD_SHIFT 6
#define DTO_MASK 0x000F0000
#define DTO_SHIFT 16
#define INT_EN_MASK 0x307F0033
#define INIT_STREAM (1 << 1)
#define DP_SELECT (1 << 21)
#define DDIR (1 << 4)
#define DMA_EN 0x1
#define MSBS (1 << 5)
#define BCE (1 << 1)
#define FOUR_BIT (1 << 1)
#define CC 0x1
#define TC 0x02
#define OD 0x1
#define ERR (1 << 15)
#define CMD_TIMEOUT (1 << 16)
#define DATA_TIMEOUT (1 << 20)
#define CMD_CRC (1 << 17)
#define DATA_CRC (1 << 21)
#define CARD_ERR (1 << 28)
#define STAT_CLEAR 0xFFFFFFFF
#define INIT_STREAM_CMD 0x00000000
#define DUAL_VOLT_OCR_BIT 7
#define SRC (1 << 25)
#define SRD (1 << 26)
/*
* FIXME: Most likely all the data using these _DEVID defines should come
* from the platform_data, or implemented in controller and slot specific
* functions.
*/
#define OMAP_MMC1_DEVID 0
#define OMAP_MMC2_DEVID 1
#define OMAP_MMC_DATADIR_NONE 0
#define OMAP_MMC_DATADIR_READ 1
#define OMAP_MMC_DATADIR_WRITE 2
#define MMC_TIMEOUT_MS 20
#define OMAP_MMC_MASTER_CLOCK 96000000
#define DRIVER_NAME "mmci-omap-hs"
/*
* One controller can have multiple slots, like on some omap boards using
* omap.c controller driver. Luckily this is not currently done on any known
* omap_hsmmc.c device.
*/
#define mmc_slot(host) (host->pdata->slots[host->slot_id])
/*
* MMC Host controller read/write API's
*/
#define OMAP_HSMMC_READ(base, reg) \
__raw_readl((base) + OMAP_HSMMC_##reg)
#define OMAP_HSMMC_WRITE(base, reg, val) \
__raw_writel((val), (base) + OMAP_HSMMC_##reg)
struct mmc_omap_host {
struct device *dev;
struct mmc_host *mmc;
struct mmc_request *mrq;
struct mmc_command *cmd;
struct mmc_data *data;
struct clk *fclk;
struct clk *iclk;
struct clk *dbclk;
struct semaphore sem;
struct work_struct mmc_carddetect_work;
void __iomem *base;
resource_size_t mapbase;
unsigned int id;
unsigned int dma_len;
unsigned int dma_dir;
unsigned char bus_mode;
unsigned char datadir;
u32 *buffer;
u32 bytesleft;
int suspended;
int irq;
int carddetect;
int use_dma, dma_ch;
int initstr;
int slot_id;
int dbclk_enabled;
struct omap_mmc_platform_data *pdata;
};
/*
* Stop clock to the card
*/
static void omap_mmc_stop_clock(struct mmc_omap_host *host)
{
OMAP_HSMMC_WRITE(host->base, SYSCTL,
OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN);
if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0)
dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n");
}
/*
* Send init stream sequence to card
* before sending IDLE command
*/
static void send_init_stream(struct mmc_omap_host *host)
{
int reg = 0;
unsigned long timeout;
disable_irq(host->irq);
OMAP_HSMMC_WRITE(host->base, CON,
OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM);
OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD);
timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
while ((reg != CC) && time_before(jiffies, timeout))
reg = OMAP_HSMMC_READ(host->base, STAT) & CC;
OMAP_HSMMC_WRITE(host->base, CON,
OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM);
enable_irq(host->irq);
}
static inline
int mmc_omap_cover_is_closed(struct mmc_omap_host *host)
{
int r = 1;
if (host->pdata->slots[host->slot_id].get_cover_state)
r = host->pdata->slots[host->slot_id].get_cover_state(host->dev,
host->slot_id);
return r;
}
static ssize_t
mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
struct mmc_omap_host *host = mmc_priv(mmc);
return sprintf(buf, "%s\n", mmc_omap_cover_is_closed(host) ? "closed" :
"open");
}
static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL);
static ssize_t
mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
struct mmc_omap_host *host = mmc_priv(mmc);
struct omap_mmc_slot_data slot = host->pdata->slots[host->slot_id];
return sprintf(buf, "slot:%s\n", slot.name);
}
static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL);
/*
* Configure the response type and send the cmd.
*/
static void
mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd,
struct mmc_data *data)
{
int cmdreg = 0, resptype = 0, cmdtype = 0;
dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n",
mmc_hostname(host->mmc), cmd->opcode, cmd->arg);
host->cmd = cmd;
/*
* Clear status bits and enable interrupts
*/
OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
if (cmd->flags & MMC_RSP_PRESENT) {
if (cmd->flags & MMC_RSP_136)
resptype = 1;
else
resptype = 2;
}
/*
* Unlike OMAP1 controller, the cmdtype does not seem to be based on
* ac, bc, adtc, bcr. Only commands ending an open ended transfer need
* a val of 0x3, rest 0x0.
*/
if (cmd == host->mrq->stop)
cmdtype = 0x3;
cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22);
if (data) {
cmdreg |= DP_SELECT | MSBS | BCE;
if (data->flags & MMC_DATA_READ)
cmdreg |= DDIR;
else
cmdreg &= ~(DDIR);
}
if (host->use_dma)
cmdreg |= DMA_EN;
OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg);
OMAP_HSMMC_WRITE(host->base, CMD, cmdreg);
}
/*
* Notify the transfer complete to MMC core
*/
static void
mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
{
host->data = NULL;
if (host->use_dma && host->dma_ch != -1)
dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
host->dma_dir);
host->datadir = OMAP_MMC_DATADIR_NONE;
if (!data->error)
data->bytes_xfered += data->blocks * (data->blksz);
else
data->bytes_xfered = 0;
if (!data->stop) {
host->mrq = NULL;
mmc_request_done(host->mmc, data->mrq);
return;
}
mmc_omap_start_command(host, data->stop, NULL);
}
/*
* Notify the core about command completion
*/
static void
mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
{
host->cmd = NULL;
if (cmd->flags & MMC_RSP_PRESENT) {
if (cmd->flags & MMC_RSP_136) {
/* response type 2 */
cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10);
cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32);
cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54);
cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76);
} else {
/* response types 1, 1b, 3, 4, 5, 6 */
cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10);
}
}
if (host->data == NULL || cmd->error) {
host->mrq = NULL;
mmc_request_done(host->mmc, cmd->mrq);
}
}
/*
* DMA clean up for command errors
*/
static void mmc_dma_cleanup(struct mmc_omap_host *host)
{
host->data->error = -ETIMEDOUT;
if (host->use_dma && host->dma_ch != -1) {
dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len,
host->dma_dir);
omap_free_dma(host->dma_ch);
host->dma_ch = -1;
up(&host->sem);
}
host->data = NULL;
host->datadir = OMAP_MMC_DATADIR_NONE;
}
/*
* Readable error output
*/
#ifdef CONFIG_MMC_DEBUG
static void mmc_omap_report_irq(struct mmc_omap_host *host, u32 status)
{
/* --- means reserved bit without definition at documentation */
static const char *mmc_omap_status_bits[] = {
"CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ",
"OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC",
"CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---",
"---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---"
};
char res[256];
char *buf = res;
int len, i;
len = sprintf(buf, "MMC IRQ 0x%x :", status);
buf += len;
for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++)
if (status & (1 << i)) {
len = sprintf(buf, " %s", mmc_omap_status_bits[i]);
buf += len;
}
dev_dbg(mmc_dev(host->mmc), "%s\n", res);
}
#endif /* CONFIG_MMC_DEBUG */
/*
* MMC controller IRQ handler
*/
static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
{
struct mmc_omap_host *host = dev_id;
struct mmc_data *data;
int end_cmd = 0, end_trans = 0, status;
if (host->cmd == NULL && host->data == NULL) {
OMAP_HSMMC_WRITE(host->base, STAT,
OMAP_HSMMC_READ(host->base, STAT));
return IRQ_HANDLED;
}
data = host->data;
status = OMAP_HSMMC_READ(host->base, STAT);
dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status);
if (status & ERR) {
#ifdef CONFIG_MMC_DEBUG
mmc_omap_report_irq(host, status);
#endif
if ((status & CMD_TIMEOUT) ||
(status & CMD_CRC)) {
if (host->cmd) {
if (status & CMD_TIMEOUT) {
OMAP_HSMMC_WRITE(host->base, SYSCTL,
OMAP_HSMMC_READ(host->base,
SYSCTL) | SRC);
while (OMAP_HSMMC_READ(host->base,
SYSCTL) & SRC)
;
host->cmd->error = -ETIMEDOUT;
} else {
host->cmd->error = -EILSEQ;
}
end_cmd = 1;
}
if (host->data)
mmc_dma_cleanup(host);
}
if ((status & DATA_TIMEOUT) ||
(status & DATA_CRC)) {
if (host->data) {
if (status & DATA_TIMEOUT)
mmc_dma_cleanup(host);
else
host->data->error = -EILSEQ;
OMAP_HSMMC_WRITE(host->base, SYSCTL,
OMAP_HSMMC_READ(host->base,
SYSCTL) | SRD);
while (OMAP_HSMMC_READ(host->base,
SYSCTL) & SRD)
;
end_trans = 1;
}
}
if (status & CARD_ERR) {
dev_dbg(mmc_dev(host->mmc),
"Ignoring card err CMD%d\n", host->cmd->opcode);
if (host->cmd)
end_cmd = 1;
if (host->data)
end_trans = 1;
}
}
OMAP_HSMMC_WRITE(host->base, STAT, status);
if (end_cmd || (status & CC))
mmc_omap_cmd_done(host, host->cmd);
if (end_trans || (status & TC))
mmc_omap_xfer_done(host, data);
return IRQ_HANDLED;
}
/*
* Switch MMC operating voltage
*/
static int omap_mmc_switch_opcond(struct mmc_omap_host *host, int vdd)
{
u32 reg_val = 0;
int ret;
/* Disable the clocks */
clk_disable(host->fclk);
clk_disable(host->iclk);
clk_disable(host->dbclk);
/* Turn the power off */
ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
if (ret != 0)
goto err;
/* Turn the power ON with given VDD 1.8 or 3.0v */
ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd);
if (ret != 0)
goto err;
clk_enable(host->fclk);
clk_enable(host->iclk);
clk_enable(host->dbclk);
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR);
reg_val = OMAP_HSMMC_READ(host->base, HCTL);
/*
* If a MMC dual voltage card is detected, the set_ios fn calls
* this fn with VDD bit set for 1.8V. Upon card removal from the
* slot, omap_mmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF.
*
* Only MMC1 supports 3.0V. MMC2 will not function if SDVS30 is
* set in HCTL.
*/
if (host->id == OMAP_MMC1_DEVID && (((1 << vdd) == MMC_VDD_32_33) ||
((1 << vdd) == MMC_VDD_33_34)))
reg_val |= SDVS30;
if ((1 << vdd) == MMC_VDD_165_195)
reg_val |= SDVS18;
OMAP_HSMMC_WRITE(host->base, HCTL, reg_val);
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL) | SDBP);
return 0;
err:
dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n");
return ret;
}
/*
* Work Item to notify the core about card insertion/removal
*/
static void mmc_omap_detect(struct work_struct *work)
{
struct mmc_omap_host *host = container_of(work, struct mmc_omap_host,
mmc_carddetect_work);
sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch");
if (host->carddetect) {
mmc_detect_change(host->mmc, (HZ * 200) / 1000);
} else {
OMAP_HSMMC_WRITE(host->base, SYSCTL,
OMAP_HSMMC_READ(host->base, SYSCTL) | SRD);
while (OMAP_HSMMC_READ(host->base, SYSCTL) & SRD)
;
mmc_detect_change(host->mmc, (HZ * 50) / 1000);
}
}
/*
* ISR for handling card insertion and removal
*/
static irqreturn_t omap_mmc_cd_handler(int irq, void *dev_id)
{
struct mmc_omap_host *host = (struct mmc_omap_host *)dev_id;
host->carddetect = mmc_slot(host).card_detect(irq);
schedule_work(&host->mmc_carddetect_work);
return IRQ_HANDLED;
}
/*
* DMA call back function
*/
static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
{
struct mmc_omap_host *host = data;
if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ)
dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n");
if (host->dma_ch < 0)
return;
omap_free_dma(host->dma_ch);
host->dma_ch = -1;
/*
* DMA Callback: run in interrupt context.
* mutex_unlock will through a kernel warning if used.
*/
up(&host->sem);
}
/*
* Configure dma src and destination parameters
*/
static int mmc_omap_config_dma_param(int sync_dir, struct mmc_omap_host *host,
struct mmc_data *data)
{
if (sync_dir == 0) {
omap_set_dma_dest_params(host->dma_ch, 0,
OMAP_DMA_AMODE_CONSTANT,
(host->mapbase + OMAP_HSMMC_DATA), 0, 0);
omap_set_dma_src_params(host->dma_ch, 0,
OMAP_DMA_AMODE_POST_INC,
sg_dma_address(&data->sg[0]), 0, 0);
} else {
omap_set_dma_src_params(host->dma_ch, 0,
OMAP_DMA_AMODE_CONSTANT,
(host->mapbase + OMAP_HSMMC_DATA), 0, 0);
omap_set_dma_dest_params(host->dma_ch, 0,
OMAP_DMA_AMODE_POST_INC,
sg_dma_address(&data->sg[0]), 0, 0);
}
return 0;
}
/*
* Routine to configure and start DMA for the MMC card
*/
static int
mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req)
{
int sync_dev, sync_dir = 0;
int dma_ch = 0, ret = 0, err = 1;
struct mmc_data *data = req->data;
/*
* If for some reason the DMA transfer is still active,
* we wait for timeout period and free the dma
*/
if (host->dma_ch != -1) {
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(100);
if (down_trylock(&host->sem)) {
omap_free_dma(host->dma_ch);
host->dma_ch = -1;
up(&host->sem);
return err;
}
} else {
if (down_trylock(&host->sem))
return err;
}
if (!(data->flags & MMC_DATA_WRITE)) {
host->dma_dir = DMA_FROM_DEVICE;
if (host->id == OMAP_MMC1_DEVID)
sync_dev = OMAP24XX_DMA_MMC1_RX;
else
sync_dev = OMAP24XX_DMA_MMC2_RX;
} else {
host->dma_dir = DMA_TO_DEVICE;
if (host->id == OMAP_MMC1_DEVID)
sync_dev = OMAP24XX_DMA_MMC1_TX;
else
sync_dev = OMAP24XX_DMA_MMC2_TX;
}
ret = omap_request_dma(sync_dev, "MMC/SD", mmc_omap_dma_cb,
host, &dma_ch);
if (ret != 0) {
dev_dbg(mmc_dev(host->mmc),
"%s: omap_request_dma() failed with %d\n",
mmc_hostname(host->mmc), ret);
return ret;
}
host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
data->sg_len, host->dma_dir);
host->dma_ch = dma_ch;
if (!(data->flags & MMC_DATA_WRITE))
mmc_omap_config_dma_param(1, host, data);
else
mmc_omap_config_dma_param(0, host, data);
if ((data->blksz % 4) == 0)
omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32,
(data->blksz / 4), data->blocks, OMAP_DMA_SYNC_FRAME,
sync_dev, sync_dir);
else
/* REVISIT: The MMC buffer increments only when MSB is written.
* Return error for blksz which is non multiple of four.
*/
return -EINVAL;
omap_start_dma(dma_ch);
return 0;
}
static void set_data_timeout(struct mmc_omap_host *host,
struct mmc_request *req)
{
unsigned int timeout, cycle_ns;
uint32_t reg, clkd, dto = 0;
reg = OMAP_HSMMC_READ(host->base, SYSCTL);
clkd = (reg & CLKD_MASK) >> CLKD_SHIFT;
if (clkd == 0)
clkd = 1;
cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd);
timeout = req->data->timeout_ns / cycle_ns;
timeout += req->data->timeout_clks;
if (timeout) {
while ((timeout & 0x80000000) == 0) {
dto += 1;
timeout <<= 1;
}
dto = 31 - dto;
timeout <<= 1;
if (timeout && dto)
dto += 1;
if (dto >= 13)
dto -= 13;
else
dto = 0;
if (dto > 14)
dto = 14;
}
reg &= ~DTO_MASK;
reg |= dto << DTO_SHIFT;
OMAP_HSMMC_WRITE(host->base, SYSCTL, reg);
}
/*
* Configure block length for MMC/SD cards and initiate the transfer.
*/
static int
mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
{
int ret;
host->data = req->data;
if (req->data == NULL) {
host->datadir = OMAP_MMC_DATADIR_NONE;
OMAP_HSMMC_WRITE(host->base, BLK, 0);
return 0;
}
OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz)
| (req->data->blocks << 16));
set_data_timeout(host, req);
host->datadir = (req->data->flags & MMC_DATA_WRITE) ?
OMAP_MMC_DATADIR_WRITE : OMAP_MMC_DATADIR_READ;
if (host->use_dma) {
ret = mmc_omap_start_dma_transfer(host, req);
if (ret != 0) {
dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n");
return ret;
}
}
return 0;
}
/*
* Request function. for read/write operation
*/
static void omap_mmc_request(struct mmc_host *mmc, struct mmc_request *req)
{
struct mmc_omap_host *host = mmc_priv(mmc);
WARN_ON(host->mrq != NULL);
host->mrq = req;
mmc_omap_prepare_data(host, req);
mmc_omap_start_command(host, req->cmd, req->data);
}
/* Routine to configure clock values. Exposed API to core */
static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
struct mmc_omap_host *host = mmc_priv(mmc);
u16 dsor = 0;
unsigned long regval;
unsigned long timeout;
switch (ios->power_mode) {
case MMC_POWER_OFF:
mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
/*
* Reset bus voltage to 3V if it got set to 1.8V earlier.
* REVISIT: If we are able to detect cards after unplugging
* a 1.8V card, this code should not be needed.
*/
if (!(OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET)) {
int vdd = fls(host->mmc->ocr_avail) - 1;
if (omap_mmc_switch_opcond(host, vdd) != 0)
host->mmc->ios.vdd = vdd;
}
break;
case MMC_POWER_UP:
mmc_slot(host).set_power(host->dev, host->slot_id, 1, ios->vdd);
break;
}
switch (mmc->ios.bus_width) {
case MMC_BUS_WIDTH_4:
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT);
break;
case MMC_BUS_WIDTH_1:
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT);
break;
}
if (host->id == OMAP_MMC1_DEVID) {
/* Only MMC1 can operate at 3V/1.8V */
if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) &&
(ios->vdd == DUAL_VOLT_OCR_BIT)) {
/*
* The mmc_select_voltage fn of the core does
* not seem to set the power_mode to
* MMC_POWER_UP upon recalculating the voltage.
* vdd 1.8v.
*/
if (omap_mmc_switch_opcond(host, ios->vdd) != 0)
dev_dbg(mmc_dev(host->mmc),
"Switch operation failed\n");
}
}
if (ios->clock) {
dsor = OMAP_MMC_MASTER_CLOCK / ios->clock;
if (dsor < 1)
dsor = 1;
if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock)
dsor++;
if (dsor > 250)
dsor = 250;
}
omap_mmc_stop_clock(host);
regval = OMAP_HSMMC_READ(host->base, SYSCTL);
regval = regval & ~(CLKD_MASK);
regval = regval | (dsor << 6) | (DTO << 16);
OMAP_HSMMC_WRITE(host->base, SYSCTL, regval);
OMAP_HSMMC_WRITE(host->base, SYSCTL,
OMAP_HSMMC_READ(host->base, SYSCTL) | ICE);
/* Wait till the ICS bit is set */
timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != 0x2
&& time_before(jiffies, timeout))
msleep(1);
OMAP_HSMMC_WRITE(host->base, SYSCTL,
OMAP_HSMMC_READ(host->base, SYSCTL) | CEN);
if (ios->power_mode == MMC_POWER_ON)
send_init_stream(host);
if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
OMAP_HSMMC_WRITE(host->base, CON,
OMAP_HSMMC_READ(host->base, CON) | OD);
}
static int omap_hsmmc_get_cd(struct mmc_host *mmc)
{
struct mmc_omap_host *host = mmc_priv(mmc);
struct omap_mmc_platform_data *pdata = host->pdata;
if (!pdata->slots[0].card_detect)
return -ENOSYS;
return pdata->slots[0].card_detect(pdata->slots[0].card_detect_irq);
}
static int omap_hsmmc_get_ro(struct mmc_host *mmc)
{
struct mmc_omap_host *host = mmc_priv(mmc);
struct omap_mmc_platform_data *pdata = host->pdata;
if (!pdata->slots[0].get_ro)
return -ENOSYS;
return pdata->slots[0].get_ro(host->dev, 0);
}
static struct mmc_host_ops mmc_omap_ops = {
.request = omap_mmc_request,
.set_ios = omap_mmc_set_ios,
.get_cd = omap_hsmmc_get_cd,
.get_ro = omap_hsmmc_get_ro,
/* NYET -- enable_sdio_irq */
};
static int __init omap_mmc_probe(struct platform_device *pdev)
{
struct omap_mmc_platform_data *pdata = pdev->dev.platform_data;
struct mmc_host *mmc;
struct mmc_omap_host *host = NULL;
struct resource *res;
int ret = 0, irq;
u32 hctl, capa;
if (pdata == NULL) {
dev_err(&pdev->dev, "Platform Data is missing\n");
return -ENXIO;
}
if (pdata->nr_slots == 0) {
dev_err(&pdev->dev, "No Slots\n");
return -ENXIO;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
if (res == NULL || irq < 0)
return -ENXIO;
res = request_mem_region(res->start, res->end - res->start + 1,
pdev->name);
if (res == NULL)
return -EBUSY;
mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
if (!mmc) {
ret = -ENOMEM;
goto err;
}
host = mmc_priv(mmc);
host->mmc = mmc;
host->pdata = pdata;
host->dev = &pdev->dev;
host->use_dma = 1;
host->dev->dma_mask = &pdata->dma_mask;
host->dma_ch = -1;
host->irq = irq;
host->id = pdev->id;
host->slot_id = 0;
host->mapbase = res->start;
host->base = ioremap(host->mapbase, SZ_4K);
platform_set_drvdata(pdev, host);
INIT_WORK(&host->mmc_carddetect_work, mmc_omap_detect);
mmc->ops = &mmc_omap_ops;
mmc->f_min = 400000;
mmc->f_max = 52000000;
sema_init(&host->sem, 1);
host->iclk = clk_get(&pdev->dev, "mmchs_ick");
if (IS_ERR(host->iclk)) {
ret = PTR_ERR(host->iclk);
host->iclk = NULL;
goto err1;
}
host->fclk = clk_get(&pdev->dev, "mmchs_fck");
if (IS_ERR(host->fclk)) {
ret = PTR_ERR(host->fclk);
host->fclk = NULL;
clk_put(host->iclk);
goto err1;
}
if (clk_enable(host->fclk) != 0) {
clk_put(host->iclk);
clk_put(host->fclk);
goto err1;
}
if (clk_enable(host->iclk) != 0) {
clk_disable(host->fclk);
clk_put(host->iclk);
clk_put(host->fclk);
goto err1;
}
host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck");
/*
* MMC can still work without debounce clock.
*/
if (IS_ERR(host->dbclk))
dev_warn(mmc_dev(host->mmc), "Failed to get debounce clock\n");
else
if (clk_enable(host->dbclk) != 0)
dev_dbg(mmc_dev(host->mmc), "Enabling debounce"
" clk failed\n");
else
host->dbclk_enabled = 1;
#ifdef CONFIG_MMC_BLOCK_BOUNCE
mmc->max_phys_segs = 1;
mmc->max_hw_segs = 1;
#endif
mmc->max_blk_size = 512; /* Block Length at max can be 1024 */
mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */
mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
mmc->max_seg_size = mmc->max_req_size;
mmc->ocr_avail = mmc_slot(host).ocr_mask;
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
if (pdata->slots[host->slot_id].wires >= 4)
mmc->caps |= MMC_CAP_4_BIT_DATA;
/* Only MMC1 supports 3.0V */
if (host->id == OMAP_MMC1_DEVID) {
hctl = SDVS30;
capa = VS30 | VS18;
} else {
hctl = SDVS18;
capa = VS18;
}
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL) | hctl);
OMAP_HSMMC_WRITE(host->base, CAPA,
OMAP_HSMMC_READ(host->base, CAPA) | capa);
/* Set the controller to AUTO IDLE mode */
OMAP_HSMMC_WRITE(host->base, SYSCONFIG,
OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE);
/* Set SD bus power bit */
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL) | SDBP);
/* Request IRQ for MMC operations */
ret = request_irq(host->irq, mmc_omap_irq, IRQF_DISABLED,
mmc_hostname(mmc), host);
if (ret) {
dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n");
goto err_irq;
}
if (pdata->init != NULL) {
if (pdata->init(&pdev->dev) != 0) {
dev_dbg(mmc_dev(host->mmc),
"Unable to configure MMC IRQs\n");
goto err_irq_cd_init;
}
}
/* Request IRQ for card detect */
if ((mmc_slot(host).card_detect_irq) && (mmc_slot(host).card_detect)) {
ret = request_irq(mmc_slot(host).card_detect_irq,
omap_mmc_cd_handler,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
| IRQF_DISABLED,
mmc_hostname(mmc), host);
if (ret) {
dev_dbg(mmc_dev(host->mmc),
"Unable to grab MMC CD IRQ\n");
goto err_irq_cd;
}
}
OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
mmc_add_host(mmc);
if (host->pdata->slots[host->slot_id].name != NULL) {
ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name);
if (ret < 0)
goto err_slot_name;
}
if (mmc_slot(host).card_detect_irq && mmc_slot(host).card_detect &&
host->pdata->slots[host->slot_id].get_cover_state) {
ret = device_create_file(&mmc->class_dev,
&dev_attr_cover_switch);
if (ret < 0)
goto err_cover_switch;
}
return 0;
err_cover_switch:
device_remove_file(&mmc->class_dev, &dev_attr_cover_switch);
err_slot_name:
mmc_remove_host(mmc);
err_irq_cd:
free_irq(mmc_slot(host).card_detect_irq, host);
err_irq_cd_init:
free_irq(host->irq, host);
err_irq:
clk_disable(host->fclk);
clk_disable(host->iclk);
clk_put(host->fclk);
clk_put(host->iclk);
if (host->dbclk_enabled) {
clk_disable(host->dbclk);
clk_put(host->dbclk);
}
err1:
iounmap(host->base);
err:
dev_dbg(mmc_dev(host->mmc), "Probe Failed\n");
release_mem_region(res->start, res->end - res->start + 1);
if (host)
mmc_free_host(mmc);
return ret;
}
static int omap_mmc_remove(struct platform_device *pdev)
{
struct mmc_omap_host *host = platform_get_drvdata(pdev);
struct resource *res;
if (host) {
mmc_remove_host(host->mmc);
if (host->pdata->cleanup)
host->pdata->cleanup(&pdev->dev);
free_irq(host->irq, host);
if (mmc_slot(host).card_detect_irq)
free_irq(mmc_slot(host).card_detect_irq, host);
flush_scheduled_work();
clk_disable(host->fclk);
clk_disable(host->iclk);
clk_put(host->fclk);
clk_put(host->iclk);
if (host->dbclk_enabled) {
clk_disable(host->dbclk);
clk_put(host->dbclk);
}
mmc_free_host(host->mmc);
iounmap(host->base);
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res)
release_mem_region(res->start, res->end - res->start + 1);
platform_set_drvdata(pdev, NULL);
return 0;
}
#ifdef CONFIG_PM
static int omap_mmc_suspend(struct platform_device *pdev, pm_message_t state)
{
int ret = 0;
struct mmc_omap_host *host = platform_get_drvdata(pdev);
if (host && host->suspended)
return 0;
if (host) {
ret = mmc_suspend_host(host->mmc, state);
if (ret == 0) {
host->suspended = 1;
OMAP_HSMMC_WRITE(host->base, ISE, 0);
OMAP_HSMMC_WRITE(host->base, IE, 0);
if (host->pdata->suspend) {
ret = host->pdata->suspend(&pdev->dev,
host->slot_id);
if (ret)
dev_dbg(mmc_dev(host->mmc),
"Unable to handle MMC board"
" level suspend\n");
}
if (!(OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET)) {
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL)
& SDVSCLR);
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL)
| SDVS30);
OMAP_HSMMC_WRITE(host->base, HCTL,
OMAP_HSMMC_READ(host->base, HCTL)
| SDBP);
}
clk_disable(host->fclk);
clk_disable(host->iclk);
clk_disable(host->dbclk);
}
}
return ret;
}
/* Routine to resume the MMC device */
static int omap_mmc_resume(struct platform_device *pdev)
{
int ret = 0;
struct mmc_omap_host *host = platform_get_drvdata(pdev);
if (host && !host->suspended)
return 0;
if (host) {
ret = clk_enable(host->fclk);
if (ret)
goto clk_en_err;
ret = clk_enable(host->iclk);
if (ret) {
clk_disable(host->fclk);
clk_put(host->fclk);
goto clk_en_err;
}
if (clk_enable(host->dbclk) != 0)
dev_dbg(mmc_dev(host->mmc),
"Enabling debounce clk failed\n");
if (host->pdata->resume) {
ret = host->pdata->resume(&pdev->dev, host->slot_id);
if (ret)
dev_dbg(mmc_dev(host->mmc),
"Unmask interrupt failed\n");
}
/* Notify the core to resume the host */
ret = mmc_resume_host(host->mmc);
if (ret == 0)
host->suspended = 0;
}
return ret;
clk_en_err:
dev_dbg(mmc_dev(host->mmc),
"Failed to enable MMC clocks during resume\n");
return ret;
}
#else
#define omap_mmc_suspend NULL
#define omap_mmc_resume NULL
#endif
static struct platform_driver omap_mmc_driver = {
.probe = omap_mmc_probe,
.remove = omap_mmc_remove,
.suspend = omap_mmc_suspend,
.resume = omap_mmc_resume,
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
},
};
static int __init omap_mmc_init(void)
{
/* Register the MMC driver */
return platform_driver_register(&omap_mmc_driver);
}
static void __exit omap_mmc_cleanup(void)
{
/* Unregister MMC driver */
platform_driver_unregister(&omap_mmc_driver);
}
module_init(omap_mmc_init);
module_exit(omap_mmc_cleanup);
MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRIVER_NAME);
MODULE_AUTHOR("Texas Instruments Inc");
drivers/mmc/host/s3cmci.c
View file @ 53760710
......@@ -20,7 +20,7 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/dma.h>
#include <mach/dma.h>
#include <mach/regs-sdi.h>
#include <mach/regs-gpio.h>
......
drivers/mtd/onenand/omap2.c
View file @ 53760710
......@@ -629,7 +629,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
}
if (c->gpio_irq) {
if ((r = omap_request_gpio(c->gpio_irq)) < 0) {
if ((r = gpio_request(c->gpio_irq, "OneNAND irq")) < 0) {
dev_err(&pdev->dev, "Failed to request GPIO%d for "
"OneNAND\n", c->gpio_irq);
goto err_iounmap;
......@@ -726,7 +726,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
free_irq(gpio_to_irq(c->gpio_irq), c);
err_release_gpio:
if (c->gpio_irq)
omap_free_gpio(c->gpio_irq);
gpio_free(c->gpio_irq);
err_iounmap:
iounmap(c->onenand.base);
err_release_mem_region:
......@@ -761,7 +761,7 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
platform_set_drvdata(pdev, NULL);
if (c->gpio_irq) {
free_irq(gpio_to_irq(c->gpio_irq), c);
omap_free_gpio(c->gpio_irq);
gpio_free(c->gpio_irq);
}
iounmap(c->onenand.base);
release_mem_region(c->phys_base, ONENAND_IO_SIZE);
......
drivers/net/arm/am79c961a.c
View file @ 53760710
......@@ -208,9 +208,9 @@ am79c961_init_for_open(struct net_device *dev)
/*
* Stop the chip.
*/
spin_lock_irqsave(priv->chip_lock, flags);
spin_lock_irqsave(&priv->chip_lock, flags);
write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);
spin_unlock_irqrestore(priv->chip_lock, flags);
spin_unlock_irqrestore(&priv->chip_lock, flags);
write_ireg (dev->base_addr, 5, 0x00a0); /* Receive address LED */
write_ireg (dev->base_addr, 6, 0x0081); /* Collision LED */
......@@ -332,10 +332,10 @@ am79c961_close(struct net_device *dev)
netif_stop_queue(dev);
netif_carrier_off(dev);
spin_lock_irqsave(priv->chip_lock, flags);
spin_lock_irqsave(&priv->chip_lock, flags);
write_rreg (dev->base_addr, CSR0, CSR0_STOP);
write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
spin_unlock_irqrestore(priv->chip_lock, flags);
spin_unlock_irqrestore(&priv->chip_lock, flags);
free_irq (dev->irq, dev);
......@@ -391,7 +391,7 @@ static void am79c961_setmulticastlist (struct net_device *dev)
am79c961_mc_hash(dmi, multi_hash);
}
spin_lock_irqsave(priv->chip_lock, flags);
spin_lock_irqsave(&priv->chip_lock, flags);
stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP;
......@@ -405,9 +405,9 @@ static void am79c961_setmulticastlist (struct net_device *dev)
* Spin waiting for chip to report suspend mode
*/
while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) {
spin_unlock_irqrestore(priv->chip_lock, flags);
spin_unlock_irqrestore(&priv->chip_lock, flags);
nop();
spin_lock_irqsave(priv->chip_lock, flags);
spin_lock_irqsave(&priv->chip_lock, flags);
}
}
......@@ -429,7 +429,7 @@ static void am79c961_setmulticastlist (struct net_device *dev)
write_rreg(dev->base_addr, CTRL1, 0);
}
spin_unlock_irqrestore(priv->chip_lock, flags);
spin_unlock_irqrestore(&priv->chip_lock, flags);
}
static void am79c961_timeout(struct net_device *dev)
......@@ -467,10 +467,10 @@ am79c961_sendpacket(struct sk_buff *skb, struct net_device *dev)
am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP);
priv->txhead = head;
spin_lock_irqsave(priv->chip_lock, flags);
spin_lock_irqsave(&priv->chip_lock, flags);
write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA);
dev->trans_start = jiffies;
spin_unlock_irqrestore(priv->chip_lock, flags);
spin_unlock_irqrestore(&priv->chip_lock, flags);
/*
* If the next packet is owned by the ethernet device,
......
drivers/usb/host/ohci-omap.c
View file @ 53760710
......@@ -315,14 +315,14 @@ static int usb_hcd_omap_probe (const struct hc_driver *driver,
return -ENODEV;
}
usb_host_ck = clk_get(0, "usb_hhc_ck");
usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck");
if (IS_ERR(usb_host_ck))
return PTR_ERR(usb_host_ck);
if (!cpu_is_omap15xx())
usb_dc_ck = clk_get(0, "usb_dc_ck");
usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck");
else
usb_dc_ck = clk_get(0, "lb_ck");
usb_dc_ck = clk_get(&pdev->dev, "lb_ck");
if (IS_ERR(usb_dc_ck)) {
clk_put(usb_host_ck);
......
drivers/video/omap/lcdc.c
View file @ 53760710
......@@ -800,14 +800,14 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode,
/* FIXME:
* According to errata some platforms have a clock rate limitiation
*/
lcdc.lcd_ck = clk_get(NULL, "lcd_ck");
lcdc.lcd_ck = clk_get(fbdev->dev, "lcd_ck");
if (IS_ERR(lcdc.lcd_ck)) {
dev_err(fbdev->dev, "unable to access LCD clock\n");
r = PTR_ERR(lcdc.lcd_ck);
goto fail0;
}
tc_ck = clk_get(NULL, "tc_ck");
tc_ck = clk_get(fbdev->dev, "tc_ck");
if (IS_ERR(tc_ck)) {
dev_err(fbdev->dev, "unable to access TC clock\n");
r = PTR_ERR(tc_ck);
......
drivers/watchdog/Kconfig
View file @ 53760710
......@@ -187,10 +187,10 @@ config EP93XX_WATCHDOG
config OMAP_WATCHDOG
tristate "OMAP Watchdog"
depends on ARCH_OMAP16XX || ARCH_OMAP24XX
depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
help
Support for TI OMAP1610/OMAP1710/OMAP2420 watchdog. Say 'Y' here to
enable the OMAP1610/OMAP1710 watchdog timer.
Support for TI OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog. Say 'Y'
here to enable the OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog timer.
config PNX4008_WATCHDOG
tristate "PNX4008 Watchdog"
......
drivers/watchdog/at91rm9200_wdt.c
View file @ 53760710
......@@ -13,6 +13,7 @@
#include <linux/errno.h>
#include <linux/fs.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/miscdevice.h>
#include <linux/module.h>
......
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