Commit 5459f9ab authored by Dinh Nguyen's avatar Dinh Nguyen

ARM: socfpga: dts: Add a clock node for sdmmc CIU

The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
node and makes the sdmmc_clk it's parent.
Signed-off-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
---
v2: renamed ciu_clk to sdmmc_clk_divided
parent 88c8e4c2
...@@ -451,6 +451,14 @@ sdmmc_clk: sdmmc_clk { ...@@ -451,6 +451,14 @@ sdmmc_clk: sdmmc_clk {
clk-phase = <0 135>; clk-phase = <0 135>;
}; };
sdmmc_clk_divided: sdmmc_clk_divided {
#clock-cells = <0>;
compatible = "altr,socfpga-gate-clk";
clocks = <&sdmmc_clk>;
clk-gate = <0xa0 8>;
fixed-divider = <4>;
};
nand_x_clk: nand_x_clk { nand_x_clk: nand_x_clk {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "altr,socfpga-gate-clk"; compatible = "altr,socfpga-gate-clk";
...@@ -635,7 +643,7 @@ mmc: dwmmc0@ff704000 { ...@@ -635,7 +643,7 @@ mmc: dwmmc0@ff704000 {
fifo-depth = <0x400>; fifo-depth = <0x400>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&l4_mp_clk>, <&sdmmc_clk>; clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;
clock-names = "biu", "ciu"; clock-names = "biu", "ciu";
}; };
......
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