Commit 557a2aba authored by Veerabhadrarao Badiganti's avatar Veerabhadrarao Badiganti Committed by Bjorn Andersson

arm64: dts: qcom: qcs404: Enable CQE support for eMMC

Enabling CQE support for eMMC by supplying the correct reg name
and flag which indicates CQE support.

Also remove the redundant _mem suffix for reg names.
Signed-off-by: default avatarVeerabhadrarao Badiganti <vbadigan@codeaurora.org>
Link: https://lore.kernel.org/r/1583946863-24308-1-git-send-email-vbadigan@codeaurora.orgSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 5bcdf100
...@@ -200,6 +200,7 @@ vreg_l13_3p3: l13 { ...@@ -200,6 +200,7 @@ vreg_l13_3p3: l13 {
&sdcc1 { &sdcc1 {
status = "ok"; status = "ok";
supports-cqe;
mmc-ddr-1_8v; mmc-ddr-1_8v;
mmc-hs400-1_8v; mmc-hs400-1_8v;
bus-width = <8>; bus-width = <8>;
......
...@@ -687,7 +687,7 @@ pcie_phy: phy@7786000 { ...@@ -687,7 +687,7 @@ pcie_phy: phy@7786000 {
sdcc1: sdcc@7804000 { sdcc1: sdcc@7804000 {
compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"; compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5";
reg = <0x07804000 0x1000>, <0x7805000 0x1000>; reg = <0x07804000 0x1000>, <0x7805000 0x1000>;
reg-names = "hc_mem", "cmdq_mem"; reg-names = "hc", "cqhci";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
......
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