Commit 5597afad authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'omap-for-v4.4/fixes-rc2' of...

Merge tag 'omap-for-v4.4/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Merge "Fixes for omaps for v4.4-rc cycle" from Tony Lindgren:

- A series of audio changes for dra7 that missed the merge window but turned
  out to be necessary to fix a boot time imprecise external abort error and to
  getaudio working

- Fix l4 related boot time errors for dm81xx

- Use lockless cldm/pwrdm api in omap4_boot_secondary

- Remove t410 custom abort handler that is no longer needed and may
  hide other critical errors

- Mark cpuidle tracepoints as _rcuidle

- Fix module alias for omap-ocp2scp

* tag 'omap-for-v4.4/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP4+: SMP: use lockless clkdm/pwrdm api in omap4_boot_secondary
  arm: omap2+: add missing HWMOD_NO_IDLEST in 81xx hwmod data
  ARM: OMAP2+: remove custom abort handler for t410
  ARM: OMAP: DRA7: hwmod: Add data for McASP3
  ARM: OMAP2+: hwmod: Add hwmod flag for HWMOD_OPT_CLKS_NEEDED
  ARM: dts: dra7: Fix McASP3 node regarding to clocks
  bus: omap-ocp2scp: Fix module alias
  ARM: OMAP2+: PM: Denote the cpuidle tracepoints as _rcuidle()
parents e6b66dfb 918af9f9
...@@ -1459,8 +1459,8 @@ mcasp3: mcasp@48468000 { ...@@ -1459,8 +1459,8 @@ mcasp3: mcasp@48468000 {
interrupt-names = "tx", "rx"; interrupt-names = "tx", "rx";
dmas = <&sdma_xbar 133>, <&sdma_xbar 132>; dmas = <&sdma_xbar 133>, <&sdma_xbar 132>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
clocks = <&mcasp3_ahclkx_mux>; clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>;
clock-names = "fck"; clock-names = "fck", "ahclkx";
status = "disabled"; status = "disabled";
}; };
......
...@@ -143,9 +143,9 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) ...@@ -143,9 +143,9 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
* Ensure that CPU power state is set to ON to avoid CPU * Ensure that CPU power state is set to ON to avoid CPU
* powerdomain transition on wfi * powerdomain transition on wfi
*/ */
clkdm_wakeup(cpu1_clkdm); clkdm_wakeup_nolock(cpu1_clkdm);
omap_set_pwrdm_state(cpu1_pwrdm, PWRDM_POWER_ON); pwrdm_set_next_pwrst(cpu1_pwrdm, PWRDM_POWER_ON);
clkdm_allow_idle(cpu1_clkdm); clkdm_allow_idle_nolock(cpu1_clkdm);
if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) { if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) {
while (gic_dist_disabled()) { while (gic_dist_disabled()) {
......
...@@ -890,6 +890,36 @@ static int _init_opt_clks(struct omap_hwmod *oh) ...@@ -890,6 +890,36 @@ static int _init_opt_clks(struct omap_hwmod *oh)
return ret; return ret;
} }
static void _enable_optional_clocks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
int i;
pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk) {
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
clk_enable(oc->_clk);
}
}
static void _disable_optional_clocks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
int i;
pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk) {
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
clk_disable(oc->_clk);
}
}
/** /**
* _enable_clocks - enable hwmod main clock and interface clocks * _enable_clocks - enable hwmod main clock and interface clocks
* @oh: struct omap_hwmod * * @oh: struct omap_hwmod *
...@@ -917,6 +947,9 @@ static int _enable_clocks(struct omap_hwmod *oh) ...@@ -917,6 +947,9 @@ static int _enable_clocks(struct omap_hwmod *oh)
clk_enable(os->_clk); clk_enable(os->_clk);
} }
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
_enable_optional_clocks(oh);
/* The opt clocks are controlled by the device driver. */ /* The opt clocks are controlled by the device driver. */
return 0; return 0;
...@@ -948,41 +981,14 @@ static int _disable_clocks(struct omap_hwmod *oh) ...@@ -948,41 +981,14 @@ static int _disable_clocks(struct omap_hwmod *oh)
clk_disable(os->_clk); clk_disable(os->_clk);
} }
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
_disable_optional_clocks(oh);
/* The opt clocks are controlled by the device driver. */ /* The opt clocks are controlled by the device driver. */
return 0; return 0;
} }
static void _enable_optional_clocks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
int i;
pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk) {
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
clk_enable(oc->_clk);
}
}
static void _disable_optional_clocks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
int i;
pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk) {
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
clk_disable(oc->_clk);
}
}
/** /**
* _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
* @oh: struct omap_hwmod * * @oh: struct omap_hwmod *
......
...@@ -523,6 +523,8 @@ struct omap_hwmod_omap4_prcm { ...@@ -523,6 +523,8 @@ struct omap_hwmod_omap4_prcm {
* HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up * HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up
* events by calling _reconfigure_io_chain() when a device is enabled * events by calling _reconfigure_io_chain() when a device is enabled
* or idled. * or idled.
* HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to
* operate and they need to be handled at the same time as the main_clk.
*/ */
#define HWMOD_SWSUP_SIDLE (1 << 0) #define HWMOD_SWSUP_SIDLE (1 << 0)
#define HWMOD_SWSUP_MSTANDBY (1 << 1) #define HWMOD_SWSUP_MSTANDBY (1 << 1)
...@@ -538,6 +540,7 @@ struct omap_hwmod_omap4_prcm { ...@@ -538,6 +540,7 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_FORCE_MSTANDBY (1 << 11) #define HWMOD_FORCE_MSTANDBY (1 << 11)
#define HWMOD_SWSUP_SIDLE_ACT (1 << 12) #define HWMOD_SWSUP_SIDLE_ACT (1 << 12)
#define HWMOD_RECONFIG_IO_CHAIN (1 << 13) #define HWMOD_RECONFIG_IO_CHAIN (1 << 13)
#define HWMOD_OPT_CLKS_NEEDED (1 << 14)
/* /*
* omap_hwmod._int_flags definitions * omap_hwmod._int_flags definitions
......
...@@ -1297,6 +1297,44 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = { ...@@ -1297,6 +1297,44 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
.dev_attr = &mcspi4_dev_attr, .dev_attr = &mcspi4_dev_attr,
}; };
/*
* 'mcasp' class
*
*/
static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
.sysc_offs = 0x0004,
.sysc_flags = SYSC_HAS_SIDLEMODE,
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type3,
};
static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
.name = "mcasp",
.sysc = &dra7xx_mcasp_sysc,
};
/* mcasp3 */
static struct omap_hwmod_opt_clk mcasp3_opt_clks[] = {
{ .role = "ahclkx", .clk = "mcasp3_ahclkx_mux" },
};
static struct omap_hwmod dra7xx_mcasp3_hwmod = {
.name = "mcasp3",
.class = &dra7xx_mcasp_hwmod_class,
.clkdm_name = "l4per2_clkdm",
.main_clk = "mcasp3_aux_gfclk_mux",
.flags = HWMOD_OPT_CLKS_NEEDED,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
.modulemode = MODULEMODE_SWCTRL,
},
},
.opt_clks = mcasp3_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcasp3_opt_clks),
};
/* /*
* 'mmc' class * 'mmc' class
* *
...@@ -2566,6 +2604,22 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = { ...@@ -2566,6 +2604,22 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = {
.user = OCP_USER_MPU | OCP_USER_SDMA, .user = OCP_USER_MPU | OCP_USER_SDMA,
}; };
/* l4_per2 -> mcasp3 */
static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
.master = &dra7xx_l4_per2_hwmod,
.slave = &dra7xx_mcasp3_hwmod,
.clk = "l4_root_clk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_1 -> mcasp3 */
static struct omap_hwmod_ocp_if dra7xx_l3_main_1__mcasp3 = {
.master = &dra7xx_l3_main_1_hwmod,
.slave = &dra7xx_mcasp3_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per1 -> elm */ /* l4_per1 -> elm */
static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = { static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = {
.master = &dra7xx_l4_per1_hwmod, .master = &dra7xx_l4_per1_hwmod,
...@@ -3308,6 +3362,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { ...@@ -3308,6 +3362,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_wkup__dcan1, &dra7xx_l4_wkup__dcan1,
&dra7xx_l4_per2__dcan2, &dra7xx_l4_per2__dcan2,
&dra7xx_l4_per2__cpgmac0, &dra7xx_l4_per2__cpgmac0,
&dra7xx_l4_per2__mcasp3,
&dra7xx_l3_main_1__mcasp3,
&dra7xx_gmac__mdio, &dra7xx_gmac__mdio,
&dra7xx_l4_cfg__dma_system, &dra7xx_l4_cfg__dma_system,
&dra7xx_l3_main_1__dss, &dra7xx_l3_main_1__dss,
......
...@@ -144,6 +144,7 @@ static struct omap_hwmod dm81xx_l4_ls_hwmod = { ...@@ -144,6 +144,7 @@ static struct omap_hwmod dm81xx_l4_ls_hwmod = {
.name = "l4_ls", .name = "l4_ls",
.clkdm_name = "alwon_l3s_clkdm", .clkdm_name = "alwon_l3s_clkdm",
.class = &l4_hwmod_class, .class = &l4_hwmod_class,
.flags = HWMOD_NO_IDLEST,
}; };
/* /*
...@@ -155,6 +156,7 @@ static struct omap_hwmod dm81xx_l4_hs_hwmod = { ...@@ -155,6 +156,7 @@ static struct omap_hwmod dm81xx_l4_hs_hwmod = {
.name = "l4_hs", .name = "l4_hs",
.clkdm_name = "alwon_l3_med_clkdm", .clkdm_name = "alwon_l3_med_clkdm",
.class = &l4_hwmod_class, .class = &l4_hwmod_class,
.flags = HWMOD_NO_IDLEST,
}; };
/* L3 slow -> L4 ls peripheral interface running at 125MHz */ /* L3 slow -> L4 ls peripheral interface running at 125MHz */
...@@ -850,6 +852,7 @@ static struct omap_hwmod dm816x_emac0_hwmod = { ...@@ -850,6 +852,7 @@ static struct omap_hwmod dm816x_emac0_hwmod = {
.name = "emac0", .name = "emac0",
.clkdm_name = "alwon_ethernet_clkdm", .clkdm_name = "alwon_ethernet_clkdm",
.class = &dm816x_emac_hwmod_class, .class = &dm816x_emac_hwmod_class,
.flags = HWMOD_NO_IDLEST,
}; };
static struct omap_hwmod_ocp_if dm81xx_l4_hs__emac0 = { static struct omap_hwmod_ocp_if dm81xx_l4_hs__emac0 = {
......
...@@ -24,9 +24,6 @@ ...@@ -24,9 +24,6 @@
#include <linux/platform_data/iommu-omap.h> #include <linux/platform_data/iommu-omap.h>
#include <linux/platform_data/wkup_m3.h> #include <linux/platform_data/wkup_m3.h>
#include <asm/siginfo.h>
#include <asm/signal.h>
#include "common.h" #include "common.h"
#include "common-board-devices.h" #include "common-board-devices.h"
#include "dss-common.h" #include "dss-common.h"
...@@ -385,29 +382,6 @@ static void __init omap3_pandora_legacy_init(void) ...@@ -385,29 +382,6 @@ static void __init omap3_pandora_legacy_init(void)
} }
#endif /* CONFIG_ARCH_OMAP3 */ #endif /* CONFIG_ARCH_OMAP3 */
#ifdef CONFIG_SOC_TI81XX
static int fault_fixed_up;
static int t410_abort_handler(unsigned long addr, unsigned int fsr,
struct pt_regs *regs)
{
if ((fsr == 0x406 || fsr == 0xc06) && !fault_fixed_up) {
pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
addr, fsr);
fault_fixed_up = 1;
return 0;
}
return 1;
}
static void __init t410_abort_init(void)
{
hook_fault_code(16 + 6, t410_abort_handler, SIGBUS, BUS_OBJERR,
"imprecise external abort");
}
#endif
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
static struct iommu_platform_data omap4_iommu_pdata = { static struct iommu_platform_data omap4_iommu_pdata = {
.reset_name = "mmu_cache", .reset_name = "mmu_cache",
...@@ -536,9 +510,6 @@ static struct pdata_init pdata_quirks[] __initdata = { ...@@ -536,9 +510,6 @@ static struct pdata_init pdata_quirks[] __initdata = {
{ "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, }, { "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
{ "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, }, { "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
#endif #endif
#ifdef CONFIG_SOC_TI81XX
{ "hp,t410", t410_abort_init, },
#endif
#ifdef CONFIG_SOC_OMAP5 #ifdef CONFIG_SOC_OMAP5
{ "ti,omap5-uevm", omap5_uevm_legacy_init, }, { "ti,omap5-uevm", omap5_uevm_legacy_init, },
#endif #endif
......
...@@ -301,11 +301,11 @@ static void omap3_pm_idle(void) ...@@ -301,11 +301,11 @@ static void omap3_pm_idle(void)
if (omap_irq_pending()) if (omap_irq_pending())
return; return;
trace_cpu_idle(1, smp_processor_id()); trace_cpu_idle_rcuidle(1, smp_processor_id());
omap_sram_idle(); omap_sram_idle();
trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id()); trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
} }
#ifdef CONFIG_SUSPEND #ifdef CONFIG_SUSPEND
......
...@@ -117,7 +117,7 @@ static struct platform_driver omap_ocp2scp_driver = { ...@@ -117,7 +117,7 @@ static struct platform_driver omap_ocp2scp_driver = {
module_platform_driver(omap_ocp2scp_driver); module_platform_driver(omap_ocp2scp_driver);
MODULE_ALIAS("platform: omap-ocp2scp"); MODULE_ALIAS("platform:omap-ocp2scp");
MODULE_AUTHOR("Texas Instruments Inc."); MODULE_AUTHOR("Texas Instruments Inc.");
MODULE_DESCRIPTION("OMAP OCP2SCP driver"); MODULE_DESCRIPTION("OMAP OCP2SCP driver");
MODULE_LICENSE("GPL v2"); MODULE_LICENSE("GPL v2");
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