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Commit 56c10bf8 authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'for-armsoc' of git://git.linaro.org/people/rmk/linux-arm 

Pull #1 ARM updates from Russell King:
 "This one covers stuff which Arnd is waiting for me to push, as this is
  shared between both our trees and probably other trees elsewhere.

  Essentially, this contains:
   - AMBA primecell device initializer updates - mostly shrinking the
     size of the device declarations in platform code to something more
     reasonable.
   - Getting rid of the NO_IRQ crap from AMBA primecell stuff.
   - Nicolas' idle cleanups.  This in combination with the restart
     cleanups from the last merge window results in a great many
     mach/system.h files being deleted."

Yay: ~80 files, ~2000 lines deleted.

* 'for-armsoc' of git://git.linaro.org/people/rmk/linux-arm: (60 commits)
  ARM: remove disable_fiq and arch_ret_to_user macros
  ARM: make entry-macro.S depend on !MULTI_IRQ_HANDLER
  ARM: rpc: make default fiq handler run-time installed
  ARM: make arch_ret_to_user macro optional
  ARM: amba: samsung: use common amba device initializers
  ARM: amba: spear: use common amba device initializers
  ARM: amba: nomadik: use common amba device initializers
  ARM: amba: u300: use common amba device initializers
  ARM: amba: lpc32xx: use common amba device initializers
  ARM: amba: netx: use common amba device initializers
  ARM: amba: bcmring: use common amba device initializers
  ARM: amba: ep93xx: use common amba device initializers
  ARM: amba: omap2: use common amba device initializers
  ARM: amba: integrator: use common amba device initializers
  ARM: amba: realview: get rid of private platform amba_device initializer
  ARM: amba: versatile: get rid of private platform amba_device initializer
  ARM: amba: vexpress: get rid of private platform amba_device initializer
  ARM: amba: provide common initializers for static amba devices
  ARM: amba: make use of -1 IRQs warn
  ARM: amba: u300: get rid of NO_IRQ initializers
  ...
parents bab2d8c6 61b80086
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Showing with 931 additions and 2861 deletions
arch/arm/Kconfig
View file @ 56c10bf8
...@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA ...@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA
config FIQ config FIQ
bool bool
config NEED_RET_TO_USER
bool
config ARCH_MTD_XIP config ARCH_MTD_XIP
bool bool
...@@ -479,6 +482,7 @@ config ARCH_IOP13XX ...@@ -479,6 +482,7 @@ config ARCH_IOP13XX
select ARCH_SUPPORTS_MSI select ARCH_SUPPORTS_MSI
select VMSPLIT_1G select VMSPLIT_1G
select NEED_MACH_MEMORY_H select NEED_MACH_MEMORY_H
select NEED_RET_TO_USER
help help
Support for Intel's IOP13XX (XScale) family of processors. Support for Intel's IOP13XX (XScale) family of processors.
...@@ -486,6 +490,7 @@ config ARCH_IOP32X ...@@ -486,6 +490,7 @@ config ARCH_IOP32X
bool "IOP32x-based" bool "IOP32x-based"
depends on MMU depends on MMU
select CPU_XSCALE select CPU_XSCALE
select NEED_RET_TO_USER
select PLAT_IOP select PLAT_IOP
select PCI select PCI
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
...@@ -497,6 +502,7 @@ config ARCH_IOP33X ...@@ -497,6 +502,7 @@ config ARCH_IOP33X
bool "IOP33x-based" bool "IOP33x-based"
depends on MMU depends on MMU
select CPU_XSCALE select CPU_XSCALE
select NEED_RET_TO_USER
select PLAT_IOP select PLAT_IOP
select PCI select PCI
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
......
arch/arm/Kconfig.debug
View file @ 56c10bf8
...@@ -81,25 +81,6 @@ choice ...@@ -81,25 +81,6 @@ choice
prompt "Kernel low-level debugging port" prompt "Kernel low-level debugging port"
depends on DEBUG_LL depends on DEBUG_LL
config DEBUG_LL_UART_NONE
bool "No low-level debugging UART"
help
Say Y here if your platform doesn't provide a UART option
below. This relies on your platform choosing the right UART
definition internally in order for low-level debugging to
work.
config DEBUG_ICEDCC
bool "Kernel low-level debugging via EmbeddedICE DCC channel"
help
Say Y here if you want the debug print routines to direct
their output to the EmbeddedICE macrocell's DCC channel using
co-processor 14. This is known to work on the ARM9 style ICE
channel and on the XScale with the PEEDI.
Note that the system will appear to hang during boot if there
is nothing connected to read from the DCC.
config AT91_DEBUG_LL_DBGU0 config AT91_DEBUG_LL_DBGU0
bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
depends on HAVE_AT91_DBGU0 depends on HAVE_AT91_DBGU0
...@@ -108,20 +89,6 @@ choice ...@@ -108,20 +89,6 @@ choice
bool "Kernel low-level debugging on 9263, 9g45 and cap9" bool "Kernel low-level debugging on 9263, 9g45 and cap9"
depends on HAVE_AT91_DBGU1 depends on HAVE_AT91_DBGU1
config DEBUG_FOOTBRIDGE_COM1
bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
depends on FOOTBRIDGE
help
Say Y here if you want the debug print routines to direct
their output to the 8250 at PCI COM1.
config DEBUG_DC21285_PORT
bool "Kernel low-level debugging messages via footbridge serial port"
depends on FOOTBRIDGE
help
Say Y here if you want the debug print routines to direct
their output to the serial port in the DC21285 (Footbridge).
config DEBUG_CLPS711X_UART1 config DEBUG_CLPS711X_UART1
bool "Kernel low-level debugging messages via UART1" bool "Kernel low-level debugging messages via UART1"
depends on ARCH_CLPS711X depends on ARCH_CLPS711X
...@@ -136,6 +103,20 @@ choice ...@@ -136,6 +103,20 @@ choice
Say Y here if you want the debug print routines to direct Say Y here if you want the debug print routines to direct
their output to the second serial port on these devices. their output to the second serial port on these devices.
config DEBUG_DC21285_PORT
bool "Kernel low-level debugging messages via footbridge serial port"
depends on FOOTBRIDGE
help
Say Y here if you want the debug print routines to direct
their output to the serial port in the DC21285 (Footbridge).
config DEBUG_FOOTBRIDGE_COM1
bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
depends on FOOTBRIDGE
help
Say Y here if you want the debug print routines to direct
their output to the 8250 at PCI COM1.
config DEBUG_HIGHBANK_UART config DEBUG_HIGHBANK_UART
bool "Kernel low-level debugging messages via Highbank UART" bool "Kernel low-level debugging messages via Highbank UART"
depends on ARCH_HIGHBANK depends on ARCH_HIGHBANK
...@@ -206,38 +187,42 @@ choice ...@@ -206,38 +187,42 @@ choice
Say Y here if you want kernel low-level debugging support Say Y here if you want kernel low-level debugging support
on i.MX6Q. on i.MX6Q.
config DEBUG_S3C_UART0 config DEBUG_MSM_UART1
depends on PLAT_SAMSUNG bool "Kernel low-level debugging messages via MSM UART1"
bool "Use S3C UART 0 for low-level debug" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
help help
Say Y here if you want the debug print routines to direct Say Y here if you want the debug print routines to direct
their output to UART 0. The port must have been initialised their output to the first serial port on MSM devices.
by the boot-loader before use.
The uncompressor code port configuration is now handled
by CONFIG_S3C_LOWLEVEL_UART_PORT.
config DEBUG_S3C_UART1 config DEBUG_MSM_UART2
depends on PLAT_SAMSUNG bool "Kernel low-level debugging messages via MSM UART2"
bool "Use S3C UART 1 for low-level debug" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
help help
Say Y here if you want the debug print routines to direct Say Y here if you want the debug print routines to direct
their output to UART 1. The port must have been initialised their output to the second serial port on MSM devices.
by the boot-loader before use.
The uncompressor code port configuration is now handled config DEBUG_MSM_UART3
by CONFIG_S3C_LOWLEVEL_UART_PORT. bool "Kernel low-level debugging messages via MSM UART3"
depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
help
Say Y here if you want the debug print routines to direct
their output to the third serial port on MSM devices.
config DEBUG_S3C_UART2 config DEBUG_MSM8660_UART
depends on PLAT_SAMSUNG bool "Kernel low-level debugging messages via MSM 8660 UART"
bool "Use S3C UART 2 for low-level debug" depends on ARCH_MSM8X60
select MSM_HAS_DEBUG_UART_HS
help help
Say Y here if you want the debug print routines to direct Say Y here if you want the debug print routines to direct
their output to UART 2. The port must have been initialised their output to the serial port on MSM 8660 devices.
by the boot-loader before use.
The uncompressor code port configuration is now handled config DEBUG_MSM8960_UART
by CONFIG_S3C_LOWLEVEL_UART_PORT. bool "Kernel low-level debugging messages via MSM 8960 UART"
depends on ARCH_MSM8960
select MSM_HAS_DEBUG_UART_HS
help
Say Y here if you want the debug print routines to direct
their output to the serial port on MSM 8960 devices.
config DEBUG_REALVIEW_STD_PORT config DEBUG_REALVIEW_STD_PORT
bool "RealView Default UART" bool "RealView Default UART"
...@@ -255,42 +240,57 @@ choice ...@@ -255,42 +240,57 @@ choice
their output to the standard serial port on the RealView their output to the standard serial port on the RealView
PB1176 platform. PB1176 platform.
config DEBUG_MSM_UART1 config DEBUG_S3C_UART0
bool "Kernel low-level debugging messages via MSM UART1" depends on PLAT_SAMSUNG
depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 bool "Use S3C UART 0 for low-level debug"
help help
Say Y here if you want the debug print routines to direct Say Y here if you want the debug print routines to direct
their output to the first serial port on MSM devices. their output to UART 0. The port must have been initialised
by the boot-loader before use.
config DEBUG_MSM_UART2 The uncompressor code port configuration is now handled
bool "Kernel low-level debugging messages via MSM UART2" by CONFIG_S3C_LOWLEVEL_UART_PORT.
depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
config DEBUG_S3C_UART1
depends on PLAT_SAMSUNG
bool "Use S3C UART 1 for low-level debug"
help help
Say Y here if you want the debug print routines to direct Say Y here if you want the debug print routines to direct
their output to the second serial port on MSM devices. their output to UART 1. The port must have been initialised
by the boot-loader before use.
config DEBUG_MSM_UART3 The uncompressor code port configuration is now handled
bool "Kernel low-level debugging messages via MSM UART3" by CONFIG_S3C_LOWLEVEL_UART_PORT.
depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
config DEBUG_S3C_UART2
depends on PLAT_SAMSUNG
bool "Use S3C UART 2 for low-level debug"
help help
Say Y here if you want the debug print routines to direct Say Y here if you want the debug print routines to direct
their output to the third serial port on MSM devices. their output to UART 2. The port must have been initialised
by the boot-loader before use.
config DEBUG_MSM8660_UART The uncompressor code port configuration is now handled
bool "Kernel low-level debugging messages via MSM 8660 UART" by CONFIG_S3C_LOWLEVEL_UART_PORT.
depends on ARCH_MSM8X60
select MSM_HAS_DEBUG_UART_HS config DEBUG_LL_UART_NONE
bool "No low-level debugging UART"
help help
Say Y here if you want the debug print routines to direct Say Y here if your platform doesn't provide a UART option
their output to the serial port on MSM 8660 devices. below. This relies on your platform choosing the right UART
definition internally in order for low-level debugging to
work.
config DEBUG_MSM8960_UART config DEBUG_ICEDCC
bool "Kernel low-level debugging messages via MSM 8960 UART" bool "Kernel low-level debugging via EmbeddedICE DCC channel"
depends on ARCH_MSM8960
select MSM_HAS_DEBUG_UART_HS
help help
Say Y here if you want the debug print routines to direct Say Y here if you want the debug print routines to direct
their output to the serial port on MSM 8960 devices. their output to the EmbeddedICE macrocell's DCC channel using
co-processor 14. This is known to work on the ARM9 style ICE
channel and on the XScale with the PEEDI.
Note that the system will appear to hang during boot if there
is nothing connected to read from the DCC.
endchoice endchoice
......
arch/arm/include/asm/hardware/entry-macro-iomd.S
View file @ 56c10bf8
...@@ -11,14 +11,6 @@ ...@@ -11,14 +11,6 @@
/* IOC / IOMD based hardware */ /* IOC / IOMD based hardware */
#include <asm/hardware/iomd.h> #include <asm/hardware/iomd.h>
.macro disable_fiq
mov r12, #ioc_base_high
.if ioc_base_low
orr r12, r12, #ioc_base_low
.endif
strb r12, [r12, #0x38] @ Disable FIQ register
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
ldr \tmp, =irq_prio_h ldr \tmp, =irq_prio_h
......
arch/arm/include/asm/system.h
View file @ 56c10bf8
...@@ -110,6 +110,7 @@ extern void cpu_init(void); ...@@ -110,6 +110,7 @@ extern void cpu_init(void);
void soft_restart(unsigned long); void soft_restart(unsigned long);
extern void (*arm_pm_restart)(char str, const char *cmd); extern void (*arm_pm_restart)(char str, const char *cmd);
extern void (*arm_pm_idle)(void);
#define UDBG_UNDEFINED (1 << 0) #define UDBG_UNDEFINED (1 << 0)
#define UDBG_SYSCALL (1 << 1) #define UDBG_SYSCALL (1 << 1)
......
arch/arm/kernel/entry-armv.S
View file @ 56c10bf8
...@@ -19,7 +19,9 @@ ...@@ -19,7 +19,9 @@
#include <asm/glue-df.h> #include <asm/glue-df.h>
#include <asm/glue-pf.h> #include <asm/glue-pf.h>
#include <asm/vfpmacros.h> #include <asm/vfpmacros.h>
#ifndef CONFIG_MULTI_IRQ_HANDLER
#include <mach/entry-macro.S> #include <mach/entry-macro.S>
#endif
#include <asm/thread_notify.h> #include <asm/thread_notify.h>
#include <asm/unwind.h> #include <asm/unwind.h>
#include <asm/unistd.h> #include <asm/unistd.h>
...@@ -1101,7 +1103,6 @@ __stubs_start: ...@@ -1101,7 +1103,6 @@ __stubs_start:
* get out of that mode without clobbering one register. * get out of that mode without clobbering one register.
*/ */
vector_fiq: vector_fiq:
disable_fiq
subs pc, lr, #4 subs pc, lr, #4
/*============================================================================= /*=============================================================================
......
arch/arm/kernel/entry-common.S
View file @ 56c10bf8
...@@ -10,9 +10,15 @@ ...@@ -10,9 +10,15 @@
#include <asm/unistd.h> #include <asm/unistd.h>
#include <asm/ftrace.h> #include <asm/ftrace.h>
#include <mach/entry-macro.S>
#include <asm/unwind.h> #include <asm/unwind.h>
#ifdef CONFIG_NEED_RET_TO_USER
#include <mach/entry-macro.S>
#else
.macro arch_ret_to_user, tmp1, tmp2
.endm
#endif
#include "entry-header.S" #include "entry-header.S"
......
arch/arm/kernel/process.c
View file @ 56c10bf8
...@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void); ...@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void);
static volatile int hlt_counter; static volatile int hlt_counter;
#include <mach/system.h>
void disable_hlt(void) void disable_hlt(void)
{ {
hlt_counter++; hlt_counter++;
...@@ -181,13 +179,17 @@ void cpu_idle_wait(void) ...@@ -181,13 +179,17 @@ void cpu_idle_wait(void)
EXPORT_SYMBOL_GPL(cpu_idle_wait); EXPORT_SYMBOL_GPL(cpu_idle_wait);
/* /*
* This is our default idle handler. We need to disable * This is our default idle handler.
* interrupts here to ensure we don't miss a wakeup call.
*/ */
void (*arm_pm_idle)(void);
static void default_idle(void) static void default_idle(void)
{ {
if (!need_resched()) if (arm_pm_idle)
arch_idle(); arm_pm_idle();
else
cpu_do_idle();
local_irq_enable(); local_irq_enable();
} }
...@@ -215,6 +217,10 @@ void cpu_idle(void) ...@@ -215,6 +217,10 @@ void cpu_idle(void)
cpu_die(); cpu_die();
#endif #endif
/*
* We need to disable interrupts here
* to ensure we don't miss a wakeup call.
*/
local_irq_disable(); local_irq_disable();
#ifdef CONFIG_PL310_ERRATA_769419 #ifdef CONFIG_PL310_ERRATA_769419
wmb(); wmb();
...@@ -222,19 +228,18 @@ void cpu_idle(void) ...@@ -222,19 +228,18 @@ void cpu_idle(void)
if (hlt_counter) { if (hlt_counter) {
local_irq_enable(); local_irq_enable();
cpu_relax(); cpu_relax();
} else { } else if (!need_resched()) {
stop_critical_timings(); stop_critical_timings();
if (cpuidle_idle_call()) if (cpuidle_idle_call())
pm_idle(); pm_idle();
start_critical_timings(); start_critical_timings();
/* /*
* This will eventually be removed - pm_idle * pm_idle functions must always
* functions should always return with IRQs * return with IRQs enabled.
* enabled.
*/ */
WARN_ON(irqs_disabled()); WARN_ON(irqs_disabled());
} else
local_irq_enable(); local_irq_enable();
}
} }
leds_event(led_idle_end); leds_event(led_idle_end);
rcu_idle_exit(); rcu_idle_exit();
......
arch/arm/mach-at91/at91cap9.c
View file @ 56c10bf8
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
...@@ -313,6 +314,12 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = { ...@@ -313,6 +314,12 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
} }
}; };
static void at91cap9_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
/* -------------------------------------------------------------------- /* --------------------------------------------------------------------
* AT91CAP9 processor initialization * AT91CAP9 processor initialization
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
...@@ -332,6 +339,7 @@ static void __init at91cap9_ioremap_registers(void) ...@@ -332,6 +339,7 @@ static void __init at91cap9_ioremap_registers(void)
static void __init at91cap9_initialize(void) static void __init at91cap9_initialize(void)
{ {
arm_pm_idle = at91cap9_idle;
arm_pm_restart = at91sam9g45_restart; arm_pm_restart = at91sam9g45_restart;
at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
......
arch/arm/mach-at91/at91rm9200.c
View file @ 56c10bf8
...@@ -289,6 +289,15 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { ...@@ -289,6 +289,15 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
} }
}; };
static void at91rm9200_idle(void)
{
/*
* Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset.
*/
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
}
static void at91rm9200_restart(char mode, const char *cmd) static void at91rm9200_restart(char mode, const char *cmd)
{ {
/* /*
...@@ -314,6 +323,7 @@ static void __init at91rm9200_ioremap_registers(void) ...@@ -314,6 +323,7 @@ static void __init at91rm9200_ioremap_registers(void)
static void __init at91rm9200_initialize(void) static void __init at91rm9200_initialize(void)
{ {
arm_pm_idle = at91rm9200_idle;
arm_pm_restart = at91rm9200_restart; arm_pm_restart = at91rm9200_restart;
at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
......
arch/arm/mach-at91/at91sam9260.c
View file @ 56c10bf8
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
...@@ -328,8 +329,15 @@ static void __init at91sam9260_ioremap_registers(void) ...@@ -328,8 +329,15 @@ static void __init at91sam9260_ioremap_registers(void)
at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
} }
static void at91sam9260_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
static void __init at91sam9260_initialize(void) static void __init at91sam9260_initialize(void)
{ {
arm_pm_idle = at91sam9260_idle;
arm_pm_restart = at91sam9_alt_restart; arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2); | (1 << AT91SAM9260_ID_IRQ2);
......
arch/arm/mach-at91/at91sam9261.c
View file @ 56c10bf8
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
...@@ -286,8 +287,15 @@ static void __init at91sam9261_ioremap_registers(void) ...@@ -286,8 +287,15 @@ static void __init at91sam9261_ioremap_registers(void)
at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
} }
static void at91sam9261_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
static void __init at91sam9261_initialize(void) static void __init at91sam9261_initialize(void)
{ {
arm_pm_idle = at91sam9261_idle;
arm_pm_restart = at91sam9_alt_restart; arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2); | (1 << AT91SAM9261_ID_IRQ2);
......
arch/arm/mach-at91/at91sam9263.c
View file @ 56c10bf8
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
...@@ -307,8 +308,15 @@ static void __init at91sam9263_ioremap_registers(void) ...@@ -307,8 +308,15 @@ static void __init at91sam9263_ioremap_registers(void)
at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
} }
static void at91sam9263_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
static void __init at91sam9263_initialize(void) static void __init at91sam9263_initialize(void)
{ {
arm_pm_idle = at91sam9263_idle;
arm_pm_restart = at91sam9_alt_restart; arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
......
arch/arm/mach-at91/at91sam9g45.c
View file @ 56c10bf8
...@@ -317,6 +317,12 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { ...@@ -317,6 +317,12 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
} }
}; };
static void at91sam9g45_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
/* -------------------------------------------------------------------- /* --------------------------------------------------------------------
* AT91SAM9G45 processor initialization * AT91SAM9G45 processor initialization
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
...@@ -337,6 +343,7 @@ static void __init at91sam9g45_ioremap_registers(void) ...@@ -337,6 +343,7 @@ static void __init at91sam9g45_ioremap_registers(void)
static void __init at91sam9g45_initialize(void) static void __init at91sam9g45_initialize(void)
{ {
arm_pm_idle = at91sam9g45_idle;
arm_pm_restart = at91sam9g45_restart; arm_pm_restart = at91sam9g45_restart;
at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
......
arch/arm/mach-at91/at91sam9rl.c
View file @ 56c10bf8
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
...@@ -291,8 +292,15 @@ static void __init at91sam9rl_ioremap_registers(void) ...@@ -291,8 +292,15 @@ static void __init at91sam9rl_ioremap_registers(void)
at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
} }
static void at91sam9rl_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
static void __init at91sam9rl_initialize(void) static void __init at91sam9rl_initialize(void)
{ {
arm_pm_idle = at91sam9rl_idle;
arm_pm_restart = at91sam9_alt_restart; arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
......
arch/arm/mach-at91/at91x40.c
View file @ 56c10bf8
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <asm/proc-fns.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <mach/at91x40.h> #include <mach/at91x40.h>
#include <mach/at91_st.h> #include <mach/at91_st.h>
...@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk) ...@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk)
return AT91X40_MASTER_CLOCK; return AT91X40_MASTER_CLOCK;
} }
static void at91x40_idle(void)
{
/*
* Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset.
*/
at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
cpu_do_idle();
}
void __init at91x40_initialize(unsigned long main_clock) void __init at91x40_initialize(unsigned long main_clock)
{ {
arm_pm_idle = at91x40_idle;
at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
| (1 << AT91X40_ID_IRQ2); | (1 << AT91X40_ID_IRQ2);
} }
......
arch/arm/mach-at91/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -13,17 +13,11 @@ ...@@ -13,17 +13,11 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/at91_aic.h> #include <mach/at91_aic.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =at91_aic_base @ base virtual address of AIC peripheral ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
ldr \base, [\base] ldr \base, [\base]
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
......
arch/arm/mach-at91/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-at91/include/mach/system.h
*
* Copyright (C) 2003 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <mach/hardware.h>
#include <mach/at91_st.h>
#include <mach/at91_dbgu.h>
#include <mach/at91_pmc.h>
static inline void arch_idle(void)
{
/*
* Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset.
*/
#ifdef AT91_PS
at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
#else
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
#endif
#ifndef CONFIG_CPU_ARM920T
/*
* Set the processor (CP15) into 'Wait for Interrupt' mode.
* Post-RM9200 processors need this in conjunction with the above
* to save power when idle.
*/
cpu_do_idle();
#endif
}
#endif
arch/arm/mach-bcmring/core.c
View file @ 56c10bf8
...@@ -52,27 +52,8 @@ ...@@ -52,27 +52,8 @@
#include <mach/csp/chipcHw_inline.h> #include <mach/csp/chipcHw_inline.h>
#include <mach/csp/tmrHw_reg.h> #include <mach/csp/tmrHw_reg.h>
#define AMBA_DEVICE(name, initname, base, plat, size) \ static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL);
static struct amba_device name##_device = { \ static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL);
.dev = { \
.coherent_dma_mask = ~0, \
.init_name = initname, \
.platform_data = plat \
}, \
.res = { \
.start = MM_ADDR_IO_##base, \
.end = MM_ADDR_IO_##base + (size) - 1, \
.flags = IORESOURCE_MEM \
}, \
.dma_mask = ~0, \
.irq = { \
IRQ_##base \
} \
}
AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K);
AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K);
static struct clk pll1_clk = { static struct clk pll1_clk = {
.name = "PLL1", .name = "PLL1",
......
arch/arm/mach-bcmring/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -21,9 +21,6 @@ ...@@ -21,9 +21,6 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/csp/mm_io.h> #include <mach/csp/mm_io.h>
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =(MM_IO_BASE_INTC0) ldr \base, =(MM_IO_BASE_INTC0)
ldr \irqstat, [\base, #0] @ get status ldr \irqstat, [\base, #0] @ get status
...@@ -77,6 +74,3 @@ ...@@ -77,6 +74,3 @@
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
arch/arm/mach-bcmring/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
*
* Copyright (C) 1999 ARM Limited
* Copyright (C) 2000 Deep Blue Solutions Ltd
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif
arch/arm/mach-clps711x/common.c
View file @ 56c10bf8
...@@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd) ...@@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd)
{ {
soft_restart(0); soft_restart(0);
} }
static void clps711x_idle(void)
{
clps_writel(1, HALT);
__asm__ __volatile__(
"mov r0, r0\n\
mov r0, r0");
}
static int __init clps711x_idle_init(void)
{
arm_pm_idle = clps711x_idle;
return 0;
}
arch_initcall(clps711x_idle_init);
arch/arm/mach-clps711x/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -10,15 +10,9 @@ ...@@ -10,15 +10,9 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/hardware/clps7111.h> #include <asm/hardware/clps7111.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
#error INTSR stride != INTMR stride #error INTSR stride != INTMR stride
#endif #endif
......
arch/arm/mach-clps711x/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-clps711x/include/mach/system.h
*
* Copyright (C) 2000 Deep Blue Solutions Ltd
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/hardware/clps7111.h>
static inline void arch_idle(void)
{
clps_writel(1, HALT);
__asm__ __volatile__(
"mov r0, r0\n\
mov r0, r0");
}
#endif
arch/arm/mach-cns3xxx/include/mach/entry-macro.S deleted 100644 → 0
View file @ bab2d8c6
/*
* Low-level IRQ helper macros for Cavium Networks platforms
*
* Copyright 2008 Cavium Networks
*
* This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as
* published by the Free Software Foundation.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
arch/arm/mach-cns3xxx/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* Copyright 2000 Deep Blue Solutions Ltd
* Copyright 2003 ARM Limited
* Copyright 2008 Cavium Networks
*
* This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as
* published by the Free Software Foundation.
*/
#ifndef __MACH_SYSTEM_H
#define __MACH_SYSTEM_H
#include <asm/proc-fns.h>
static inline void arch_idle(void)
{
/*
* This should do all the clock switching
* and wait for interrupt tricks
*/
cpu_do_idle();
}
#endif
arch/arm/mach-davinci/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -11,17 +11,11 @@ ...@@ -11,17 +11,11 @@
#include <mach/io.h> #include <mach/io.h>
#include <mach/irqs.h> #include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =davinci_intc_base ldr \base, =davinci_intc_base
ldr \base, [\base] ldr \base, [\base]
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
ldr \tmp, =davinci_intc_type ldr \tmp, =davinci_intc_type
......
arch/arm/mach-davinci/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* DaVinci system defines
*
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <mach/common.h>
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif /* __ASM_ARCH_SYSTEM_H */
arch/arm/mach-dove/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -10,12 +10,6 @@ ...@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE ldr \base, =IRQ_VIRT_BASE
.endm .endm
......
arch/arm/mach-dove/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-dove/include/mach/system.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif
arch/arm/mach-ebsa110/core.c
View file @ 56c10bf8
...@@ -271,8 +271,33 @@ static struct platform_device *ebsa110_devices[] = { ...@@ -271,8 +271,33 @@ static struct platform_device *ebsa110_devices[] = {
&am79c961_device, &am79c961_device,
}; };
/*
* EBSA110 idling methodology:
*
* We can not execute the "wait for interrupt" instruction since that
* will stop our MCLK signal (which provides the clock for the glue
* logic, and therefore the timer interrupt).
*
* Instead, we spin, polling the IRQ_STAT register for the occurrence
* of any interrupt with core clock down to the memory clock.
*/
static void ebsa110_idle(void)
{
const char *irq_stat = (char *)0xff000000;
/* disable clock switching */
asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
/* wait for an interrupt to occur */
while (!*irq_stat);
/* enable clock switching */
asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
}
static int __init ebsa110_init(void) static int __init ebsa110_init(void)
{ {
arm_pm_idle = ebsa110_idle;
return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices));
} }
......
arch/arm/mach-ebsa110/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -12,16 +12,10 @@ ...@@ -12,16 +12,10 @@
#define IRQ_STAT 0xff000000 /* read */ #define IRQ_STAT 0xff000000 /* read */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mov \base, #IRQ_STAT mov \base, #IRQ_STAT
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, stat, base, tmp .macro get_irqnr_and_base, irqnr, stat, base, tmp
ldrb \stat, [\base] @ get interrupts ldrb \stat, [\base] @ get interrupts
mov \irqnr, #0 mov \irqnr, #0
......
arch/arm/mach-ebsa110/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-ebsa110/include/mach/system.h
*
* Copyright (C) 1996-2000 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
/*
* EBSA110 idling methodology:
*
* We can not execute the "wait for interrupt" instruction since that
* will stop our MCLK signal (which provides the clock for the glue
* logic, and therefore the timer interrupt).
*
* Instead, we spin, polling the IRQ_STAT register for the occurrence
* of any interrupt with core clock down to the memory clock.
*/
static inline void arch_idle(void)
{
const char *irq_stat = (char *)0xff000000;
/* disable clock switching */
asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
/* wait for an interrupt to occur */
while (!*irq_stat);
/* enable clock switching */
asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
}
#endif
arch/arm/mach-ep93xx/core.c
View file @ 56c10bf8
...@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = { ...@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = {
.set_mctrl = ep93xx_uart_set_mctrl, .set_mctrl = ep93xx_uart_set_mctrl,
}; };
static struct amba_device uart1_device = { static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
.dev = { { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
.init_name = "apb:uart1",
.platform_data = &ep93xx_uart_data,
},
.res = {
.start = EP93XX_UART1_PHYS_BASE,
.end = EP93XX_UART1_PHYS_BASE + 0x0fff,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_EP93XX_UART1, NO_IRQ },
.periphid = 0x00041010,
};
static struct amba_device uart2_device = {
.dev = {
.init_name = "apb:uart2",
.platform_data = &ep93xx_uart_data,
},
.res = {
.start = EP93XX_UART2_PHYS_BASE,
.end = EP93XX_UART2_PHYS_BASE + 0x0fff,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_EP93XX_UART2, NO_IRQ },
.periphid = 0x00041010,
};
static struct amba_device uart3_device = { static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
.dev = { { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
.init_name = "apb:uart3",
.platform_data = &ep93xx_uart_data,
},
.res = {
.start = EP93XX_UART3_PHYS_BASE,
.end = EP93XX_UART3_PHYS_BASE + 0x0fff,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_EP93XX_UART3, NO_IRQ },
.periphid = 0x00041010,
};
static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
{ IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
static struct resource ep93xx_rtc_resource[] = { static struct resource ep93xx_rtc_resource[] = {
{ {
......
arch/arm/mach-ep93xx/include/mach/entry-macro.S deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-ep93xx/include/mach/entry-macro.S
* IRQ demultiplexing for EP93xx
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
arch/arm/mach-ep93xx/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-ep93xx/include/mach/system.h
*/
static inline void arch_idle(void)
{
cpu_do_idle();
}
arch/arm/mach-exynos/common.c
View file @ 56c10bf8
...@@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = { ...@@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
}, },
}; };
static void exynos_idle(void)
{
if (!need_resched())
cpu_do_idle();
local_irq_enable();
}
void exynos4_restart(char mode, const char *cmd) void exynos4_restart(char mode, const char *cmd)
{ {
__raw_writel(0x1, S5P_SWRESET); __raw_writel(0x1, S5P_SWRESET);
...@@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init); ...@@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init);
int __init exynos_init(void) int __init exynos_init(void)
{ {
printk(KERN_INFO "EXYNOS: Initializing architecture\n"); printk(KERN_INFO "EXYNOS: Initializing architecture\n");
/* set idle function */
pm_idle = exynos_idle;
return device_register(&exynos4_dev); return device_register(&exynos4_dev);
} }
......
arch/arm/mach-exynos/dma.c
View file @ 56c10bf8
...@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = { ...@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = {
.peri_id = pdma0_peri, .peri_id = pdma0_peri,
}; };
struct amba_device exynos4_device_pdma0 = { AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0,
.dev = { {IRQ_PDMA0}, &exynos4_pdma0_pdata);
.init_name = "dma-pl330.0",
.dma_mask = &dma_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &exynos4_pdma0_pdata,
},
.res = {
.start = EXYNOS4_PA_PDMA0,
.end = EXYNOS4_PA_PDMA0 + SZ_4K,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_PDMA0, NO_IRQ},
.periphid = 0x00041330,
};
u8 pdma1_peri[] = { u8 pdma1_peri[] = {
DMACH_PCM0_RX, DMACH_PCM0_RX,
...@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = { ...@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = {
.peri_id = pdma1_peri, .peri_id = pdma1_peri,
}; };
struct amba_device exynos4_device_pdma1 = { AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1,
.dev = { {IRQ_PDMA1}, &exynos4_pdma1_pdata);
.init_name = "dma-pl330.1",
.dma_mask = &dma_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &exynos4_pdma1_pdata,
},
.res = {
.start = EXYNOS4_PA_PDMA1,
.end = EXYNOS4_PA_PDMA1 + SZ_4K,
.flags = IORESOURCE_MEM,
},
.irq = {IRQ_PDMA1, NO_IRQ},
.periphid = 0x00041330,
};
static int __init exynos4_dma_init(void) static int __init exynos4_dma_init(void)
{ {
...@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void) ...@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void)
dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
amba_device_register(&exynos4_device_pdma0, &iomem_resource); amba_device_register(&exynos4_pdma0_device, &iomem_resource);
dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
amba_device_register(&exynos4_device_pdma1, &iomem_resource); amba_device_register(&exynos4_pdma1_device, &iomem_resource);
return 0; return 0;
} }
......
arch/arm/mach-exynos/include/mach/entry-macro.S deleted 100644 → 0
View file @ bab2d8c6
/* arch/arm/mach-exynos4/include/mach/entry-macro.S
*
* Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for EXYNOS4 platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
arch/arm/mach-exynos/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/* linux/arch/arm/mach-exynos4/include/mach/system.h
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* EXYNOS4 - system support header
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H __FILE__
static void arch_idle(void)
{
/* nothing here yet */
}
#endif /* __ASM_ARCH_SYSTEM_H */
arch/arm/mach-footbridge/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -14,9 +14,6 @@ ...@@ -14,9 +14,6 @@
.equ dc21285_high, ARMCSR_BASE & 0xff000000 .equ dc21285_high, ARMCSR_BASE & 0xff000000
.equ dc21285_low, ARMCSR_BASE & 0x00ffffff .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mov \base, #dc21285_high mov \base, #dc21285_high
.if dc21285_low .if dc21285_low
...@@ -24,9 +21,6 @@ ...@@ -24,9 +21,6 @@
.endif .endif
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, [\base, #0x180] @ get interrupts ldr \irqstat, [\base, #0x180] @ get interrupts
......
arch/arm/mach-footbridge/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-footbridge/include/mach/system.h
*
* Copyright (C) 1996-1999 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
static inline void arch_idle(void)
{
cpu_do_idle();
}
arch/arm/mach-gemini/Makefile
View file @ 56c10bf8
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
# Object file lists. # Object file lists.
obj-y := irq.o mm.o time.o devices.o gpio.o obj-y := irq.o mm.o time.o devices.o gpio.o idle.o
# Board-specific support # Board-specific support
obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o
......
arch/arm/mach-gemini/idle.c 0 → 100644
View file @ 56c10bf8
/*
* arch/arm/mach-gemini/idle.c
*/
#include <linux/init.h>
#include <asm/system.h>
#include <asm/proc-fns.h>
static void gemini_idle(void)
{
/*
* Because of broken hardware we have to enable interrupts or the CPU
* will never wakeup... Acctualy it is not very good to enable
* interrupts first since scheduler can miss a tick, but there is
* no other way around this. Platforms that needs it for power saving
* should call enable_hlt() in init code, since by default it is
* disabled.
*/
local_irq_enable();
cpu_do_idle();
}
static int __init gemini_idle_init(void)
{
arm_pm_idle = gemini_idle;
return 0;
}
arch_initcall(gemini_idle_init);
arch/arm/mach-gemini/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -12,15 +12,9 @@ ...@@ -12,15 +12,9 @@
#define IRQ_STATUS 0x14 #define IRQ_STATUS 0x14
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS)
ldr \irqnr, [\irqstat] ldr \irqnr, [\irqstat]
......
arch/arm/mach-gemini/include/mach/system.h
View file @ 56c10bf8
...@@ -14,20 +14,6 @@ ...@@ -14,20 +14,6 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/global_reg.h> #include <mach/global_reg.h>
static inline void arch_idle(void)
{
/*
* Because of broken hardware we have to enable interrupts or the CPU
* will never wakeup... Acctualy it is not very good to enable
* interrupts here since scheduler can miss a tick, but there is
* no other way around this. Platforms that needs it for power saving
* should call enable_hlt() in init code, since by default it is
* disabled.
*/
local_irq_enable();
cpu_do_idle();
}
static inline void arch_reset(char mode, const char *cmd) static inline void arch_reset(char mode, const char *cmd)
{ {
__raw_writel(RESET_GLOBAL | RESET_CPU1, __raw_writel(RESET_GLOBAL | RESET_CPU1,
......
arch/arm/mach-gemini/irq.c
View file @ 56c10bf8
...@@ -73,8 +73,8 @@ void __init gemini_init_irq(void) ...@@ -73,8 +73,8 @@ void __init gemini_init_irq(void)
unsigned int i, mode = 0, level = 0; unsigned int i, mode = 0, level = 0;
/* /*
* Disable arch_idle() by default since it is buggy * Disable the idle handler by default since it is buggy
* For more info see arch/arm/mach-gemini/include/mach/system.h * For more info see arch/arm/mach-gemini/idle.c
*/ */
disable_hlt(); disable_hlt();
......
arch/arm/mach-h720x/common.c
View file @ 56c10bf8
...@@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd) ...@@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd)
{ {
CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
} }
static void h720x__idle(void)
{
CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
nop();
nop();
CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
nop();
nop();
}
static int __init h720x_idle_init(void)
{
arm_pm_idle = h720x__idle;
return 0;
}
arch_initcall(h720x_idle_init);
arch/arm/mach-h720x/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -8,15 +8,9 @@ ...@@ -8,15 +8,9 @@
* warranty of any kind, whether express or implied. * warranty of any kind, whether express or implied.
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
#if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202)
@ we could use the id register on H7202, but this is not @ we could use the id register on H7202, but this is not
......
arch/arm/mach-h720x/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-h720x/include/mach/system.h
*
* Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* arch/arm/mach-h720x/include/mach/system.h
*
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <mach/hardware.h>
static void arch_idle(void)
{
CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
nop();
nop();
CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
nop();
nop();
}
#endif
arch/arm/mach-highbank/include/mach/entry-macro.S deleted 100644 → 0
View file @ bab2d8c6
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
arch/arm/mach-highbank/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* Copyright 2010-2011 Calxeda, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __MACH_SYSTEM_H
#define __MACH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif
arch/arm/mach-imx/mm-imx3.c
View file @ 56c10bf8
...@@ -34,31 +34,29 @@ static void imx3_idle(void) ...@@ -34,31 +34,29 @@ static void imx3_idle(void)
{ {
unsigned long reg = 0; unsigned long reg = 0;
if (!need_resched()) __asm__ __volatile__(
__asm__ __volatile__( /* disable I and D cache */
/* disable I and D cache */ "mrc p15, 0, %0, c1, c0, 0\n"
"mrc p15, 0, %0, c1, c0, 0\n" "bic %0, %0, #0x00001000\n"
"bic %0, %0, #0x00001000\n" "bic %0, %0, #0x00000004\n"
"bic %0, %0, #0x00000004\n" "mcr p15, 0, %0, c1, c0, 0\n"
"mcr p15, 0, %0, c1, c0, 0\n" /* invalidate I cache */
/* invalidate I cache */ "mov %0, #0\n"
"mov %0, #0\n" "mcr p15, 0, %0, c7, c5, 0\n"
"mcr p15, 0, %0, c7, c5, 0\n" /* clear and invalidate D cache */
/* clear and invalidate D cache */ "mov %0, #0\n"
"mov %0, #0\n" "mcr p15, 0, %0, c7, c14, 0\n"
"mcr p15, 0, %0, c7, c14, 0\n" /* WFI */
/* WFI */ "mov %0, #0\n"
"mov %0, #0\n" "mcr p15, 0, %0, c7, c0, 4\n"
"mcr p15, 0, %0, c7, c0, 4\n" "nop\n" "nop\n" "nop\n" "nop\n"
"nop\n" "nop\n" "nop\n" "nop\n" "nop\n" "nop\n" "nop\n"
"nop\n" "nop\n" "nop\n" /* enable I and D cache */
/* enable I and D cache */ "mrc p15, 0, %0, c1, c0, 0\n"
"mrc p15, 0, %0, c1, c0, 0\n" "orr %0, %0, #0x00001000\n"
"orr %0, %0, #0x00001000\n" "orr %0, %0, #0x00000004\n"
"orr %0, %0, #0x00000004\n" "mcr p15, 0, %0, c1, c0, 0\n"
"mcr p15, 0, %0, c1, c0, 0\n" : "=r" (reg));
: "=r" (reg));
local_irq_enable();
} }
static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
...@@ -134,8 +132,8 @@ void __init imx31_init_early(void) ...@@ -134,8 +132,8 @@ void __init imx31_init_early(void)
{ {
mxc_set_cpu_type(MXC_CPU_MX31); mxc_set_cpu_type(MXC_CPU_MX31);
mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
pm_idle = imx3_idle;
imx_ioremap = imx3_ioremap; imx_ioremap = imx3_ioremap;
arm_pm_idle = imx3_idle;
} }
void __init mx31_init_irq(void) void __init mx31_init_irq(void)
...@@ -203,7 +201,7 @@ void __init imx35_init_early(void) ...@@ -203,7 +201,7 @@ void __init imx35_init_early(void)
mxc_set_cpu_type(MXC_CPU_MX35); mxc_set_cpu_type(MXC_CPU_MX35);
mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
pm_idle = imx3_idle; arm_pm_idle = imx3_idle;
imx_ioremap = imx3_ioremap; imx_ioremap = imx3_ioremap;
} }
......
arch/arm/mach-imx/mm-imx5.c
View file @ 56c10bf8
...@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk; ...@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk;
static void imx5_idle(void) static void imx5_idle(void)
{ {
if (!need_resched()) { /* gpc clock is needed for SRPG */
/* gpc clock is needed for SRPG */ if (gpc_dvfs_clk == NULL) {
if (gpc_dvfs_clk == NULL) { gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); if (IS_ERR(gpc_dvfs_clk))
if (IS_ERR(gpc_dvfs_clk)) return;
goto err0;
}
clk_enable(gpc_dvfs_clk);
mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
if (tzic_enable_wake())
goto err1;
cpu_do_idle();
err1:
clk_disable(gpc_dvfs_clk);
} }
err0: clk_enable(gpc_dvfs_clk);
local_irq_enable(); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
if (tzic_enable_wake() != 0)
cpu_do_idle();
clk_disable(gpc_dvfs_clk);
} }
/* /*
...@@ -108,7 +102,7 @@ void __init imx51_init_early(void) ...@@ -108,7 +102,7 @@ void __init imx51_init_early(void)
mxc_set_cpu_type(MXC_CPU_MX51); mxc_set_cpu_type(MXC_CPU_MX51);
mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
pm_idle = imx5_idle; arm_pm_idle = imx5_idle;
} }
void __init imx53_init_early(void) void __init imx53_init_early(void)
......
arch/arm/mach-imx/pm-imx27.c
View file @ 56c10bf8
...@@ -10,7 +10,6 @@ ...@@ -10,7 +10,6 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/suspend.h> #include <linux/suspend.h>
#include <linux/io.h> #include <linux/io.h>
#include <mach/system.h>
#include <mach/hardware.h> #include <mach/hardware.h>
static int mx27_suspend_enter(suspend_state_t state) static int mx27_suspend_enter(suspend_state_t state)
...@@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state) ...@@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state)
cscr &= 0xFFFFFFFC; cscr &= 0xFFFFFFFC;
__raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
/* Executes WFI */ /* Executes WFI */
arch_idle(); cpu_do_idle();
break; break;
default: default:
......
arch/arm/mach-integrator/core.c
View file @ 56c10bf8
...@@ -35,67 +35,23 @@ ...@@ -35,67 +35,23 @@
static struct amba_pl010_data integrator_uart_data; static struct amba_pl010_data integrator_uart_data;
static struct amba_device rtc_device = { #define INTEGRATOR_RTC_IRQ { IRQ_RTCINT }
.dev = { #define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 }
.init_name = "mb:15", #define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 }
}, #define KMI0_IRQ { IRQ_KMIINT0 }
.res = { #define KMI1_IRQ { IRQ_KMIINT1 }
.start = INTEGRATOR_RTC_BASE,
.end = INTEGRATOR_RTC_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_RTCINT, NO_IRQ },
};
static struct amba_device uart0_device = { static AMBA_APB_DEVICE(rtc, "mb:15", 0,
.dev = { INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
.init_name = "mb:16",
.platform_data = &integrator_uart_data,
},
.res = {
.start = INTEGRATOR_UART0_BASE,
.end = INTEGRATOR_UART0_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_UARTINT0, NO_IRQ },
};
static struct amba_device uart1_device = { static AMBA_APB_DEVICE(uart0, "mb:16", 0,
.dev = { INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
.init_name = "mb:17",
.platform_data = &integrator_uart_data,
},
.res = {
.start = INTEGRATOR_UART1_BASE,
.end = INTEGRATOR_UART1_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_UARTINT1, NO_IRQ },
};
static struct amba_device kmi0_device = { static AMBA_APB_DEVICE(uart1, "mb:17", 0,
.dev = { INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
.init_name = "mb:18",
},
.res = {
.start = KMI0_BASE,
.end = KMI0_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_KMIINT0, NO_IRQ },
};
static struct amba_device kmi1_device = { static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL);
.dev = { static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL);
.init_name = "mb:19",
},
.res = {
.start = KMI1_BASE,
.end = KMI1_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_KMIINT1, NO_IRQ },
};
static struct amba_device *amba_devs[] __initdata = { static struct amba_device *amba_devs[] __initdata = {
&rtc_device, &rtc_device,
......
arch/arm/mach-integrator/impd1.c
View file @ 56c10bf8
...@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev) ...@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev)
pc_base = dev->resource.start + idev->offset; pc_base = dev->resource.start + idev->offset;
d = kzalloc(sizeof(struct amba_device), GFP_KERNEL); d = amba_device_alloc(NULL, pc_base, SZ_4K);
if (!d) if (!d)
continue; continue;
dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12);
d->dev.parent = &dev->dev; d->dev.parent = &dev->dev;
d->res.start = dev->resource.start + idev->offset;
d->res.end = d->res.start + SZ_4K - 1;
d->res.flags = IORESOURCE_MEM;
d->irq[0] = dev->irq; d->irq[0] = dev->irq;
d->irq[1] = dev->irq; d->irq[1] = dev->irq;
d->periphid = idev->id; d->periphid = idev->id;
d->dev.platform_data = idev->platform_data; d->dev.platform_data = idev->platform_data;
ret = amba_device_register(d, &dev->resource); ret = amba_device_add(d, &dev->resource);
if (ret) { if (ret) {
dev_err(&d->dev, "unable to register device: %d\n", ret); dev_err(&d->dev, "unable to register device: %d\n", ret);
kfree(d); amba_device_put(d);
} }
} }
......
arch/arm/mach-integrator/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -11,15 +11,9 @@ ...@@ -11,15 +11,9 @@
#include <mach/platform.h> #include <mach/platform.h>
#include <mach/irqs.h> #include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
/* FIXME: should not be using soo many LDRs here */ /* FIXME: should not be using soo many LDRs here */
ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
......
arch/arm/mach-integrator/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-integrator/include/mach/system.h
*
* Copyright (C) 1999 ARM Limited
* Copyright (C) 2000 Deep Blue Solutions Ltd
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
/*
* This should do all the clock switching
* and wait for interrupt tricks
*/
cpu_do_idle();
}
#endif
arch/arm/mach-integrator/integrator_cp.c
View file @ 56c10bf8
...@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = { ...@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = {
.gpio_cd = -1, .gpio_cd = -1,
}; };
static struct amba_device mmc_device = { #define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
.dev = { #define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
.init_name = "mb:1c",
.platform_data = &mmc_data,
},
.res = {
.start = INTEGRATOR_CP_MMC_BASE,
.end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 },
.periphid = 0,
};
static struct amba_device aaci_device = { static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE,
.dev = { INTEGRATOR_CP_MMC_IRQS, &mmc_data);
.init_name = "mb:1d",
}, static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE,
.res = { INTEGRATOR_CP_AACI_IRQS, NULL);
.start = INTEGRATOR_CP_AACI_BASE,
.end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_CP_AACIINT, NO_IRQ },
.periphid = 0,
};
/* /*
...@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = { ...@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = {
.remove = versatile_clcd_remove_dma, .remove = versatile_clcd_remove_dma,
}; };
static struct amba_device clcd_device = { static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE,
.dev = { { IRQ_CP_CLCDCINT }, &clcd_data);
.init_name = "mb:c0",
.coherent_dma_mask = ~0,
.platform_data = &clcd_data,
},
.res = {
.start = INTCP_PA_CLCD_BASE,
.end = INTCP_PA_CLCD_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.dma_mask = ~0,
.irq = { IRQ_CP_CLCDCINT, NO_IRQ },
.periphid = 0,
};
static struct amba_device *amba_devs[] __initdata = { static struct amba_device *amba_devs[] __initdata = {
&mmc_device, &mmc_device,
......
arch/arm/mach-iop13xx/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -16,9 +16,6 @@ ...@@ -16,9 +16,6 @@
* Place - Suite 330, Boston, MA 02111-1307 USA. * Place - Suite 330, Boston, MA 02111-1307 USA.
* *
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c15, c1, 0 mrc p15, 0, \tmp, c15, c1, 0
orr \tmp, \tmp, #(1 << 6) orr \tmp, \tmp, #(1 << 6)
......
arch/arm/mach-iop13xx/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-iop13xx/include/mach/system.h
*
* Copyright (C) 2004 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
static inline void arch_idle(void)
{
cpu_do_idle();
}
arch/arm/mach-iop32x/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -9,9 +9,6 @@ ...@@ -9,9 +9,6 @@
*/ */
#include <mach/iop32x.h> #include <mach/iop32x.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c15, c1, 0 mrc p15, 0, \tmp, c15, c1, 0
orr \tmp, \tmp, #(1 << 6) orr \tmp, \tmp, #(1 << 6)
......
arch/arm/mach-iop32x/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-iop32x/include/mach/system.h
*
* Copyright (C) 2001 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
static inline void arch_idle(void)
{
cpu_do_idle();
}
arch/arm/mach-iop33x/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -9,9 +9,6 @@ ...@@ -9,9 +9,6 @@
*/ */
#include <mach/iop33x.h> #include <mach/iop33x.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c15, c1, 0 mrc p15, 0, \tmp, c15, c1, 0
orr \tmp, \tmp, #(1 << 6) orr \tmp, \tmp, #(1 << 6)
......
arch/arm/mach-iop33x/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-iop33x/include/mach/system.h
*
* Copyright (C) 2001 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
static inline void arch_idle(void)
{
cpu_do_idle();
}
arch/arm/mach-ixp2000/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -9,15 +9,9 @@ ...@@ -9,15 +9,9 @@
*/ */
#include <mach/irqs.h> #include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqnr, #0x0 @clear out irqnr as default mov \irqnr, #0x0 @clear out irqnr as default
......
arch/arm/mach-ixp2000/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-ixp2000/include/mach/system.h
*
* Copyright (C) 2002 Intel Corp.
* Copyricht (C) 2003-2005 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
static inline void arch_idle(void)
{
cpu_do_idle();
}
arch/arm/mach-ixp23xx/core.c
View file @ 56c10bf8
...@@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = { ...@@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = {
void __init ixp23xx_sys_init(void) void __init ixp23xx_sys_init(void)
{ {
/* by default, the idle code is disabled */
disable_hlt();
*IXP23XX_EXP_UNIT_FUSE |= 0xf; *IXP23XX_EXP_UNIT_FUSE |= 0xf;
platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
} }
......
arch/arm/mach-ixp23xx/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -2,15 +2,9 @@ ...@@ -2,15 +2,9 @@
* arch/arm/mach-ixp23xx/include/mach/entry-macro.S * arch/arm/mach-ixp23xx/include/mach/entry-macro.S
*/ */
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
ldr \irqnr, [\irqnr] @ get interrupt number ldr \irqnr, [\irqnr] @ get interrupt number
......
arch/arm/mach-ixp23xx/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-ixp23xx/include/mach/system.h
*
* Copyright (C) 2003 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
static inline void arch_idle(void)
{
#if 0
if (!hlt_counter)
cpu_do_idle();
#endif
}
arch/arm/mach-ixp4xx/common.c
View file @ 56c10bf8
...@@ -236,6 +236,12 @@ void __init ixp4xx_init_irq(void) ...@@ -236,6 +236,12 @@ void __init ixp4xx_init_irq(void)
{ {
int i = 0; int i = 0;
/*
* ixp4xx does not implement the XScale PWRMODE register
* so it must not call cpu_do_idle().
*/
disable_hlt();
/* Route all sources to IRQ instead of FIQ */ /* Route all sources to IRQ instead of FIQ */
*IXP4XX_ICLR = 0x0; *IXP4XX_ICLR = 0x0;
......
arch/arm/mach-ixp4xx/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -9,15 +9,9 @@ ...@@ -9,15 +9,9 @@
*/ */
#include <mach/hardware.h> #include <mach/hardware.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
ldr \irqstat, [\irqstat] @ get interrupts ldr \irqstat, [\irqstat] @ get interrupts
......
arch/arm/mach-ixp4xx/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-ixp4xx/include/mach/system.h
*
* Copyright (C) 2002 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
static inline void arch_idle(void)
{
/* ixp4xx does not implement the XScale PWRMODE register,
* so it must not call cpu_do_idle() here.
*/
#if 0
cpu_do_idle();
#endif
}
arch/arm/mach-kirkwood/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -10,12 +10,6 @@ ...@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE ldr \base, =IRQ_VIRT_BASE
.endm .endm
......
arch/arm/mach-kirkwood/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-kirkwood/include/mach/system.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif
arch/arm/mach-ks8695/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -14,16 +14,10 @@ ...@@ -14,16 +14,10 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/regs-irq.h> #include <mach/regs-irq.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register
......
arch/arm/mach-ks8695/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-s3c2410/include/mach/system.h
*
* Copyright (C) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* KS8695 - System function defines and includes
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static void arch_idle(void)
{
/*
* This should do all the clock switching
* and wait for interrupt tricks,
*/
cpu_do_idle();
}
#endif
arch/arm/mach-lpc32xx/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -21,16 +21,10 @@ ...@@ -21,16 +21,10 @@
#define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE)
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
/* /*
* Return IRQ number in irqnr. Also return processor Z flag status in CPSR * Return IRQ number in irqnr. Also return processor Z flag status in CPSR
* as set if an interrupt is pending. * as set if an interrupt is pending.
......
arch/arm/mach-lpc32xx/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-lpc32xx/include/mach/system.h
*
* Author: Kevin Wells <kevin.wells@nxp.com>
*
* Copyright (C) 2010 NXP Semiconductors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static void arch_idle(void)
{
cpu_do_idle();
}
#endif
arch/arm/mach-lpc32xx/phy3250.c
View file @ 56c10bf8
...@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = { ...@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = {
.remove = lpc32xx_clcd_remove, .remove = lpc32xx_clcd_remove,
}; };
static struct amba_device lpc32xx_clcd_device = { static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0,
.dev = { LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data);
.coherent_dma_mask = ~0,
.init_name = "dev:clcd",
.platform_data = &lpc32xx_clcd_data,
},
.res = {
.start = LPC32XX_LCD_BASE,
.end = (LPC32XX_LCD_BASE + SZ_4K - 1),
.flags = IORESOURCE_MEM,
},
.dma_mask = ~0,
.irq = {IRQ_LPC32XX_LCD, NO_IRQ},
};
/* /*
* AMBA SSP (SPI) * AMBA SSP (SPI)
...@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = { ...@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = {
.enable_dma = 0, .enable_dma = 0,
}; };
static struct amba_device lpc32xx_ssp0_device = { static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0,
.dev = { LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data);
.coherent_dma_mask = ~0,
.init_name = "dev:ssp0",
.platform_data = &lpc32xx_ssp0_data,
},
.res = {
.start = LPC32XX_SSP0_BASE,
.end = (LPC32XX_SSP0_BASE + SZ_4K - 1),
.flags = IORESOURCE_MEM,
},
.dma_mask = ~0,
.irq = {IRQ_LPC32XX_SSP0, NO_IRQ},
};
/* AT25 driver registration */ /* AT25 driver registration */
static int __init phy3250_spi_board_register(void) static int __init phy3250_spi_board_register(void)
......
arch/arm/mach-mmp/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -8,12 +8,6 @@ ...@@ -8,12 +8,6 @@
#include <mach/regs-icu.h> #include <mach/regs-icu.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
mrc p15, 0, \tmp, c0, c0, 0 @ CPUID mrc p15, 0, \tmp, c0, c0, 0 @ CPUID
and \tmp, \tmp, #0xff00 and \tmp, \tmp, #0xff00
......
arch/arm/mach-mmp/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* linux/arch/arm/mach-mmp/include/mach/system.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_MACH_SYSTEM_H
#define __ASM_MACH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif /* __ASM_MACH_SYSTEM_H */
arch/arm/mach-msm/idle.S → arch/arm/mach-msm/idle.c
View file @ 56c10bf8
/* arch/arm/mach-msm/include/mach/idle.S /* arch/arm/mach-msm/idle.c
* *
* Idle processing for MSM7K - work around bugs with SWFI. * Idle processing for MSM7K - work around bugs with SWFI.
* *
* Copyright (c) 2007 QUALCOMM Incorporated. * Copyright (c) 2007 QUALCOMM Incorporated.
* Copyright (C) 2007 Google, Inc. * Copyright (C) 2007 Google, Inc.
* *
* This software is licensed under the terms of the GNU General Public * This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and * License version 2, as published by the Free Software Foundation, and
...@@ -14,23 +14,36 @@ ...@@ -14,23 +14,36 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details. * GNU General Public License for more details.
* *
*/ */
#include <linux/linkage.h>
#include <asm/assembler.h>
ENTRY(arch_idle) #include <linux/init.h>
#include <asm/system.h>
static void msm_idle(void)
{
#ifdef CONFIG_MSM7X00A_IDLE #ifdef CONFIG_MSM7X00A_IDLE
mrc p15, 0, r1, c1, c0, 0 /* read current CR */ asm volatile (
bic r0, r1, #(1 << 2) /* clear dcache bit */
bic r0, r0, #(1 << 12) /* clear icache bit */ "mrc p15, 0, r1, c1, c0, 0 /* read current CR */ \n\t"
mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ "bic r0, r1, #(1 << 2) /* clear dcache bit */ \n\t"
"bic r0, r0, #(1 << 12) /* clear icache bit */ \n\t"
"mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ \n\t"
"mov r0, #0 /* prepare wfi value */ \n\t"
"mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ \n\t"
"mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ \n\t"
"mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ \n\t"
mov r0, #0 /* prepare wfi value */ "mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ \n\t"
mcr p15, 0, r0, c7, c10, 0 /* flush the cache */
mcr p15, 0, r0, c7, c10, 4 /* memory barrier */
mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */
mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ : : : "r0","r1" );
#endif #endif
mov pc, lr }
static int __init msm_idle_init(void)
{
arm_pm_idle = msm_idle;
return 0;
}
arch_initcall(msm_idle_init);
arch/arm/mach-msm/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -16,12 +16,6 @@ ...@@ -16,12 +16,6 @@
* *
*/ */
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
#if !defined(CONFIG_ARM_GIC) #if !defined(CONFIG_ARM_GIC)
#include <mach/msm_iomap.h> #include <mach/msm_iomap.h>
......
arch/arm/mach-msm/include/mach/system.h
View file @ 56c10bf8
...@@ -12,7 +12,6 @@ ...@@ -12,7 +12,6 @@
* GNU General Public License for more details. * GNU General Public License for more details.
* *
*/ */
void arch_idle(void);
/* low level hardware reset hook -- for example, hitting the /* low level hardware reset hook -- for example, hitting the
* PSHOLD line on the PMIC to hard reset the system * PSHOLD line on the PMIC to hard reset the system
......
arch/arm/mach-mv78xx0/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -10,12 +10,6 @@ ...@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE ldr \base, =IRQ_VIRT_BASE
.endm .endm
......
arch/arm/mach-mv78xx0/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-mv78xx0/include/mach/system.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif
arch/arm/mach-mxs/devices.c
View file @ 56c10bf8
...@@ -77,16 +77,18 @@ struct platform_device *__init mxs_add_platform_device_dmamask( ...@@ -77,16 +77,18 @@ struct platform_device *__init mxs_add_platform_device_dmamask(
int __init mxs_add_amba_device(const struct amba_device *dev) int __init mxs_add_amba_device(const struct amba_device *dev)
{ {
struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL); struct amba_device *adev = amba_device_alloc(dev->dev.init_name,
dev->res.start, resource_size(&dev->res));
if (!adev) { if (!adev) {
pr_err("%s: failed to allocate memory", __func__); pr_err("%s: failed to allocate memory", __func__);
return -ENOMEM; return -ENOMEM;
} }
*adev = *dev; adev->irq[0] = dev->irq[0];
adev->irq[1] = dev->irq[1];
return amba_device_register(adev, &iomem_resource); return amba_device_add(adev, &iomem_resource);
} }
struct device mxs_apbh_bus = { struct device mxs_apbh_bus = {
......
arch/arm/mach-mxs/devices/amba-duart.c
View file @ 56c10bf8
...@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \ ...@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \
.end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \
.flags = IORESOURCE_MEM, \ .flags = IORESOURCE_MEM, \
}, \ }, \
.irq = {soc ## _INT_DUART, NO_IRQ}, \ .irq = {soc ## _INT_DUART}, \
} }
#ifdef CONFIG_SOC_IMX23 #ifdef CONFIG_SOC_IMX23
......
arch/arm/mach-mxs/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -23,9 +23,6 @@ ...@@ -23,9 +23,6 @@
#define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR)
#define HW_ICOLL_STAT_OFFSET 0x70 #define HW_ICOLL_STAT_OFFSET 0x70
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET]
cmp \irqnr, #0x7F cmp \irqnr, #0x7F
...@@ -36,6 +33,3 @@ ...@@ -36,6 +33,3 @@
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =MXS_ICOLL_VBASE ldr \base, =MXS_ICOLL_VBASE
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
arch/arm/mach-mxs/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* Copyright (C) 1999 ARM Limited
* Copyright (C) 2000 Deep Blue Solutions Ltd
* Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __MACH_MXS_SYSTEM_H__
#define __MACH_MXS_SYSTEM_H__
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif /* __MACH_MXS_SYSTEM_H__ */
arch/arm/mach-mxs/pm.c
View file @ 56c10bf8
...@@ -15,13 +15,12 @@ ...@@ -15,13 +15,12 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/suspend.h> #include <linux/suspend.h>
#include <linux/io.h> #include <linux/io.h>
#include <mach/system.h>
static int mxs_suspend_enter(suspend_state_t state) static int mxs_suspend_enter(suspend_state_t state)
{ {
switch (state) { switch (state) {
case PM_SUSPEND_MEM: case PM_SUSPEND_MEM:
arch_idle(); cpu_do_idle();
break; break;
default: default:
......
arch/arm/mach-netx/fb.c
View file @ 56c10bf8
...@@ -92,18 +92,7 @@ void clk_put(struct clk *clk) ...@@ -92,18 +92,7 @@ void clk_put(struct clk *clk)
{ {
} }
static struct amba_device fb_device = { static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL);
.dev = {
.init_name = "fb",
.coherent_dma_mask = ~0,
},
.res = {
.start = 0x00104000,
.end = 0x00104fff,
.flags = IORESOURCE_MEM,
},
.irq = { NETX_IRQ_LCD, NO_IRQ },
};
int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel)
{ {
......
arch/arm/mach-netx/include/mach/entry-macro.S deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-netx/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for Hilscher netX based platforms
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
arch/arm/mach-netx/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* arch/arm/mach-netx/include/mach/system.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif
arch/arm/mach-nomadik/board-nhk8815.c
View file @ 56c10bf8
...@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void) ...@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void)
#endif #endif
} }
#define __MEM_4K_RESOURCE(x) \ static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE,
.res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} { IRQ_UART0 }, NULL);
static struct amba_device uart0_device = { static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE,
.dev = { .init_name = "uart0" }, { IRQ_UART1 }, NULL);
__MEM_4K_RESOURCE(NOMADIK_UART0_BASE),
.irq = {IRQ_UART0, NO_IRQ},
};
static struct amba_device uart1_device = {
.dev = { .init_name = "uart1" },
__MEM_4K_RESOURCE(NOMADIK_UART1_BASE),
.irq = {IRQ_UART1, NO_IRQ},
};
static struct amba_device *amba_devs[] __initdata = { static struct amba_device *amba_devs[] __initdata = {
&uart0_device, &uart0_device,
......
arch/arm/mach-nomadik/cpu-8815.c
View file @ 56c10bf8
...@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = { ...@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = {
GPIO_DEVICE(3), GPIO_DEVICE(3),
}; };
static struct amba_device cpu8815_amba_rng = { static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL);
.dev = {
.init_name = "rng",
},
__MEM_4K_RESOURCE(NOMADIK_RNG_BASE),
};
static struct platform_device *platform_devs[] __initdata = { static struct platform_device *platform_devs[] __initdata = {
cpu8815_platform_gpio + 0, cpu8815_platform_gpio + 0,
...@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = { ...@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = {
}; };
static struct amba_device *amba_devs[] __initdata = { static struct amba_device *amba_devs[] __initdata = {
&cpu8815_amba_rng &cpu8815_amba_rng_device
}; };
static int __init cpu8815_init(void) static int __init cpu8815_init(void)
......
arch/arm/mach-nomadik/include/mach/entry-macro.S deleted 100644 → 0
View file @ bab2d8c6
/*
* Low-level IRQ helper macros for Nomadik platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
.macro disable_fiq
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
arch/arm/mach-nomadik/include/mach/system.h deleted 100644 → 0
View file @ bab2d8c6
/*
* mach-nomadik/include/mach/system.h
*
* Copyright (C) 2008 STMicroelectronics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
/*
* This should do all the clock switching
* and wait for interrupt tricks
*/
cpu_do_idle();
}
#endif
arch/arm/mach-omap1/include/mach/entry-macro.S
View file @ 56c10bf8
...@@ -14,15 +14,9 @@ ...@@ -14,15 +14,9 @@
#include <mach/irqs.h> #include <mach/irqs.h>
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
......
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