Commit 56fbeefe authored by Eugeniy Paltsev's avatar Eugeniy Paltsev Committed by Stephen Boyd

CLK: HSDK: CGU: add support for 148.5MHz clock

Add support for 148.5MHz clock for HDMI PLL
Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Link: https://lkml.kernel.org/r/20200311134115.13257-4-Eugeniy.Paltsev@synopsys.comSigned-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 423f042a
...@@ -81,6 +81,7 @@ static const struct hsdk_pll_cfg asdt_pll_cfg[] = { ...@@ -81,6 +81,7 @@ static const struct hsdk_pll_cfg asdt_pll_cfg[] = {
static const struct hsdk_pll_cfg hdmi_pll_cfg[] = { static const struct hsdk_pll_cfg hdmi_pll_cfg[] = {
{ 27000000, 0, 0, 0, 0, 1 }, { 27000000, 0, 0, 0, 0, 1 },
{ 148500000, 0, 21, 3, 0, 0 },
{ 297000000, 0, 21, 2, 0, 0 }, { 297000000, 0, 21, 2, 0, 0 },
{ 540000000, 0, 19, 1, 0, 0 }, { 540000000, 0, 19, 1, 0, 0 },
{ 594000000, 0, 21, 1, 0, 0 }, { 594000000, 0, 21, 1, 0, 0 },
......
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