MIPS: VR5500: Enable prefetch

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: VR5500: Enable prefetch
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
5864810b · Shinya Kuribayashi · Ralf Baechle · d7001198 · 5864810b
Commit 5864810b authored Mar 18, 2009 by Shinya Kuribayashi Committed by Ralf Baechle Mar 23, 2009
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arch/mips/mm/c-r4k.c arch/mips/mm/c-r4k.c +1 -1

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--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void)
 		c->dcache.ways = 2;
 		c->dcache.waybit = 0;

-		c->options |= MIPS_CPU_CACHE_CDEX_P;
+		c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
 		break;

 	case CPU_TX49XX: