Commit 58a0f23f authored by Pratyush Anand's avatar Pratyush Anand Committed by Felipe Balbi

USB: DWC3: Issue device soft reset before core soft reset

Synopsys specification clearly states under section "Device Power-On or
Soft Reset" that DCTL.CSftRst=1 should be first step.  So, just follow
what specification says.
Signed-off-by: default avatarPratyush Anand <pratyush.anand@st.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 45627ac6
......@@ -335,8 +335,6 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
}
dwc->revision = reg;
dwc3_core_soft_reset(dwc);
/* issue device SoftReset too */
timeout = jiffies + msecs_to_jiffies(500);
dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
......@@ -354,6 +352,8 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
cpu_relax();
} while (true);
dwc3_core_soft_reset(dwc);
dwc3_cache_hwparams(dwc);
reg = dwc3_readl(dwc->regs, DWC3_GCTL);
......
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