Commit 5cb1ac0f authored by Olof Johansson's avatar Olof Johansson

Merge tag 'arm-soc/for-4.12/devicetree-fixes' of http://github.com/Broadcom/stblinux into fixes

This pull request contains Broadcom ARM-based SoC Device Tree fixes for
4.12, please pull the following:

- Baruch provides several fixes for the Raspberry Pi (BCM2835) Device
  Tree source include file: uart0 pinctrl node names, pin number for
  i2c0, uart0 rts/cts pins and invalid uart1 pin, missing numbers for
  ethernet aliases

* tag 'arm-soc/for-4.12/devicetree-fixes' of http://github.com/Broadcom/stblinux:
  ARM: dts: bcm2835: add index to the ethernet alias
  ARM: dts: bcm2835: fix uart0/uart1 pins
  ARM: dts: bcm2835: fix i2c0 pins
  ARM: dts: bcm2835: fix uart0 pinctrl node names
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents d5d332d3 b155f05d
/ { / {
aliases { aliases {
ethernet = &ethernet; ethernet0 = &ethernet;
}; };
}; };
......
/ { / {
aliases { aliases {
ethernet = &ethernet; ethernet0 = &ethernet;
}; };
}; };
......
...@@ -198,8 +198,8 @@ i2c0_gpio0: i2c0_gpio0 { ...@@ -198,8 +198,8 @@ i2c0_gpio0: i2c0_gpio0 {
brcm,pins = <0 1>; brcm,pins = <0 1>;
brcm,function = <BCM2835_FSEL_ALT0>; brcm,function = <BCM2835_FSEL_ALT0>;
}; };
i2c0_gpio32: i2c0_gpio32 { i2c0_gpio28: i2c0_gpio28 {
brcm,pins = <32 34>; brcm,pins = <28 29>;
brcm,function = <BCM2835_FSEL_ALT0>; brcm,function = <BCM2835_FSEL_ALT0>;
}; };
i2c0_gpio44: i2c0_gpio44 { i2c0_gpio44: i2c0_gpio44 {
...@@ -295,20 +295,28 @@ uart0_gpio14: uart0_gpio14 { ...@@ -295,20 +295,28 @@ uart0_gpio14: uart0_gpio14 {
/* Separate from the uart0_gpio14 group /* Separate from the uart0_gpio14 group
* because it conflicts with spi1_gpio16, and * because it conflicts with spi1_gpio16, and
* people often run uart0 on the two pins * people often run uart0 on the two pins
* without flow contrl. * without flow control.
*/ */
uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
brcm,pins = <16 17>; brcm,pins = <16 17>;
brcm,function = <BCM2835_FSEL_ALT3>; brcm,function = <BCM2835_FSEL_ALT3>;
}; };
uart0_gpio30: uart0_gpio30 { uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
brcm,pins = <30 31>; brcm,pins = <30 31>;
brcm,function = <BCM2835_FSEL_ALT3>; brcm,function = <BCM2835_FSEL_ALT3>;
}; };
uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 { uart0_gpio32: uart0_gpio32 {
brcm,pins = <32 33>; brcm,pins = <32 33>;
brcm,function = <BCM2835_FSEL_ALT3>; brcm,function = <BCM2835_FSEL_ALT3>;
}; };
uart0_gpio36: uart0_gpio36 {
brcm,pins = <36 37>;
brcm,function = <BCM2835_FSEL_ALT2>;
};
uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 {
brcm,pins = <38 39>;
brcm,function = <BCM2835_FSEL_ALT2>;
};
uart1_gpio14: uart1_gpio14 { uart1_gpio14: uart1_gpio14 {
brcm,pins = <14 15>; brcm,pins = <14 15>;
...@@ -326,10 +334,6 @@ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 { ...@@ -326,10 +334,6 @@ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
brcm,pins = <30 31>; brcm,pins = <30 31>;
brcm,function = <BCM2835_FSEL_ALT5>; brcm,function = <BCM2835_FSEL_ALT5>;
}; };
uart1_gpio36: uart1_gpio36 {
brcm,pins = <36 37 38 39>;
brcm,function = <BCM2835_FSEL_ALT2>;
};
uart1_gpio40: uart1_gpio40 { uart1_gpio40: uart1_gpio40 {
brcm,pins = <40 41>; brcm,pins = <40 41>;
brcm,function = <BCM2835_FSEL_ALT5>; brcm,function = <BCM2835_FSEL_ALT5>;
......
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