Commit 5d324410 authored by Stephen Warren's avatar Stephen Warren

ARM: tegra: fix sort order of USB PHY nodes

The USB PHY nodes are all grouped together rather than being sorted based
on reg address like all other nodes fix this.

I apologize for the churn; I should have noticed this during review of the
patches that caused this.
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent fc5c306b
...@@ -442,31 +442,6 @@ memory-controller@7000f400 { ...@@ -442,31 +442,6 @@ memory-controller@7000f400 {
#size-cells = <0>; #size-cells = <0>;
}; };
phy1: usb-phy@c5000400 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5000400 0x3c00>;
phy_type = "utmi";
nvidia,has-legacy-mode;
clocks = <&tegra_car 22>, <&tegra_car 127>;
clock-names = "phy", "pll_u";
};
phy2: usb-phy@c5004400 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5004400 0x3c00>;
phy_type = "ulpi";
clocks = <&tegra_car 94>, <&tegra_car 127>;
clock-names = "phy", "pll_u";
};
phy3: usb-phy@c5008400 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5008400 0x3C00>;
phy_type = "utmi";
clocks = <&tegra_car 22>, <&tegra_car 127>;
clock-names = "phy", "pll_u";
};
usb@c5000000 { usb@c5000000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci"; compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5000000 0x4000>; reg = <0xc5000000 0x4000>;
...@@ -479,6 +454,15 @@ usb@c5000000 { ...@@ -479,6 +454,15 @@ usb@c5000000 {
status = "disabled"; status = "disabled";
}; };
phy1: usb-phy@c5000400 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5000400 0x3c00>;
phy_type = "utmi";
nvidia,has-legacy-mode;
clocks = <&tegra_car 22>, <&tegra_car 127>;
clock-names = "phy", "pll_u";
};
usb@c5004000 { usb@c5004000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci"; compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5004000 0x4000>; reg = <0xc5004000 0x4000>;
...@@ -489,6 +473,14 @@ usb@c5004000 { ...@@ -489,6 +473,14 @@ usb@c5004000 {
status = "disabled"; status = "disabled";
}; };
phy2: usb-phy@c5004400 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5004400 0x3c00>;
phy_type = "ulpi";
clocks = <&tegra_car 94>, <&tegra_car 127>;
clock-names = "phy", "pll_u";
};
usb@c5008000 { usb@c5008000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci"; compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5008000 0x4000>; reg = <0xc5008000 0x4000>;
...@@ -499,6 +491,14 @@ usb@c5008000 { ...@@ -499,6 +491,14 @@ usb@c5008000 {
status = "disabled"; status = "disabled";
}; };
phy3: usb-phy@c5008400 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5008400 0x3c00>;
phy_type = "utmi";
clocks = <&tegra_car 22>, <&tegra_car 127>;
clock-names = "phy", "pll_u";
};
sdhci@c8000000 { sdhci@c8000000 {
compatible = "nvidia,tegra20-sdhci"; compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000000 0x200>; reg = <0xc8000000 0x200>;
......
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