Commit 5ddb78d6 authored by Hou Zhiqiang's avatar Hou Zhiqiang Committed by Shawn Guo

ARM: dts: ls1021a: add num-viewport property for PCIe DT nodes

Add num-viewport property for PCIe DT nodes to specify how many
viewports are implemented.
Signed-off-by: default avatarHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent cf91ce96
...@@ -831,6 +831,7 @@ pcie@3400000 { ...@@ -831,6 +831,7 @@ pcie@3400000 {
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
num-lanes = <4>; num-lanes = <4>;
num-viewport = <6>;
bus-range = <0x0 0xff>; bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
...@@ -855,6 +856,7 @@ pcie@3500000 { ...@@ -855,6 +856,7 @@ pcie@3500000 {
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
num-lanes = <4>; num-lanes = <4>;
num-viewport = <6>;
bus-range = <0x0 0xff>; bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
......
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