Commit 5ed7ecd0 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman

powerpc/mm: pte_frag abstraction

In this patch we make the number of pte fragments per level 4 page table
page a variable. Radix level 4 table size is 256 bytes and hence we can
have 256 fragments per level 4 page. We don't update the fragment count
in this patch. We need to do performance measurements to find the right
value for fragment count.
Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent a3dece6d
...@@ -28,6 +28,8 @@ ...@@ -28,6 +28,8 @@
#define H_PAGE_4K_PFN 0x0 #define H_PAGE_4K_PFN 0x0
#define H_PAGE_THP_HUGE 0x0 #define H_PAGE_THP_HUGE 0x0
#define H_PAGE_COMBO 0x0 #define H_PAGE_COMBO 0x0
#define H_PTE_FRAG_NR 0
#define H_PTE_FRAG_SIZE_SHIFT 0
/* /*
* On all 4K setups, remap_4k_pfn() equates to remap_pfn_range() * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
*/ */
......
...@@ -29,12 +29,12 @@ ...@@ -29,12 +29,12 @@
/* /*
* we support 16 fragments per PTE page of 64K size. * we support 16 fragments per PTE page of 64K size.
*/ */
#define PTE_FRAG_NR 16 #define H_PTE_FRAG_NR 16
/* /*
* We use a 2K PTE page fragment and another 2K for storing * We use a 2K PTE page fragment and another 2K for storing
* real_pte_t hash index * real_pte_t hash index
*/ */
#define PTE_FRAG_SIZE_SHIFT 12 #define H_PTE_FRAG_SIZE_SHIFT 12
#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT) #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
......
...@@ -177,6 +177,12 @@ extern unsigned long __pgd_val_bits; ...@@ -177,6 +177,12 @@ extern unsigned long __pgd_val_bits;
#define PMD_VAL_BITS __pmd_val_bits #define PMD_VAL_BITS __pmd_val_bits
#define PUD_VAL_BITS __pud_val_bits #define PUD_VAL_BITS __pud_val_bits
#define PGD_VAL_BITS __pgd_val_bits #define PGD_VAL_BITS __pgd_val_bits
extern unsigned long __pte_frag_nr;
#define PTE_FRAG_NR __pte_frag_nr
extern unsigned long __pte_frag_size_shift;
#define PTE_FRAG_SIZE_SHIFT __pte_frag_size_shift
#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
/* /*
* Pgtable size used by swapper, init in asm code * Pgtable size used by swapper, init in asm code
*/ */
......
...@@ -873,6 +873,9 @@ void __init hash__early_init_mmu(void) ...@@ -873,6 +873,9 @@ void __init hash__early_init_mmu(void)
/* /*
* initialize page table size * initialize page table size
*/ */
__pte_frag_nr = H_PTE_FRAG_NR;
__pte_frag_size_shift = H_PTE_FRAG_SIZE_SHIFT;
__pte_index_size = H_PTE_INDEX_SIZE; __pte_index_size = H_PTE_INDEX_SIZE;
__pmd_index_size = H_PMD_INDEX_SIZE; __pmd_index_size = H_PMD_INDEX_SIZE;
__pud_index_size = H_PUD_INDEX_SIZE; __pud_index_size = H_PUD_INDEX_SIZE;
......
...@@ -334,6 +334,11 @@ void __init radix__early_init_mmu(void) ...@@ -334,6 +334,11 @@ void __init radix__early_init_mmu(void)
__vmalloc_end = RADIX_VMALLOC_END; __vmalloc_end = RADIX_VMALLOC_END;
vmemmap = (struct page *)RADIX_VMEMMAP_BASE; vmemmap = (struct page *)RADIX_VMEMMAP_BASE;
ioremap_bot = IOREMAP_BASE; ioremap_bot = IOREMAP_BASE;
/*
* For now radix also use the same frag size
*/
__pte_frag_nr = H_PTE_FRAG_NR;
__pte_frag_size_shift = H_PTE_FRAG_SIZE_SHIFT;
radix_init_page_sizes(); radix_init_page_sizes();
if (!firmware_has_feature(FW_FEATURE_LPAR)) if (!firmware_has_feature(FW_FEATURE_LPAR))
......
...@@ -107,6 +107,10 @@ unsigned long __vmalloc_end; ...@@ -107,6 +107,10 @@ unsigned long __vmalloc_end;
EXPORT_SYMBOL(__vmalloc_end); EXPORT_SYMBOL(__vmalloc_end);
struct page *vmemmap; struct page *vmemmap;
EXPORT_SYMBOL(vmemmap); EXPORT_SYMBOL(vmemmap);
unsigned long __pte_frag_nr;
EXPORT_SYMBOL(__pte_frag_nr);
unsigned long __pte_frag_size_shift;
EXPORT_SYMBOL(__pte_frag_size_shift);
unsigned long ioremap_bot; unsigned long ioremap_bot;
#else /* !CONFIG_PPC_BOOK3S_64 */ #else /* !CONFIG_PPC_BOOK3S_64 */
unsigned long ioremap_bot = IOREMAP_BASE; unsigned long ioremap_bot = IOREMAP_BASE;
......
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