Commit 5f0b2976 authored by Yinghai Lu's avatar Yinghai Lu Committed by Ingo Molnar

x86: add pci=check_enable_amd_mmconf and dmi check

so will disable that feature by default, and only enable that via
pci=check_enable_amd_mmconf or for system match with dmi table.
Signed-off-by: default avatarYinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent e8ee6f0a
...@@ -6,12 +6,15 @@ ...@@ -6,12 +6,15 @@
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/string.h> #include <linux/string.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/dmi.h>
#include <asm/pci-direct.h> #include <asm/pci-direct.h>
#include <linux/sort.h> #include <linux/sort.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/msr.h> #include <asm/msr.h>
#include <asm/acpi.h> #include <asm/acpi.h>
#include "../pci/pci.h"
struct pci_hostbridge_probe { struct pci_hostbridge_probe {
u32 bus; u32 bus;
u32 slot; u32 slot;
...@@ -176,6 +179,9 @@ void __cpuinit fam10h_check_enable_mmcfg(void) ...@@ -176,6 +179,9 @@ void __cpuinit fam10h_check_enable_mmcfg(void)
u64 val; u64 val;
u32 address; u32 address;
if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
return;
address = MSR_FAM10H_MMIO_CONF_BASE; address = MSR_FAM10H_MMIO_CONF_BASE;
rdmsrl(address, val); rdmsrl(address, val);
...@@ -213,3 +219,25 @@ void __cpuinit fam10h_check_enable_mmcfg(void) ...@@ -213,3 +219,25 @@ void __cpuinit fam10h_check_enable_mmcfg(void)
FAM10H_MMIO_CONF_ENABLE; FAM10H_MMIO_CONF_ENABLE;
wrmsrl(address, val); wrmsrl(address, val);
} }
static int __devinit set_check_enable_amd_mmconf(const struct dmi_system_id *d)
{
pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
return 0;
}
static struct dmi_system_id __devinitdata mmconf_dmi_table[] = {
{
.callback = set_check_enable_amd_mmconf,
.ident = "Sun Microsystems Machine",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Sun Microsystems"),
},
},
{}
};
void __init check_enable_amd_mmconf_dmi(void)
{
dmi_check_system(mmconf_dmi_table);
}
...@@ -289,6 +289,18 @@ static void __init parse_setup_data(void) ...@@ -289,6 +289,18 @@ static void __init parse_setup_data(void)
} }
} }
#ifdef CONFIG_PCI_MMCONFIG
extern void __cpuinit fam10h_check_enable_mmcfg(void);
extern void __init check_enable_amd_mmconf_dmi(void);
#else
void __cpuinit fam10h_check_enable_mmcfg(void)
{
}
void __init check_enable_amd_mmconf_dmi(void)
{
}
#endif
/* /*
* setup_arch - architecture-specific boot-time initializations * setup_arch - architecture-specific boot-time initializations
* *
...@@ -510,6 +522,9 @@ void __init setup_arch(char **cmdline_p) ...@@ -510,6 +522,9 @@ void __init setup_arch(char **cmdline_p)
conswitchp = &dummy_con; conswitchp = &dummy_con;
#endif #endif
#endif #endif
/* do this before identify_cpu for boot cpu */
check_enable_amd_mmconf_dmi();
} }
static int __cpuinit get_model_name(struct cpuinfo_x86 *c) static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
...@@ -697,14 +712,6 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) ...@@ -697,14 +712,6 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
} }
#ifdef CONFIG_PCI_MMCONFIG
extern void __cpuinit fam10h_check_enable_mmcfg(void);
#else
void __cpuinit fam10h_check_enable_mmcfg(void)
{
}
#endif
static void __cpuinit init_amd(struct cpuinfo_x86 *c) static void __cpuinit init_amd(struct cpuinfo_x86 *c)
{ {
unsigned level; unsigned level;
......
...@@ -425,6 +425,10 @@ char * __devinit pcibios_setup(char *str) ...@@ -425,6 +425,10 @@ char * __devinit pcibios_setup(char *str)
pci_probe &= ~PCI_PROBE_MMCONF; pci_probe &= ~PCI_PROBE_MMCONF;
return NULL; return NULL;
} }
else if (!strcmp(str, "check_enable_amd_mmconf")) {
pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
return NULL;
}
#endif #endif
else if (!strcmp(str, "noacpi")) { else if (!strcmp(str, "noacpi")) {
acpi_noirq_set(); acpi_noirq_set();
......
...@@ -107,6 +107,9 @@ static const char __init *pci_mmcfg_amd_fam10h(void) ...@@ -107,6 +107,9 @@ static const char __init *pci_mmcfg_amd_fam10h(void)
int i; int i;
unsigned segnbits = 0, busnbits; unsigned segnbits = 0, busnbits;
if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
return NULL;
address = MSR_FAM10H_MMIO_CONF_BASE; address = MSR_FAM10H_MMIO_CONF_BASE;
if (rdmsr_safe(address, &low, &high)) if (rdmsr_safe(address, &low, &high))
return NULL; return NULL;
......
...@@ -26,6 +26,7 @@ ...@@ -26,6 +26,7 @@
#define PCI_ASSIGN_ALL_BUSSES 0x4000 #define PCI_ASSIGN_ALL_BUSSES 0x4000
#define PCI_CAN_SKIP_ISA_ALIGN 0x8000 #define PCI_CAN_SKIP_ISA_ALIGN 0x8000
#define PCI_USE__CRS 0x10000 #define PCI_USE__CRS 0x10000
#define PCI_CHECK_ENABLE_AMD_MMCONF 0x20000
extern unsigned int pci_probe; extern unsigned int pci_probe;
extern unsigned long pirq_table_addr; extern unsigned long pirq_table_addr;
......
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