[PATCH] Change pagevec counters back to unsigned long and cacheline align
Change pagevec "nr" and "cold" back to "unsigned long", because <4 byte accesses can be slow on architectures < Pentium III (additional "data16" operand on instruction). This still honours the cacheline alignment, making the size of "pagevec" structure a power of two (either 64 or 128 bytes). Haven't been able to see any significant change on performance on my limited testing. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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