Commit 61ad9928 authored by Deepak M's avatar Deepak M Committed by Daniel Vetter

drm/i915: Correct the Ref clock value for BXT

The reference clock for BXT is 19.2 MHz not 19.5 MHz, updating the
correct value here.
Signed-off-by: default avatarDeepak M <m.deepak@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449238659-12473-2-git-send-email-m.deepak@intel.com
parent a9287dbc
...@@ -7714,7 +7714,7 @@ enum skl_disp_power_wells { ...@@ -7714,7 +7714,7 @@ enum skl_disp_power_wells {
#define BXT_DSI_PLL_RATIO_MAX 0x7D #define BXT_DSI_PLL_RATIO_MAX 0x7D
#define BXT_DSI_PLL_RATIO_MIN 0x22 #define BXT_DSI_PLL_RATIO_MIN 0x22
#define BXT_DSI_PLL_RATIO_MASK 0xFF #define BXT_DSI_PLL_RATIO_MASK 0xFF
#define BXT_REF_CLOCK_KHZ 19500 #define BXT_REF_CLOCK_KHZ 19200
#define BXT_DSI_PLL_ENABLE _MMIO(0x46080) #define BXT_DSI_PLL_ENABLE _MMIO(0x46080)
#define BXT_DSI_PLL_DO_ENABLE (1 << 31) #define BXT_DSI_PLL_DO_ENABLE (1 << 31)
......
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