Commit 668f52c3 authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu/gfx6: drop duplicate code

The compute functions just called the gfx functions, drop
the wrapper.
Reviewed-by: default avatarEdward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2255e8c1
...@@ -1324,8 +1324,8 @@ static void gfx_v6_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring) ...@@ -1324,8 +1324,8 @@ static void gfx_v6_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)
amdgpu_ring_write(ring, 0x1); amdgpu_ring_write(ring, 0x1);
} }
static void gfx_v6_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr, static void gfx_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
u64 seq, unsigned flags) u64 seq, unsigned flags)
{ {
bool write64bit = flags & AMDGPU_FENCE_FLAG_64BIT; bool write64bit = flags & AMDGPU_FENCE_FLAG_64BIT;
bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
...@@ -1351,17 +1351,9 @@ static void gfx_v6_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr, ...@@ -1351,17 +1351,9 @@ static void gfx_v6_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr,
amdgpu_ring_write(ring, upper_32_bits(seq)); amdgpu_ring_write(ring, upper_32_bits(seq));
} }
static void gfx_v6_0_ring_emit_fence_compute(struct amdgpu_ring *ring, static void gfx_v6_0_ring_emit_ib(struct amdgpu_ring *ring,
u64 addr, u64 seq, struct amdgpu_ib *ib,
unsigned flags) unsigned vm_id, bool ctx_switch)
{
gfx_v6_0_ring_emit_fence_gfx(ring, addr, seq, flags);
}
static void gfx_v6_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
struct amdgpu_ib *ib,
unsigned vm_id, bool ctx_switch)
{ {
u32 header, control = 0; u32 header, control = 0;
...@@ -1388,13 +1380,6 @@ static void gfx_v6_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, ...@@ -1388,13 +1380,6 @@ static void gfx_v6_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, control); amdgpu_ring_write(ring, control);
} }
static void gfx_v6_0_ring_emit_ib_compute(struct amdgpu_ring *ring,
struct amdgpu_ib *ib,
unsigned vm_id, bool ctx_switch)
{
gfx_v6_0_ring_emit_ib_gfx(ring, ib, vm_id, ctx_switch);
}
/** /**
* gfx_v6_0_ring_test_ib - basic ring IB test * gfx_v6_0_ring_test_ib - basic ring IB test
* *
...@@ -3119,8 +3104,8 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = { ...@@ -3119,8 +3104,8 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
.get_wptr = gfx_v6_0_ring_get_wptr, .get_wptr = gfx_v6_0_ring_get_wptr,
.set_wptr = gfx_v6_0_ring_set_wptr_gfx, .set_wptr = gfx_v6_0_ring_set_wptr_gfx,
.parse_cs = NULL, .parse_cs = NULL,
.emit_ib = gfx_v6_0_ring_emit_ib_gfx, .emit_ib = gfx_v6_0_ring_emit_ib,
.emit_fence = gfx_v6_0_ring_emit_fence_gfx, .emit_fence = gfx_v6_0_ring_emit_fence,
.emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync, .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync,
.emit_vm_flush = gfx_v6_0_ring_emit_vm_flush, .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush,
.emit_gds_switch = gfx_v6_0_ring_emit_gds_switch, .emit_gds_switch = gfx_v6_0_ring_emit_gds_switch,
...@@ -3136,8 +3121,8 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = { ...@@ -3136,8 +3121,8 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = {
.get_wptr = gfx_v6_0_ring_get_wptr, .get_wptr = gfx_v6_0_ring_get_wptr,
.set_wptr = gfx_v6_0_ring_set_wptr_compute, .set_wptr = gfx_v6_0_ring_set_wptr_compute,
.parse_cs = NULL, .parse_cs = NULL,
.emit_ib = gfx_v6_0_ring_emit_ib_compute, .emit_ib = gfx_v6_0_ring_emit_ib,
.emit_fence = gfx_v6_0_ring_emit_fence_compute, .emit_fence = gfx_v6_0_ring_emit_fence,
.emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync, .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync,
.emit_vm_flush = gfx_v6_0_ring_emit_vm_flush, .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush,
.emit_gds_switch = gfx_v6_0_ring_emit_gds_switch, .emit_gds_switch = gfx_v6_0_ring_emit_gds_switch,
......
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