Commit 66eb9884 authored by Kumar Gala's avatar Kumar Gala

powerpc/85xx: Move mpc8572ds.dts to address-cells/size-cells = <2>

Change the top-level #address-cells and #size-cells to <2> so the
mpc8572ds.dts is easier to deal with both a true 32-bit physical
or 36-bit physical address space.
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent f618ebfc
...@@ -13,8 +13,8 @@ ...@@ -13,8 +13,8 @@
/ { / {
model = "fsl,MPC8572DS"; model = "fsl,MPC8572DS";
compatible = "fsl,MPC8572DS"; compatible = "fsl,MPC8572DS";
#address-cells = <1>; #address-cells = <2>;
#size-cells = <1>; #size-cells = <2>;
aliases { aliases {
ethernet0 = &enet0; ethernet0 = &enet0;
...@@ -61,7 +61,6 @@ PowerPC,8572@1 { ...@@ -61,7 +61,6 @@ PowerPC,8572@1 {
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <0x0 0x0>; // Filled by U-Boot
}; };
soc8572@ffe00000 { soc8572@ffe00000 {
...@@ -69,8 +68,8 @@ soc8572@ffe00000 { ...@@ -69,8 +68,8 @@ soc8572@ffe00000 {
#size-cells = <1>; #size-cells = <1>;
device_type = "soc"; device_type = "soc";
compatible = "simple-bus"; compatible = "simple-bus";
ranges = <0x0 0xffe00000 0x100000>; ranges = <0x0 0 0xffe00000 0x100000>;
reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed reg = <0 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
bus-frequency = <0>; // Filled out by uboot. bus-frequency = <0>; // Filled out by uboot.
memory-controller@2000 { memory-controller@2000 {
...@@ -351,10 +350,10 @@ pci0: pcie@ffe08000 { ...@@ -351,10 +350,10 @@ pci0: pcie@ffe08000 {
#interrupt-cells = <1>; #interrupt-cells = <1>;
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
reg = <0xffe08000 0x1000>; reg = <0 0xffe08000 0 0x1000>;
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <24 2>; interrupts = <24 2>;
...@@ -561,10 +560,10 @@ pci1: pcie@ffe09000 { ...@@ -561,10 +560,10 @@ pci1: pcie@ffe09000 {
#interrupt-cells = <1>; #interrupt-cells = <1>;
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
reg = <0xffe09000 0x1000>; reg = <0 0xffe09000 0 0x1000>;
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <26 2>; interrupts = <26 2>;
...@@ -598,10 +597,10 @@ pci2: pcie@ffe0a000 { ...@@ -598,10 +597,10 @@ pci2: pcie@ffe0a000 {
#interrupt-cells = <1>; #interrupt-cells = <1>;
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
reg = <0xffe0a000 0x1000>; reg = <0 0xffe0a000 0 0x1000>;
bus-range = <0 255>; bus-range = <0 255>;
ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <27 2>; interrupts = <27 2>;
......
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