Commit 67533f87 authored by Clément Péron's avatar Clément Péron Committed by Maxime Ripard

arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1

Enable CPU opp tables for Beelink GS1.

This needs to change the CPU regulator max voltage to fit
the OPP table.

Also add the ramp-delay information to avoid any out of spec
running as the regulator is slower at reaching the voltage
requested compare to the PLL reaching the frequency.

There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.
Signed-off-by: default avatarClément Péron <peron.clem@gmail.com>
Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
parent 905434e0
......@@ -4,6 +4,7 @@
/dts-v1/;
#include "sun50i-h6.dtsi"
#include "sun50i-h6-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
......@@ -77,6 +78,10 @@ spdif_out: spdif-out {
};
};
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
&de {
status = "okay";
};
......@@ -234,7 +239,8 @@ reg_cldo3: cldo3 {
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1080000>;
regulator-max-microvolt = <1160000>;
regulator-ramp-delay = <2500>;
regulator-name = "vdd-cpu";
};
......@@ -242,6 +248,7 @@ reg_dcdcc: dcdcc {
regulator-enable-ramp-delay = <32000>;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1080000>;
regulator-ramp-delay = <2500>;
regulator-name = "vdd-gpu";
};
......
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