Commit 67a86748 authored by Jon Mason's avatar Jon Mason Committed by Greg Kroah-Hartman

ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags

commit 0c2bf9f9 upstream.

GIC_PPI flags were misconfigured for the timers, resulting in errors
like:
[    0.000000] GIC: PPI11 is secure or misconfigured

Changing them to being edge triggered corrects the issue
Suggested-by: default avatarRafał Miłecki <rafal@milecki.pl>
Signed-off-by: default avatarJon Mason <jon.mason@broadcom.com>
Fixes: d27509f1 ("ARM: BCM5301X: add dts files for BCM4708 SoC")
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
[AmitP: Resolved minor cherry-pick conflict]
Signed-off-by: default avatarAmit Pundir <amit.pundir@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 86af955d
...@@ -52,14 +52,14 @@ scu@0000 { ...@@ -52,14 +52,14 @@ scu@0000 {
timer@0200 { timer@0200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x0200 0x100>; reg = <0x0200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
clocks = <&clk_periph>; clocks = <&clk_periph>;
}; };
local-timer@0600 { local-timer@0600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0x0600 0x100>; reg = <0x0600 0x100>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
clocks = <&clk_periph>; clocks = <&clk_periph>;
}; };
......
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