Commit 6885843a authored by Maarten Lankhorst's avatar Maarten Lankhorst

drm/i915: Convert flip_work to a list.

This will be required to allow more than 1 update in the future.
Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463490484-19540-10-git-send-email-maarten.lankhorst@linux.intel.comReviewed-by: default avatarPatrik Jakobsson <patrik.jakobsson@linux.intel.com>
parent aa420ddd
...@@ -592,6 +592,53 @@ static int i915_gem_gtt_info(struct seq_file *m, void *data) ...@@ -592,6 +592,53 @@ static int i915_gem_gtt_info(struct seq_file *m, void *data)
return 0; return 0;
} }
static void i915_dump_pageflip(struct seq_file *m,
struct drm_i915_private *dev_priv,
struct intel_crtc *crtc,
struct intel_flip_work *work)
{
const char pipe = pipe_name(crtc->pipe);
const char plane = plane_name(crtc->plane);
u32 pending;
u32 addr;
pending = atomic_read(&work->pending);
if (pending) {
seq_printf(m, "Flip ioctl preparing on pipe %c (plane %c)\n",
pipe, plane);
} else {
seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
pipe, plane);
}
if (work->flip_queued_req) {
struct intel_engine_cs *engine = i915_gem_request_get_engine(work->flip_queued_req);
seq_printf(m, "Flip queued on %s at seqno %x, next seqno %x [current breadcrumb %x], completed? %d\n",
engine->name,
i915_gem_request_get_seqno(work->flip_queued_req),
dev_priv->next_seqno,
engine->get_seqno(engine),
i915_gem_request_completed(work->flip_queued_req, true));
} else
seq_printf(m, "Flip not associated with any ring\n");
seq_printf(m, "Flip queued on frame %d, (was ready on frame %d), now %d\n",
work->flip_queued_vblank,
work->flip_ready_vblank,
intel_crtc_get_vblank_counter(crtc));
seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
if (INTEL_INFO(dev_priv)->gen >= 4)
addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane)));
else
addr = I915_READ(DSPADDR(crtc->plane));
seq_printf(m, "Current scanout address 0x%08x\n", addr);
if (work->pending_flip_obj) {
seq_printf(m, "New framebuffer address 0x%08lx\n", (long)work->gtt_offset);
seq_printf(m, "MMIO update completed? %d\n", addr == work->gtt_offset);
}
}
static int i915_gem_pageflip_info(struct seq_file *m, void *data) static int i915_gem_pageflip_info(struct seq_file *m, void *data)
{ {
struct drm_info_node *node = m->private; struct drm_info_node *node = m->private;
...@@ -610,48 +657,13 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data) ...@@ -610,48 +657,13 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data)
struct intel_flip_work *work; struct intel_flip_work *work;
spin_lock_irq(&dev->event_lock); spin_lock_irq(&dev->event_lock);
work = crtc->flip_work; if (list_empty(&crtc->flip_work)) {
if (work == NULL) {
seq_printf(m, "No flip due on pipe %c (plane %c)\n", seq_printf(m, "No flip due on pipe %c (plane %c)\n",
pipe, plane); pipe, plane);
} else { } else {
u32 pending; list_for_each_entry(work, &crtc->flip_work, head) {
u32 addr; i915_dump_pageflip(m, dev_priv, crtc, work);
seq_puts(m, "\n");
pending = atomic_read(&work->pending);
if (pending) {
seq_printf(m, "Flip ioctl preparing on pipe %c (plane %c)\n",
pipe, plane);
} else {
seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
pipe, plane);
}
if (work->flip_queued_req) {
struct intel_engine_cs *engine = i915_gem_request_get_engine(work->flip_queued_req);
seq_printf(m, "Flip queued on %s at seqno %x, next seqno %x [current breadcrumb %x], completed? %d\n",
engine->name,
i915_gem_request_get_seqno(work->flip_queued_req),
dev_priv->next_seqno,
engine->get_seqno(engine),
i915_gem_request_completed(work->flip_queued_req, true));
} else
seq_printf(m, "Flip not associated with any ring\n");
seq_printf(m, "Flip queued on frame %d, (was ready on frame %d), now %d\n",
work->flip_queued_vblank,
work->flip_ready_vblank,
intel_crtc_get_vblank_counter(crtc));
seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
if (INTEL_INFO(dev)->gen >= 4)
addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane)));
else
addr = I915_READ(DSPADDR(crtc->plane));
seq_printf(m, "Current scanout address 0x%08x\n", addr);
if (work->pending_flip_obj) {
seq_printf(m, "New framebuffer address 0x%08lx\n", (long)work->gtt_offset);
seq_printf(m, "MMIO update completed? %d\n", addr == work->gtt_offset);
} }
} }
spin_unlock_irq(&dev->event_lock); spin_unlock_irq(&dev->event_lock);
......
...@@ -622,7 +622,7 @@ struct drm_i915_display_funcs { ...@@ -622,7 +622,7 @@ struct drm_i915_display_funcs {
struct drm_framebuffer *fb, struct drm_framebuffer *fb,
struct drm_i915_gem_object *obj, struct drm_i915_gem_object *obj,
struct drm_i915_gem_request *req, struct drm_i915_gem_request *req,
uint32_t flags); uint64_t gtt_offset);
void (*hpd_irq_setup)(struct drm_i915_private *dev_priv); void (*hpd_irq_setup)(struct drm_i915_private *dev_priv);
/* clock updates for mode set */ /* clock updates for mode set */
/* cursor updates */ /* cursor updates */
......
This diff is collapsed.
...@@ -641,7 +641,7 @@ struct intel_crtc { ...@@ -641,7 +641,7 @@ struct intel_crtc {
unsigned long enabled_power_domains; unsigned long enabled_power_domains;
bool lowfreq_avail; bool lowfreq_avail;
struct intel_overlay *overlay; struct intel_overlay *overlay;
struct intel_flip_work *flip_work; struct list_head flip_work;
atomic_t unpin_work_count; atomic_t unpin_work_count;
...@@ -970,6 +970,8 @@ intel_get_crtc_for_plane(struct drm_device *dev, int plane) ...@@ -970,6 +970,8 @@ intel_get_crtc_for_plane(struct drm_device *dev, int plane)
} }
struct intel_flip_work { struct intel_flip_work {
struct list_head head;
struct work_struct unpin_work; struct work_struct unpin_work;
struct work_struct mmio_work; struct work_struct mmio_work;
......
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