[PATCH] m32r: fix a typo of delay.c

This patch fixes a typo of arch/m32r/lib/delay.c.  It is required to fix a
compile error for non-CONFIG_ISA_DUAL_ISSUE configuration.

NOTE:

  The m32r has a kind of ISA (instruction set architecture) like a 2-way
  VLIW.  Originally the m32r has two types of 16-bit/32-bit instructions.
  Only 16-bit instruction pair can be executed in parallel on a m32r chip
  with dual issuing support (e.g.  M32700).

  According to the insturction dual issuing of the m32r, a
  programmer/compiler can explicitly put two 16-bit instructions into an
  instruction word, which are to be executed in parallel.

  ex. Assembly coding style of two 16-bit instruncions; insn A and B:

    1) insn A
       insn B              ; sequential execution (implicit)

    2) insn A -> insn B	   ; sequential execution (explicit)

    3) insn A || insn B	   ; parallel execution
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

arch/m32r/lib/delay.c

@@ -51,7 +51,7 @@ void __delay(unsigned long loops)
 		"addi	%0, #-1			\n\t"
 		"bgtz	%0, 1b			\n\t"
 		" .fillinsn			\n\t"
-		"2:i				\n\t"
+		"2:				\n\t"
 		: "+r" (loops)
 		: "r" (0)
 	);