Commit 68c03249 authored by Michal Kazior's avatar Michal Kazior Committed by Kalle Valo

ath10k: convert pci_alloc_consistent() to dma_alloc_coherent()

This allows to use GFP_KERNEL allocation. This
should decrease chance of allocation failure, e.g.
during firmware recovery.
Reported-By: default avatarAvery Pennarun <apenwarr@gmail.com>
Signed-off-by: default avatarMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent c508671d
...@@ -843,7 +843,6 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar, ...@@ -843,7 +843,6 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar,
struct ath10k_ce_pipe *ce_state, struct ath10k_ce_pipe *ce_state,
const struct ce_attr *attr) const struct ce_attr *attr)
{ {
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
struct ath10k_ce_ring *src_ring; struct ath10k_ce_ring *src_ring;
unsigned int nentries = attr->src_nentries; unsigned int nentries = attr->src_nentries;
unsigned int ce_nbytes; unsigned int ce_nbytes;
...@@ -885,10 +884,10 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar, ...@@ -885,10 +884,10 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar,
* coherent DMA are unsupported * coherent DMA are unsupported
*/ */
src_ring->base_addr_owner_space_unaligned = src_ring->base_addr_owner_space_unaligned =
pci_alloc_consistent(ar_pci->pdev, dma_alloc_coherent(ar->dev,
(nentries * sizeof(struct ce_desc) + (nentries * sizeof(struct ce_desc) +
CE_DESC_RING_ALIGN), CE_DESC_RING_ALIGN),
&base_addr); &base_addr, GFP_KERNEL);
if (!src_ring->base_addr_owner_space_unaligned) { if (!src_ring->base_addr_owner_space_unaligned) {
kfree(ce_state->src_ring); kfree(ce_state->src_ring);
ce_state->src_ring = NULL; ce_state->src_ring = NULL;
...@@ -912,11 +911,11 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar, ...@@ -912,11 +911,11 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar,
kmalloc((nentries * sizeof(struct ce_desc) + kmalloc((nentries * sizeof(struct ce_desc) +
CE_DESC_RING_ALIGN), GFP_KERNEL); CE_DESC_RING_ALIGN), GFP_KERNEL);
if (!src_ring->shadow_base_unaligned) { if (!src_ring->shadow_base_unaligned) {
pci_free_consistent(ar_pci->pdev, dma_free_coherent(ar->dev,
(nentries * sizeof(struct ce_desc) + (nentries * sizeof(struct ce_desc) +
CE_DESC_RING_ALIGN), CE_DESC_RING_ALIGN),
src_ring->base_addr_owner_space, src_ring->base_addr_owner_space,
src_ring->base_addr_ce_space); src_ring->base_addr_ce_space);
kfree(ce_state->src_ring); kfree(ce_state->src_ring);
ce_state->src_ring = NULL; ce_state->src_ring = NULL;
return -ENOMEM; return -ENOMEM;
...@@ -946,7 +945,6 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar, ...@@ -946,7 +945,6 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar,
struct ath10k_ce_pipe *ce_state, struct ath10k_ce_pipe *ce_state,
const struct ce_attr *attr) const struct ce_attr *attr)
{ {
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
struct ath10k_ce_ring *dest_ring; struct ath10k_ce_ring *dest_ring;
unsigned int nentries = attr->dest_nentries; unsigned int nentries = attr->dest_nentries;
unsigned int ce_nbytes; unsigned int ce_nbytes;
...@@ -986,10 +984,10 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar, ...@@ -986,10 +984,10 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar,
* coherent DMA are unsupported * coherent DMA are unsupported
*/ */
dest_ring->base_addr_owner_space_unaligned = dest_ring->base_addr_owner_space_unaligned =
pci_alloc_consistent(ar_pci->pdev, dma_alloc_coherent(ar->dev,
(nentries * sizeof(struct ce_desc) + (nentries * sizeof(struct ce_desc) +
CE_DESC_RING_ALIGN), CE_DESC_RING_ALIGN),
&base_addr); &base_addr, GFP_KERNEL);
if (!dest_ring->base_addr_owner_space_unaligned) { if (!dest_ring->base_addr_owner_space_unaligned) {
kfree(ce_state->dest_ring); kfree(ce_state->dest_ring);
ce_state->dest_ring = NULL; ce_state->dest_ring = NULL;
...@@ -1112,26 +1110,25 @@ struct ath10k_ce_pipe *ath10k_ce_init(struct ath10k *ar, ...@@ -1112,26 +1110,25 @@ struct ath10k_ce_pipe *ath10k_ce_init(struct ath10k *ar,
void ath10k_ce_deinit(struct ath10k_ce_pipe *ce_state) void ath10k_ce_deinit(struct ath10k_ce_pipe *ce_state)
{ {
struct ath10k *ar = ce_state->ar; struct ath10k *ar = ce_state->ar;
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
if (ce_state->src_ring) { if (ce_state->src_ring) {
kfree(ce_state->src_ring->shadow_base_unaligned); kfree(ce_state->src_ring->shadow_base_unaligned);
pci_free_consistent(ar_pci->pdev, dma_free_coherent(ar->dev,
(ce_state->src_ring->nentries * (ce_state->src_ring->nentries *
sizeof(struct ce_desc) + sizeof(struct ce_desc) +
CE_DESC_RING_ALIGN), CE_DESC_RING_ALIGN),
ce_state->src_ring->base_addr_owner_space, ce_state->src_ring->base_addr_owner_space,
ce_state->src_ring->base_addr_ce_space); ce_state->src_ring->base_addr_ce_space);
kfree(ce_state->src_ring); kfree(ce_state->src_ring);
} }
if (ce_state->dest_ring) { if (ce_state->dest_ring) {
pci_free_consistent(ar_pci->pdev, dma_free_coherent(ar->dev,
(ce_state->dest_ring->nentries * (ce_state->dest_ring->nentries *
sizeof(struct ce_desc) + sizeof(struct ce_desc) +
CE_DESC_RING_ALIGN), CE_DESC_RING_ALIGN),
ce_state->dest_ring->base_addr_owner_space, ce_state->dest_ring->base_addr_owner_space,
ce_state->dest_ring->base_addr_ce_space); ce_state->dest_ring->base_addr_ce_space);
kfree(ce_state->dest_ring); kfree(ce_state->dest_ring);
} }
......
...@@ -358,9 +358,10 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data, ...@@ -358,9 +358,10 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data,
* 2) Buffer in DMA-able space * 2) Buffer in DMA-able space
*/ */
orig_nbytes = nbytes; orig_nbytes = nbytes;
data_buf = (unsigned char *)pci_alloc_consistent(ar_pci->pdev, data_buf = (unsigned char *)dma_alloc_coherent(ar->dev,
orig_nbytes, orig_nbytes,
&ce_data_base); &ce_data_base,
GFP_ATOMIC);
if (!data_buf) { if (!data_buf) {
ret = -ENOMEM; ret = -ENOMEM;
...@@ -458,8 +459,8 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data, ...@@ -458,8 +459,8 @@ static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data,
address, ret); address, ret);
if (data_buf) if (data_buf)
pci_free_consistent(ar_pci->pdev, orig_nbytes, dma_free_coherent(ar->dev, orig_nbytes, data_buf,
data_buf, ce_data_base); ce_data_base);
return ret; return ret;
} }
...@@ -502,9 +503,10 @@ static int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address, ...@@ -502,9 +503,10 @@ static int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address,
* 2) Buffer in DMA-able space * 2) Buffer in DMA-able space
*/ */
orig_nbytes = nbytes; orig_nbytes = nbytes;
data_buf = (unsigned char *)pci_alloc_consistent(ar_pci->pdev, data_buf = (unsigned char *)dma_alloc_coherent(ar->dev,
orig_nbytes, orig_nbytes,
&ce_data_base); &ce_data_base,
GFP_ATOMIC);
if (!data_buf) { if (!data_buf) {
ret = -ENOMEM; ret = -ENOMEM;
goto done; goto done;
...@@ -600,8 +602,8 @@ static int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address, ...@@ -600,8 +602,8 @@ static int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address,
done: done:
if (data_buf) { if (data_buf) {
pci_free_consistent(ar_pci->pdev, orig_nbytes, data_buf, dma_free_coherent(ar->dev, orig_nbytes, data_buf,
ce_data_base); ce_data_base);
} }
if (ret != 0) if (ret != 0)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment