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Commit 6a9110f9 authored by Tony Lindgren's avatar Tony Lindgren
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Merge commit '5390130f' into fixes-v5.7

parents 9f872f92 5390130f
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arch/arm/boot/dts/Makefile
View file @ 6a9110f9
......@@ -832,6 +832,7 @@ dtb-$(CONFIG_SOC_DRA7XX) += \
am57xx-beagle-x15.dtb \
am57xx-beagle-x15-revb1.dtb \
am57xx-beagle-x15-revc.dtb \
am5729-beagleboneai.dtb \
am57xx-cl-som-am57x.dtb \
am57xx-sbc-am57x.dtb \
am572x-idk.dtb \
......
arch/arm/boot/dts/am335x-guardian.dts
View file @ 6a9110f9
......@@ -105,6 +105,7 @@ pwm7: dmtimer-pwm {
ti,timers = <&timer7>;
pinctrl-names = "default";
pinctrl-0 = <&dmtimer7_pins>;
ti,clock-source = <0x01>;
};
vmmcsd_fixed: regulator-3v3 {
......
arch/arm/boot/dts/am3517-evm.dts
View file @ 6a9110f9
......@@ -156,6 +156,7 @@ pwm11: dmtimer-pwm@11 {
pinctrl-0 = <&pwm_pins>;
ti,timers = <&timer11>;
#pwm-cells = <3>;
ti,clock-source = <0x01>;
};
/* HS USB Host PHY on PORT 1 */
......
arch/arm/boot/dts/am5729-beagleboneai.dts 0 → 100644
View file @ 6a9110f9
This diff is collapsed.
arch/arm/boot/dts/am57xx-idk-common.dtsi
View file @ 6a9110f9
......@@ -35,6 +35,16 @@ v3_3d: fixedregulator-v3_3d {
regulator-boot-on;
};
v1_2d: fixedregulator-v1_2d {
compatible = "regulator-fixed";
regulator-name = "V1_2D";
vin-supply = <&vmain>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
};
vtt_fixed: fixedregulator-vtt {
/* TPS51200 */
compatible = "regulator-fixed";
......@@ -139,6 +149,12 @@ tpd12s015_out: endpoint@0 {
};
};
};
src_clk_x1: src_clk_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <20000000>;
};
};
&dra7_pmx_core {
......@@ -378,6 +394,32 @@ tpic2810: tpic2810@60 {
gpio-controller;
#gpio-cells = <2>;
};
dsi_bridge: tc358778@e {
compatible = "toshiba,tc358778", "toshiba,tc358768";
reg = <0xe>;
status = "disabled";
clocks = <&src_clk_x1>;
clock-names = "refclk";
vddc-supply = <&v1_2d>;
vddmipi-supply = <&v1_2d>;
vddio-supply = <&v3_3d>;
dsi_bridge_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
rgb_in: endpoint {
remote-endpoint = <&dpi_out>;
data-lines = <24>;
};
};
};
};
};
&mcspi3 {
......@@ -543,4 +585,20 @@ hdmi_out: endpoint {
&dss {
status = "okay";
vdda_video-supply = <&ldoln_reg>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dpi_out: endpoint {
remote-endpoint = <&rgb_in>;
data-lines = <24>;
};
};
};
};
arch/arm/boot/dts/dra7-l4.dtsi
View file @ 6a9110f9
......@@ -1163,8 +1163,8 @@ target-module@32000 { /* 0x48032000, ap 5 3e.0 */
timer2: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER2_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER2_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1191,8 +1191,8 @@ target-module@34000 { /* 0x48034000, ap 7 46.0 */
timer3: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER3_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER3_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1210,8 +1210,9 @@ target-module@36000 { /* 0x48036000, ap 9 4e.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): l4per_pwrdm, l4per_clkdm */
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x36000 0x1000>;
......@@ -1219,8 +1220,8 @@ target-module@36000 { /* 0x48036000, ap 9 4e.0 */
timer4: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1246,8 +1247,8 @@ target-module@3e000 { /* 0x4803e000, ap 11 56.0 */
timer9: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER9_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER9_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1853,8 +1854,8 @@ target-module@86000 { /* 0x48086000, ap 41 5e.0 */
timer10: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER10_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER10_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1880,8 +1881,8 @@ target-module@88000 { /* 0x48088000, ap 43 66.0 */
timer11: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER11_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER11_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -3354,8 +3355,8 @@ target-module@20000 { /* 0x48820000, ap 5 08.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x20000 0x1000>;
......@@ -3381,8 +3382,9 @@ target-module@22000 { /* 0x48822000, ap 7 24.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x22000 0x1000>;
......@@ -3417,8 +3419,8 @@ target-module@24000 { /* 0x48824000, ap 9 26.0 */
timer7: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER7_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER7_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -3444,8 +3446,8 @@ target-module@26000 { /* 0x48826000, ap 11 0c.0 */
timer8: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER8_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER8_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -3471,8 +3473,8 @@ target-module@28000 { /* 0x48828000, ap 13 16.0 */
timer13: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER13_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER13_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
......
arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi
View file @ 6a9110f9
......@@ -65,6 +65,7 @@ pwm10: dmtimer-pwm {
pinctrl-0 = <&pwm_pins>;
ti,timers = <&timer10>;
#pwm-cells = <3>;
ti,clock-source = <0x01>;
};
};
......
arch/arm/boot/dts/omap3-gta04.dtsi
View file @ 6a9110f9
......@@ -150,6 +150,7 @@ pwm11: dmtimer-pwm {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer11>;
#pwm-cells = <3>;
ti,clock-source = <0x01>;
};
hsusb2_phy: hsusb2_phy {
......
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